1 /*- 2 * Copyright 2003 by Peter Grehan. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 3. The name of the author may not be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 /* 31 * A driver for the PIC found in the Heathrow/Paddington MacIO chips. 32 * This was superseded by an OpenPIC in the Keylargo and beyond 33 * MacIO versions. 34 */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/module.h> 39 #include <sys/bus.h> 40 #include <sys/conf.h> 41 #include <sys/kernel.h> 42 #include <sys/rman.h> 43 44 #include <dev/ofw/ofw_bus.h> 45 #include <dev/ofw/openfirm.h> 46 47 #include <machine/bus.h> 48 #include <machine/intr_machdep.h> 49 #include <machine/md_var.h> 50 #include <machine/pio.h> 51 #include <machine/resource.h> 52 53 #include <vm/vm.h> 54 #include <vm/pmap.h> 55 56 #include <powerpc/powermac/hrowpicvar.h> 57 58 #include "pic_if.h" 59 60 /* 61 * MacIO interface 62 */ 63 static int hrowpic_probe(device_t); 64 static int hrowpic_attach(device_t); 65 66 static void hrowpic_dispatch(device_t, struct trapframe *); 67 static void hrowpic_enable(device_t, u_int, u_int); 68 static void hrowpic_eoi(device_t, u_int); 69 static void hrowpic_ipi(device_t, u_int); 70 static void hrowpic_mask(device_t, u_int); 71 static void hrowpic_unmask(device_t, u_int); 72 73 static device_method_t hrowpic_methods[] = { 74 /* Device interface */ 75 DEVMETHOD(device_probe, hrowpic_probe), 76 DEVMETHOD(device_attach, hrowpic_attach), 77 78 /* PIC interface */ 79 DEVMETHOD(pic_dispatch, hrowpic_dispatch), 80 DEVMETHOD(pic_enable, hrowpic_enable), 81 DEVMETHOD(pic_eoi, hrowpic_eoi), 82 DEVMETHOD(pic_ipi, hrowpic_ipi), 83 DEVMETHOD(pic_mask, hrowpic_mask), 84 DEVMETHOD(pic_unmask, hrowpic_unmask), 85 86 { 0, 0 }, 87 }; 88 89 static driver_t hrowpic_driver = { 90 "hrowpic", 91 hrowpic_methods, 92 sizeof(struct hrowpic_softc) 93 }; 94 95 static devclass_t hrowpic_devclass; 96 97 DRIVER_MODULE(hrowpic, macio, hrowpic_driver, hrowpic_devclass, 0, 0); 98 99 static uint32_t 100 hrowpic_read_reg(struct hrowpic_softc *sc, u_int reg, u_int bank) 101 { 102 if (bank == HPIC_PRIMARY) 103 reg += HPIC_1ST_OFFSET; 104 105 return (bus_space_read_4(sc->sc_bt, sc->sc_bh, reg)); 106 } 107 108 static void 109 hrowpic_write_reg(struct hrowpic_softc *sc, u_int reg, u_int bank, 110 uint32_t val) 111 { 112 113 if (bank == HPIC_PRIMARY) 114 reg += HPIC_1ST_OFFSET; 115 116 bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val); 117 118 /* XXX Issue a read to force the write to complete. */ 119 bus_space_read_4(sc->sc_bt, sc->sc_bh, reg); 120 } 121 122 static int 123 hrowpic_probe(device_t dev) 124 { 125 const char *type = ofw_bus_get_type(dev); 126 127 /* 128 * OpenPIC cells have a type of "open-pic", so this 129 * is sufficient to identify a Heathrow cell 130 */ 131 if (strcmp(type, "interrupt-controller") != 0) 132 return (ENXIO); 133 134 /* 135 * The description was already printed out in the nexus 136 * probe, so don't do it again here 137 */ 138 device_set_desc(dev, "Heathrow MacIO interrupt controller"); 139 return (0); 140 } 141 142 static int 143 hrowpic_attach(device_t dev) 144 { 145 struct hrowpic_softc *sc; 146 147 sc = device_get_softc(dev); 148 sc->sc_dev = dev; 149 150 sc->sc_rrid = 0; 151 sc->sc_rres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rrid, 152 RF_ACTIVE); 153 154 if (sc->sc_rres == NULL) { 155 device_printf(dev, "Could not alloc mem resource!\n"); 156 return (ENXIO); 157 } 158 159 sc->sc_bt = rman_get_bustag(sc->sc_rres); 160 sc->sc_bh = rman_get_bushandle(sc->sc_rres); 161 162 /* 163 * Disable all interrupt sources and clear outstanding interrupts 164 */ 165 hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_PRIMARY, 0); 166 hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_PRIMARY, 0xffffffff); 167 hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_SECONDARY, 0); 168 hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_SECONDARY, 0xffffffff); 169 170 powerpc_register_pic(dev, ofw_bus_get_node(dev), 64, 0, FALSE); 171 return (0); 172 } 173 174 /* 175 * Local routines 176 */ 177 178 static void 179 hrowpic_toggle_irq(struct hrowpic_softc *sc, int irq, int enable) 180 { 181 u_int roffset; 182 u_int rbit; 183 184 KASSERT((irq > 0) && (irq <= HROWPIC_IRQMAX), ("en irq out of range")); 185 186 /* 187 * Humor the SMP layer if it wants to set up an IPI handler. 188 */ 189 if (irq == HROWPIC_IRQMAX) 190 return; 191 192 /* 193 * Calculate prim/sec register bank for the IRQ, update soft copy, 194 * and enable the IRQ as an interrupt source 195 */ 196 roffset = HPIC_INT_TO_BANK(irq); 197 rbit = HPIC_INT_TO_REGBIT(irq); 198 199 if (enable) 200 sc->sc_softreg[roffset] |= (1 << rbit); 201 else 202 sc->sc_softreg[roffset] &= ~(1 << rbit); 203 204 hrowpic_write_reg(sc, HPIC_ENABLE, roffset, sc->sc_softreg[roffset]); 205 } 206 207 /* 208 * PIC I/F methods. 209 */ 210 211 static void 212 hrowpic_dispatch(device_t dev, struct trapframe *tf) 213 { 214 struct hrowpic_softc *sc; 215 uint64_t mask; 216 uint32_t reg; 217 u_int irq; 218 219 sc = device_get_softc(dev); 220 while (1) { 221 mask = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_SECONDARY); 222 reg = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_PRIMARY); 223 mask = (mask << 32) | reg; 224 if (mask == 0) 225 break; 226 227 irq = 0; 228 while (irq < HROWPIC_IRQMAX) { 229 if (mask & 1) 230 powerpc_dispatch_intr(sc->sc_vector[irq], tf); 231 mask >>= 1; 232 irq++; 233 } 234 } 235 } 236 237 static void 238 hrowpic_enable(device_t dev, u_int irq, u_int vector) 239 { 240 struct hrowpic_softc *sc; 241 242 sc = device_get_softc(dev); 243 sc->sc_vector[irq] = vector; 244 hrowpic_toggle_irq(sc, irq, 1); 245 } 246 247 static void 248 hrowpic_eoi(device_t dev, u_int irq) 249 { 250 struct hrowpic_softc *sc; 251 int bank; 252 253 sc = device_get_softc(dev); 254 bank = (irq >= 32) ? HPIC_SECONDARY : HPIC_PRIMARY ; 255 hrowpic_write_reg(sc, HPIC_CLEAR, bank, 1U << (irq & 0x1f)); 256 } 257 258 static void 259 hrowpic_ipi(device_t dev, u_int irq) 260 { 261 /* No SMP support. */ 262 } 263 264 static void 265 hrowpic_mask(device_t dev, u_int irq) 266 { 267 struct hrowpic_softc *sc; 268 269 sc = device_get_softc(dev); 270 hrowpic_toggle_irq(sc, irq, 0); 271 } 272 273 static void 274 hrowpic_unmask(device_t dev, u_int irq) 275 { 276 struct hrowpic_softc *sc; 277 278 sc = device_get_softc(dev); 279 hrowpic_toggle_irq(sc, irq, 1); 280 } 281