xref: /freebsd/sys/powerpc/ofw/ofw_pcibus.c (revision febdb468801f35e51c6c5c22221cfce9197c6f3b)
1 /*-
2  * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
3  * Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
4  * Copyright (c) 2000, BSDi
5  * Copyright (c) 2003, Thomas Moestl <tmm@FreeBSD.org>
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice unmodified, this list of conditions, and the following
13  *    disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32 
33 #include <sys/param.h>
34 #include <sys/bus.h>
35 #include <sys/kernel.h>
36 #include <sys/libkern.h>
37 #include <sys/module.h>
38 #include <sys/pciio.h>
39 
40 #include <dev/ofw/ofw_bus.h>
41 #include <dev/ofw/ofw_bus_subr.h>
42 #include <dev/ofw/ofw_pci.h>
43 #include <dev/ofw/openfirm.h>
44 
45 #include <machine/bus.h>
46 #include <machine/intr_machdep.h>
47 #include <machine/resource.h>
48 
49 #include <dev/pci/pcireg.h>
50 #include <dev/pci/pcivar.h>
51 #include <dev/pci/pci_private.h>
52 
53 #include "pcib_if.h"
54 #include "pci_if.h"
55 
56 typedef uint32_t ofw_pci_intr_t;
57 
58 /* Methods */
59 static device_probe_t ofw_pcibus_probe;
60 static device_attach_t ofw_pcibus_attach;
61 static pci_assign_interrupt_t ofw_pcibus_assign_interrupt;
62 static ofw_bus_get_devinfo_t ofw_pcibus_get_devinfo;
63 static int ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child,
64     char *buf, size_t buflen);
65 
66 static void ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno);
67 static void ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno);
68 
69 static device_method_t ofw_pcibus_methods[] = {
70 	/* Device interface */
71 	DEVMETHOD(device_probe,		ofw_pcibus_probe),
72 	DEVMETHOD(device_attach,	ofw_pcibus_attach),
73 
74 	/* Bus interface */
75 	DEVMETHOD(bus_child_pnpinfo_str, ofw_pcibus_child_pnpinfo_str_method),
76 
77 	/* PCI interface */
78 	DEVMETHOD(pci_assign_interrupt, ofw_pcibus_assign_interrupt),
79 
80 	/* ofw_bus interface */
81 	DEVMETHOD(ofw_bus_get_devinfo,	ofw_pcibus_get_devinfo),
82 	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
83 	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
84 	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
85 	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
86 	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
87 
88 	{ 0, 0 }
89 };
90 
91 struct ofw_pcibus_devinfo {
92 	struct pci_devinfo	opd_dinfo;
93 	struct ofw_bus_devinfo	opd_obdinfo;
94 };
95 
96 static devclass_t pci_devclass;
97 
98 DEFINE_CLASS_1(pci, ofw_pcibus_driver, ofw_pcibus_methods,
99     sizeof(struct pci_softc), pci_driver);
100 DRIVER_MODULE(ofw_pcibus, pcib, ofw_pcibus_driver, pci_devclass, 0, 0);
101 MODULE_VERSION(ofw_pcibus, 1);
102 MODULE_DEPEND(ofw_pcibus, pci, 1, 1, 1);
103 
104 static int ofw_devices_only = 0;
105 TUNABLE_INT("hw.pci.ofw_devices_only", &ofw_devices_only);
106 
107 static int
108 ofw_pcibus_probe(device_t dev)
109 {
110 
111 	if (ofw_bus_get_node(dev) == -1)
112 		return (ENXIO);
113 	device_set_desc(dev, "OFW PCI bus");
114 
115 	return (BUS_PROBE_DEFAULT);
116 }
117 
118 static int
119 ofw_pcibus_attach(device_t dev)
120 {
121 	u_int busno, domain;
122 	int error;
123 
124 	error = pci_attach_common(dev);
125 	if (error)
126 		return (error);
127 	domain = pcib_get_domain(dev);
128 	busno = pcib_get_bus(dev);
129 
130 	/*
131 	 * Attach those children represented in the device tree.
132 	 */
133 
134 	ofw_pcibus_enum_devtree(dev, domain, busno);
135 
136 	/*
137 	 * We now attach any laggard devices. FDT, for instance, allows
138 	 * the device tree to enumerate only some PCI devices. Apple's
139 	 * OF device tree on some Grackle-based hardware can also miss
140 	 * functions on multi-function cards.
141 	 */
142 
143 	if (!ofw_devices_only)
144 		ofw_pcibus_enum_bus(dev, domain, busno);
145 
146 	return (bus_generic_attach(dev));
147 }
148 
149 static void
150 ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno)
151 {
152 	device_t pcib;
153 	struct ofw_pci_register pcir;
154 	struct ofw_pcibus_devinfo *dinfo;
155 	phandle_t node, child;
156 	u_int func, slot;
157 	int intline;
158 
159 	pcib = device_get_parent(dev);
160 	node = ofw_bus_get_node(dev);
161 
162 	for (child = OF_child(node); child != 0; child = OF_peer(child)) {
163 		if (OF_getprop(child, "reg", &pcir, sizeof(pcir)) == -1)
164 			continue;
165 		slot = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi);
166 		func = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi);
167 
168 		/* Some OFW device trees contain dupes. */
169 		if (pci_find_dbsf(domain, busno, slot, func) != NULL)
170 			continue;
171 
172 		/*
173 		 * The preset in the intline register is usually bogus.  Reset
174 		 * it such that the PCI code will reroute the interrupt if
175 		 * needed.
176 		 */
177 
178 		intline = PCI_INVALID_IRQ;
179 		if (OF_getproplen(child, "interrupts") > 0)
180 			intline = 0;
181 		PCIB_WRITE_CONFIG(pcib, busno, slot, func, PCIR_INTLINE,
182 		    intline, 1);
183 
184 		/*
185 		 * Now set up the PCI and OFW bus layer devinfo and add it
186 		 * to the PCI bus.
187 		 */
188 
189 		dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(pcib,
190 		    domain, busno, slot, func, sizeof(*dinfo));
191 		if (dinfo == NULL)
192 			continue;
193 		if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) !=
194 		    0) {
195 			pci_freecfg((struct pci_devinfo *)dinfo);
196 			continue;
197 		}
198 		pci_add_child(dev, (struct pci_devinfo *)dinfo);
199 
200 		/*
201 		 * Some devices don't have an intpin set, but do have
202 		 * interrupts. These are fully specified, and set in the
203 		 * interrupts property, so add that value to the device's
204 		 * resource list.
205 		 */
206 		if (dinfo->opd_dinfo.cfg.intpin == 0) {
207 			ofw_pci_intr_t intr[2];
208 			phandle_t iparent;
209 			int icells;
210 
211 			if (OF_getprop(child, "interrupts", &intr,
212 			    sizeof(intr)) > 0) {
213 				iparent = 0;
214 				icells = 1;
215 				OF_getprop(child, "interrupt-parent", &iparent,
216 				    sizeof(iparent));
217 				if (iparent != 0) {
218 					OF_getprop(OF_xref_phandle(iparent),
219 					    "#interrupt-cells", &icells,
220 					    sizeof(icells));
221 					intr[0] = MAP_IRQ(iparent, intr[0]);
222 				}
223 
224 				if (iparent != 0 && icells > 1) {
225 					powerpc_config_intr(intr[0],
226 					    (intr[1] & 1) ? INTR_TRIGGER_LEVEL :
227 					    INTR_TRIGGER_EDGE,
228 					    INTR_POLARITY_LOW);
229 				}
230 
231 				resource_list_add(&dinfo->opd_dinfo.resources,
232 				    SYS_RES_IRQ, 0, intr[0], intr[0], 1);
233 			}
234 		}
235 	}
236 }
237 
238 /*
239  * The following is an almost exact clone of pci_add_children(), with the
240  * addition that it (a) will not add children that have already been added,
241  * and (b) will set up the OFW devinfo to point to invalid values. This is
242  * to handle non-enumerated PCI children as exist in FDT and on the second
243  * function of the Rage 128 in my Blue & White G3.
244  */
245 
246 static void
247 ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno)
248 {
249 	device_t pcib;
250 	struct ofw_pcibus_devinfo *dinfo;
251 	int maxslots;
252 	int s, f, pcifunchigh;
253 	uint8_t hdrtype;
254 
255 	pcib = device_get_parent(dev);
256 
257 	maxslots = PCIB_MAXSLOTS(pcib);
258 	for (s = 0; s <= maxslots; s++) {
259 		pcifunchigh = 0;
260 		f = 0;
261 		DELAY(1);
262 		hdrtype = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_HDRTYPE, 1);
263 		if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
264 			continue;
265 		if (hdrtype & PCIM_MFDEV)
266 			pcifunchigh = PCI_FUNCMAX;
267 		for (f = 0; f <= pcifunchigh; f++) {
268 			/* Filter devices we have already added */
269 			if (pci_find_dbsf(domain, busno, s, f) != NULL)
270 				continue;
271 
272 			dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(
273 			    pcib, domain, busno, s, f, sizeof(*dinfo));
274 			if (dinfo == NULL)
275 				continue;
276 
277 			dinfo->opd_obdinfo.obd_node = -1;
278 
279 			dinfo->opd_obdinfo.obd_name = NULL;
280 			dinfo->opd_obdinfo.obd_compat = NULL;
281 			dinfo->opd_obdinfo.obd_type = NULL;
282 			dinfo->opd_obdinfo.obd_model = NULL;
283 
284 			/*
285 			 * For non OFW-devices, don't believe 0
286 			 * for an interrupt.
287 			 */
288 			if (dinfo->opd_dinfo.cfg.intline == 0) {
289 				dinfo->opd_dinfo.cfg.intline = PCI_INVALID_IRQ;
290 				PCIB_WRITE_CONFIG(pcib, busno, s, f,
291 				    PCIR_INTLINE, PCI_INVALID_IRQ, 1);
292 			}
293 
294 			pci_add_child(dev, (struct pci_devinfo *)dinfo);
295 		}
296 	}
297 }
298 
299 static int
300 ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child, char *buf,
301     size_t buflen)
302 {
303 	pci_child_pnpinfo_str_method(cbdev, child, buf, buflen);
304 
305 	if (ofw_bus_get_node(child) != -1)  {
306 		strlcat(buf, " ", buflen); /* Separate info */
307 		ofw_bus_gen_child_pnpinfo_str(cbdev, child, buf, buflen);
308 	}
309 
310 	return (0);
311 }
312 
313 static int
314 ofw_pcibus_assign_interrupt(device_t dev, device_t child)
315 {
316 	ofw_pci_intr_t intr;
317 	phandle_t node, iparent;
318 	int isz;
319 
320 	node = ofw_bus_get_node(child);
321 
322 	if (node == -1) {
323 		/* Non-firmware enumerated child, use standard routing */
324 
325 		/*
326 		 * XXX: Right now we don't have anything sensible to do here,
327 		 * since the ofw_imap stuff relies on nodes having a reg
328 		 * property. There exist ways around this, so the ePAPR
329 		 * spec will need to be studied.
330 		 */
331 
332 		return (PCI_INVALID_IRQ);
333 
334 #ifdef NOTYET
335 		intr = pci_get_intpin(child);
336 		return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child,
337 		    intr));
338 #endif
339 	}
340 
341 	/*
342 	 * Try to determine the node's interrupt parent so we know which
343 	 * PIC to use.
344 	 */
345 
346 	iparent = -1;
347 	if (OF_getprop(node, "interrupt-parent", &iparent, sizeof(iparent)) < 0)
348 		iparent = -1;
349 
350 	/*
351 	 * Any AAPL,interrupts property gets priority and is
352 	 * fully specified (i.e. does not need routing)
353 	 */
354 
355 	isz = OF_getprop(node, "AAPL,interrupts", &intr, sizeof(intr));
356 	if (isz == sizeof(intr))
357 		return ((iparent == -1) ? intr : MAP_IRQ(iparent, intr));
358 
359 	isz = OF_getprop(node, "interrupts", &intr, sizeof(intr));
360 	if (isz == sizeof(intr)) {
361 		if (iparent != -1)
362 			intr = MAP_IRQ(iparent, intr);
363 	} else {
364 		/* No property: our best guess is the intpin. */
365 		intr = pci_get_intpin(child);
366 	}
367 
368 	/*
369 	 * If we got intr from a property, it may or may not be an intpin.
370 	 * For on-board devices, it frequently is not, and is completely out
371 	 * of the valid intpin range.  For PCI slots, it hopefully is,
372 	 * otherwise we will have trouble interfacing with non-OFW buses
373 	 * such as cardbus.
374 	 * Since we cannot tell which it is without violating layering, we
375 	 * will always use the route_interrupt method, and treat exceptions
376 	 * on the level they become apparent.
377 	 */
378 	return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, intr));
379 }
380 
381 static const struct ofw_bus_devinfo *
382 ofw_pcibus_get_devinfo(device_t bus, device_t dev)
383 {
384 	struct ofw_pcibus_devinfo *dinfo;
385 
386 	dinfo = device_get_ivars(dev);
387 	return (&dinfo->opd_obdinfo);
388 }
389 
390