xref: /freebsd/sys/powerpc/ofw/ofw_pcibus.c (revision ab0b9f6b3073e6c4d1dfbf07444d7db67a189a96)
1 /*-
2  * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
3  * Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
4  * Copyright (c) 2000, BSDi
5  * Copyright (c) 2003, Thomas Moestl <tmm@FreeBSD.org>
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice unmodified, this list of conditions, and the following
13  *    disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32 
33 #include <sys/param.h>
34 #include <sys/bus.h>
35 #include <sys/kernel.h>
36 #include <sys/libkern.h>
37 #include <sys/module.h>
38 #include <sys/pciio.h>
39 
40 #include <dev/ofw/ofw_bus.h>
41 #include <dev/ofw/ofw_bus_subr.h>
42 #include <dev/ofw/ofw_pci.h>
43 #include <dev/ofw/openfirm.h>
44 
45 #include <machine/bus.h>
46 #include <machine/intr_machdep.h>
47 #include <machine/resource.h>
48 
49 #include <dev/pci/pcireg.h>
50 #include <dev/pci/pcivar.h>
51 #include <dev/pci/pci_private.h>
52 
53 #include "ofw_pcibus.h"
54 #include "pcib_if.h"
55 #include "pci_if.h"
56 
57 typedef uint32_t ofw_pci_intr_t;
58 
59 /* Methods */
60 static device_probe_t ofw_pcibus_probe;
61 static device_attach_t ofw_pcibus_attach;
62 static pci_assign_interrupt_t ofw_pcibus_assign_interrupt;
63 static ofw_bus_get_devinfo_t ofw_pcibus_get_devinfo;
64 static int ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child,
65     char *buf, size_t buflen);
66 
67 static void ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno);
68 static void ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno);
69 
70 static device_method_t ofw_pcibus_methods[] = {
71 	/* Device interface */
72 	DEVMETHOD(device_probe,		ofw_pcibus_probe),
73 	DEVMETHOD(device_attach,	ofw_pcibus_attach),
74 
75 	/* Bus interface */
76 	DEVMETHOD(bus_child_pnpinfo_str, ofw_pcibus_child_pnpinfo_str_method),
77 
78 	/* PCI interface */
79 	DEVMETHOD(pci_assign_interrupt, ofw_pcibus_assign_interrupt),
80 
81 	/* ofw_bus interface */
82 	DEVMETHOD(ofw_bus_get_devinfo,	ofw_pcibus_get_devinfo),
83 	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
84 	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
85 	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
86 	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
87 	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
88 
89 	DEVMETHOD_END
90 };
91 
92 static devclass_t pci_devclass;
93 
94 DEFINE_CLASS_1(pci, ofw_pcibus_driver, ofw_pcibus_methods,
95     sizeof(struct pci_softc), pci_driver);
96 DRIVER_MODULE(ofw_pcibus, pcib, ofw_pcibus_driver, pci_devclass, 0, 0);
97 MODULE_VERSION(ofw_pcibus, 1);
98 MODULE_DEPEND(ofw_pcibus, pci, 1, 1, 1);
99 
100 static int ofw_devices_only = 0;
101 TUNABLE_INT("hw.pci.ofw_devices_only", &ofw_devices_only);
102 
103 static int
104 ofw_pcibus_probe(device_t dev)
105 {
106 
107 	if (ofw_bus_get_node(dev) == -1)
108 		return (ENXIO);
109 	device_set_desc(dev, "OFW PCI bus");
110 
111 	return (BUS_PROBE_DEFAULT);
112 }
113 
114 static int
115 ofw_pcibus_attach(device_t dev)
116 {
117 	u_int busno, domain;
118 	int error;
119 
120 	error = pci_attach_common(dev);
121 	if (error)
122 		return (error);
123 	domain = pcib_get_domain(dev);
124 	busno = pcib_get_bus(dev);
125 
126 	/*
127 	 * Attach those children represented in the device tree.
128 	 */
129 
130 	ofw_pcibus_enum_devtree(dev, domain, busno);
131 
132 	/*
133 	 * We now attach any laggard devices. FDT, for instance, allows
134 	 * the device tree to enumerate only some PCI devices. Apple's
135 	 * OF device tree on some Grackle-based hardware can also miss
136 	 * functions on multi-function cards.
137 	 */
138 
139 	if (!ofw_devices_only)
140 		ofw_pcibus_enum_bus(dev, domain, busno);
141 
142 	return (bus_generic_attach(dev));
143 }
144 
145 static void
146 ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno)
147 {
148 	device_t pcib;
149 	struct ofw_pci_register pcir;
150 	struct ofw_pcibus_devinfo *dinfo;
151 	phandle_t node, child;
152 	u_int func, slot;
153 	int intline;
154 
155 	pcib = device_get_parent(dev);
156 	node = ofw_bus_get_node(dev);
157 
158 	for (child = OF_child(node); child != 0; child = OF_peer(child)) {
159 		if (OF_getprop(child, "reg", &pcir, sizeof(pcir)) == -1)
160 			continue;
161 		slot = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi);
162 		func = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi);
163 
164 		/* Some OFW device trees contain dupes. */
165 		if (pci_find_dbsf(domain, busno, slot, func) != NULL)
166 			continue;
167 
168 		/*
169 		 * The preset in the intline register is usually bogus.  Reset
170 		 * it such that the PCI code will reroute the interrupt if
171 		 * needed.
172 		 */
173 
174 		intline = PCI_INVALID_IRQ;
175 		if (OF_getproplen(child, "interrupts") > 0)
176 			intline = 0;
177 		PCIB_WRITE_CONFIG(pcib, busno, slot, func, PCIR_INTLINE,
178 		    intline, 1);
179 
180 		/*
181 		 * Now set up the PCI and OFW bus layer devinfo and add it
182 		 * to the PCI bus.
183 		 */
184 
185 		dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(pcib,
186 		    domain, busno, slot, func, sizeof(*dinfo));
187 		if (dinfo == NULL)
188 			continue;
189 		if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) !=
190 		    0) {
191 			pci_freecfg((struct pci_devinfo *)dinfo);
192 			continue;
193 		}
194 		dinfo->opd_dma_tag = NULL;
195 		pci_add_child(dev, (struct pci_devinfo *)dinfo);
196 
197 		/*
198 		 * Some devices don't have an intpin set, but do have
199 		 * interrupts. These are fully specified, and set in the
200 		 * interrupts property, so add that value to the device's
201 		 * resource list.
202 		 */
203 		if (dinfo->opd_dinfo.cfg.intpin == 0) {
204 			ofw_pci_intr_t intr[2];
205 			phandle_t iparent;
206 			int icells;
207 
208 			if (OF_getprop(child, "interrupts", &intr,
209 			    sizeof(intr)) > 0) {
210 				iparent = 0;
211 				icells = 1;
212 				OF_getprop(child, "interrupt-parent", &iparent,
213 				    sizeof(iparent));
214 				if (iparent != 0) {
215 					OF_getprop(OF_xref_phandle(iparent),
216 					    "#interrupt-cells", &icells,
217 					    sizeof(icells));
218 					intr[0] = ofw_bus_map_intr(dev, iparent,
219 					    intr[0]);
220 				}
221 
222 				if (iparent != 0 && icells > 1)
223 					ofw_bus_config_intr(dev, intr[0],
224 					    intr[1]);
225 
226 				resource_list_add(&dinfo->opd_dinfo.resources,
227 				    SYS_RES_IRQ, 0, intr[0], intr[0], 1);
228 			}
229 		}
230 	}
231 }
232 
233 /*
234  * The following is an almost exact clone of pci_add_children(), with the
235  * addition that it (a) will not add children that have already been added,
236  * and (b) will set up the OFW devinfo to point to invalid values. This is
237  * to handle non-enumerated PCI children as exist in FDT and on the second
238  * function of the Rage 128 in my Blue & White G3.
239  */
240 
241 static void
242 ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno)
243 {
244 	device_t pcib;
245 	struct ofw_pcibus_devinfo *dinfo;
246 	int maxslots;
247 	int s, f, pcifunchigh;
248 	uint8_t hdrtype;
249 
250 	pcib = device_get_parent(dev);
251 
252 	maxslots = PCIB_MAXSLOTS(pcib);
253 	for (s = 0; s <= maxslots; s++) {
254 		pcifunchigh = 0;
255 		f = 0;
256 		DELAY(1);
257 		hdrtype = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_HDRTYPE, 1);
258 		if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
259 			continue;
260 		if (hdrtype & PCIM_MFDEV)
261 			pcifunchigh = PCI_FUNCMAX;
262 		for (f = 0; f <= pcifunchigh; f++) {
263 			/* Filter devices we have already added */
264 			if (pci_find_dbsf(domain, busno, s, f) != NULL)
265 				continue;
266 
267 			dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(
268 			    pcib, domain, busno, s, f, sizeof(*dinfo));
269 			if (dinfo == NULL)
270 				continue;
271 
272 			dinfo->opd_dma_tag = NULL;
273 			dinfo->opd_obdinfo.obd_node = -1;
274 
275 			dinfo->opd_obdinfo.obd_name = NULL;
276 			dinfo->opd_obdinfo.obd_compat = NULL;
277 			dinfo->opd_obdinfo.obd_type = NULL;
278 			dinfo->opd_obdinfo.obd_model = NULL;
279 
280 			/*
281 			 * For non OFW-devices, don't believe 0
282 			 * for an interrupt.
283 			 */
284 			if (dinfo->opd_dinfo.cfg.intline == 0) {
285 				dinfo->opd_dinfo.cfg.intline = PCI_INVALID_IRQ;
286 				PCIB_WRITE_CONFIG(pcib, busno, s, f,
287 				    PCIR_INTLINE, PCI_INVALID_IRQ, 1);
288 			}
289 
290 			pci_add_child(dev, (struct pci_devinfo *)dinfo);
291 		}
292 	}
293 }
294 
295 static int
296 ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child, char *buf,
297     size_t buflen)
298 {
299 	pci_child_pnpinfo_str_method(cbdev, child, buf, buflen);
300 
301 	if (ofw_bus_get_node(child) != -1)  {
302 		strlcat(buf, " ", buflen); /* Separate info */
303 		ofw_bus_gen_child_pnpinfo_str(cbdev, child, buf, buflen);
304 	}
305 
306 	return (0);
307 }
308 
309 static int
310 ofw_pcibus_assign_interrupt(device_t dev, device_t child)
311 {
312 	ofw_pci_intr_t intr;
313 	phandle_t node, iparent;
314 	int isz;
315 
316 	node = ofw_bus_get_node(child);
317 
318 	if (node == -1) {
319 		/* Non-firmware enumerated child, use standard routing */
320 
321 		intr = pci_get_intpin(child);
322 		return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child,
323 		    intr));
324 	}
325 
326 	/*
327 	 * Try to determine the node's interrupt parent so we know which
328 	 * PIC to use.
329 	 */
330 
331 	iparent = -1;
332 	if (OF_getprop(node, "interrupt-parent", &iparent, sizeof(iparent)) < 0)
333 		iparent = -1;
334 
335 	/*
336 	 * Any AAPL,interrupts property gets priority and is
337 	 * fully specified (i.e. does not need routing)
338 	 */
339 
340 	isz = OF_getprop(node, "AAPL,interrupts", &intr, sizeof(intr));
341 	if (isz == sizeof(intr))
342 		return ((iparent == -1) ? intr : ofw_bus_map_intr(dev, iparent,
343 		    intr));
344 
345 	isz = OF_getprop(node, "interrupts", &intr, sizeof(intr));
346 	if (isz == sizeof(intr)) {
347 		if (iparent != -1)
348 			intr = ofw_bus_map_intr(dev, iparent, intr);
349 	} else {
350 		/* No property: our best guess is the intpin. */
351 		intr = pci_get_intpin(child);
352 	}
353 
354 	/*
355 	 * If we got intr from a property, it may or may not be an intpin.
356 	 * For on-board devices, it frequently is not, and is completely out
357 	 * of the valid intpin range.  For PCI slots, it hopefully is,
358 	 * otherwise we will have trouble interfacing with non-OFW buses
359 	 * such as cardbus.
360 	 * Since we cannot tell which it is without violating layering, we
361 	 * will always use the route_interrupt method, and treat exceptions
362 	 * on the level they become apparent.
363 	 */
364 	return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, intr));
365 }
366 
367 static const struct ofw_bus_devinfo *
368 ofw_pcibus_get_devinfo(device_t bus, device_t dev)
369 {
370 	struct ofw_pcibus_devinfo *dinfo;
371 
372 	dinfo = device_get_ivars(dev);
373 	return (&dinfo->opd_obdinfo);
374 }
375 
376