1 /*- 2 * Copyright (c) 2000 Michael Smith 3 * Copyright (c) 2000 BSDi 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #include <sys/param.h> 31 #include <sys/module.h> 32 #include <sys/bus.h> 33 #include <sys/malloc.h> 34 #include <sys/kernel.h> 35 36 #include <dev/ofw/openfirm.h> 37 #include <dev/ofw/ofw_pci.h> 38 #include <dev/ofw/ofw_bus.h> 39 #include <dev/ofw/ofw_bus_subr.h> 40 41 #include <dev/pci/pcivar.h> 42 #include <dev/pci/pcireg.h> 43 #include <dev/pci/pcib_private.h> 44 45 #include <machine/intr_machdep.h> 46 47 #include "pcib_if.h" 48 49 static int ofw_pcib_pci_probe(device_t bus); 50 static int ofw_pcib_pci_attach(device_t bus); 51 static phandle_t ofw_pcib_pci_get_node(device_t bus, device_t dev); 52 static int ofw_pcib_pci_route_interrupt(device_t bridge, device_t dev, 53 int intpin); 54 55 static device_method_t ofw_pcib_pci_methods[] = { 56 /* Device interface */ 57 DEVMETHOD(device_probe, ofw_pcib_pci_probe), 58 DEVMETHOD(device_attach, ofw_pcib_pci_attach), 59 DEVMETHOD(device_shutdown, bus_generic_shutdown), 60 DEVMETHOD(device_suspend, bus_generic_suspend), 61 DEVMETHOD(device_resume, bus_generic_resume), 62 63 /* Bus interface */ 64 DEVMETHOD(bus_print_child, bus_generic_print_child), 65 DEVMETHOD(bus_read_ivar, pcib_read_ivar), 66 DEVMETHOD(bus_write_ivar, pcib_write_ivar), 67 DEVMETHOD(bus_alloc_resource, pcib_alloc_resource), 68 DEVMETHOD(bus_release_resource, bus_generic_release_resource), 69 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 70 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 71 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 72 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 73 74 /* pcib interface */ 75 DEVMETHOD(pcib_maxslots, pcib_maxslots), 76 DEVMETHOD(pcib_read_config, pcib_read_config), 77 DEVMETHOD(pcib_write_config, pcib_write_config), 78 DEVMETHOD(pcib_route_interrupt, ofw_pcib_pci_route_interrupt), 79 DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi), 80 DEVMETHOD(pcib_release_msi, pcib_release_msi), 81 DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix), 82 DEVMETHOD(pcib_release_msix, pcib_release_msix), 83 DEVMETHOD(pcib_map_msi, pcib_map_msi), 84 85 /* ofw_bus interface */ 86 DEVMETHOD(ofw_bus_get_node, ofw_pcib_pci_get_node), 87 88 {0, 0} 89 }; 90 91 static devclass_t pcib_devclass; 92 93 struct ofw_pcib_softc { 94 /* 95 * This is here so that we can use pci bridge methods, too - the 96 * generic routines only need the dev, secbus and subbus members 97 * filled. 98 */ 99 struct pcib_softc ops_pcib_sc; 100 phandle_t ops_node; 101 struct ofw_bus_iinfo ops_iinfo; 102 }; 103 104 105 DEFINE_CLASS_0(pcib, ofw_pcib_pci_driver, ofw_pcib_pci_methods, 106 sizeof(struct ofw_pcib_softc)); 107 DRIVER_MODULE(ofw_pcib, pci, ofw_pcib_pci_driver, pcib_devclass, 0, 0); 108 109 static int 110 ofw_pcib_pci_probe(device_t dev) 111 { 112 113 if ((pci_get_class(dev) != PCIC_BRIDGE) || 114 (pci_get_subclass(dev) != PCIS_BRIDGE_PCI)) { 115 return (ENXIO); 116 } 117 118 if (ofw_bus_get_node(dev) == 0) 119 return (ENXIO); 120 121 device_set_desc(dev, "OFW PCI-PCI bridge"); 122 return (0); 123 } 124 125 static int 126 ofw_pcib_pci_attach(device_t dev) 127 { 128 struct ofw_pcib_softc *sc; 129 130 sc = device_get_softc(dev); 131 sc->ops_pcib_sc.dev = dev; 132 sc->ops_node = ofw_bus_get_node(dev); 133 134 ofw_bus_setup_iinfo(sc->ops_node, &sc->ops_iinfo, 135 sizeof(cell_t)); 136 137 pcib_attach_common(dev); 138 139 device_add_child(dev, "pci", -1); 140 141 return (bus_generic_attach(dev)); 142 } 143 144 static phandle_t 145 ofw_pcib_pci_get_node(device_t bridge, device_t dev) 146 { 147 /* We have only one child, the PCI bus, so pass it our node */ 148 149 return (ofw_bus_get_node(bridge)); 150 } 151 152 static int 153 ofw_pcib_pci_route_interrupt(device_t bridge, device_t dev, int intpin) 154 { 155 struct ofw_pcib_softc *sc; 156 struct ofw_bus_iinfo *ii; 157 struct ofw_pci_register reg; 158 cell_t pintr, mintr; 159 phandle_t iparent; 160 uint8_t maskbuf[sizeof(reg) + sizeof(pintr)]; 161 162 sc = device_get_softc(bridge); 163 ii = &sc->ops_iinfo; 164 if (ii->opi_imapsz > 0) { 165 pintr = intpin; 166 if (ofw_bus_lookup_imap(ofw_bus_get_node(dev), ii, ®, 167 sizeof(reg), &pintr, sizeof(pintr), &mintr, sizeof(mintr), 168 &iparent, maskbuf)) { 169 /* 170 * If we've found a mapping, return it and don't map 171 * it again on higher levels - that causes problems 172 * in some cases, and never seems to be required. 173 */ 174 return (MAP_IRQ(iparent, mintr)); 175 } 176 } else if (intpin >= 1 && intpin <= 4) { 177 /* 178 * When an interrupt map is missing, we need to do the 179 * standard PCI swizzle and continue mapping at the parent. 180 */ 181 return (pcib_route_interrupt(bridge, dev, intpin)); 182 } 183 return (PCIB_ROUTE_INTERRUPT(device_get_parent(device_get_parent( 184 bridge)), bridge, intpin)); 185 } 186 187