xref: /freebsd/sys/powerpc/ofw/ofw_machdep.c (revision 3823d5e198425b4f5e5a80267d195769d1063773)
1 /*-
2  * Copyright (C) 1996 Wolfgang Solfrank.
3  * Copyright (C) 1996 TooLs GmbH.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed by TooLs GmbH.
17  * 4. The name of TooLs GmbH may not be used to endorse or promote products
18  *    derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  *
31  * $NetBSD: ofw_machdep.c,v 1.5 2000/05/23 13:25:43 tsubai Exp $
32  */
33 
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
36 
37 #include <sys/param.h>
38 #include <sys/bus.h>
39 #include <sys/systm.h>
40 #include <sys/conf.h>
41 #include <sys/disk.h>
42 #include <sys/fcntl.h>
43 #include <sys/malloc.h>
44 #include <sys/smp.h>
45 #include <sys/stat.h>
46 
47 #include <net/ethernet.h>
48 
49 #include <dev/ofw/openfirm.h>
50 #include <dev/ofw/ofw_pci.h>
51 #include <dev/ofw/ofw_bus.h>
52 
53 #include <vm/vm.h>
54 #include <vm/vm_param.h>
55 #include <vm/vm_page.h>
56 
57 #include <machine/bus.h>
58 #include <machine/cpu.h>
59 #include <machine/md_var.h>
60 #include <machine/platform.h>
61 #include <machine/ofw_machdep.h>
62 #include <machine/trap.h>
63 
64 #ifdef AIM
65 extern register_t ofmsr[5];
66 extern void	*openfirmware_entry;
67 static void	*fdt;
68 int		ofw_real_mode;
69 extern char     save_trap_init[0x2f00];          /* EXC_LAST */
70 char            save_trap_of[0x2f00];            /* EXC_LAST */
71 
72 int		ofwcall(void *);
73 static int	openfirmware(void *args);
74 
75 __inline void
76 ofw_save_trap_vec(char *save_trap_vec)
77 {
78 	if (!ofw_real_mode)
79                 return;
80 
81 	bcopy((void *)EXC_RST, save_trap_vec, EXC_LAST - EXC_RST);
82 }
83 
84 static __inline void
85 ofw_restore_trap_vec(char *restore_trap_vec)
86 {
87 	if (!ofw_real_mode)
88                 return;
89 
90 	bcopy(restore_trap_vec, (void *)EXC_RST, EXC_LAST - EXC_RST);
91 	__syncicache(EXC_RSVD, EXC_LAST - EXC_RSVD);
92 }
93 
94 /*
95  * Saved SPRG0-3 from OpenFirmware. Will be restored prior to the callback.
96  */
97 register_t	ofw_sprg0_save;
98 
99 static __inline void
100 ofw_sprg_prepare(void)
101 {
102 	if (ofw_real_mode)
103 		return;
104 
105 	/*
106 	 * Assume that interrupt are disabled at this point, or
107 	 * SPRG1-3 could be trashed
108 	 */
109 	__asm __volatile("mfsprg0 %0\n\t"
110 			 "mtsprg0 %1\n\t"
111 	    		 "mtsprg1 %2\n\t"
112 	    		 "mtsprg2 %3\n\t"
113 			 "mtsprg3 %4\n\t"
114 			 : "=&r"(ofw_sprg0_save)
115 			 : "r"(ofmsr[1]),
116 			 "r"(ofmsr[2]),
117 			 "r"(ofmsr[3]),
118 			 "r"(ofmsr[4]));
119 }
120 
121 static __inline void
122 ofw_sprg_restore(void)
123 {
124 	if (ofw_real_mode)
125 		return;
126 
127 	/*
128 	 * Note that SPRG1-3 contents are irrelevant. They are scratch
129 	 * registers used in the early portion of trap handling when
130 	 * interrupts are disabled.
131 	 *
132 	 * PCPU data cannot be used until this routine is called !
133 	 */
134 	__asm __volatile("mtsprg0 %0" :: "r"(ofw_sprg0_save));
135 }
136 #endif
137 
138 static int
139 parse_ofw_memory(phandle_t node, const char *prop, struct mem_region *output)
140 {
141 	cell_t address_cells, size_cells;
142 	cell_t OFmem[4 * PHYS_AVAIL_SZ];
143 	int sz, i, j;
144 	int apple_hack_mode;
145 	phandle_t phandle;
146 
147 	sz = 0;
148 	apple_hack_mode = 0;
149 
150 	/*
151 	 * Get #address-cells from root node, defaulting to 1 if it cannot
152 	 * be found.
153 	 */
154 	phandle = OF_finddevice("/");
155 	if (OF_getprop(phandle, "#address-cells", &address_cells,
156 	    sizeof(address_cells)) < (ssize_t)sizeof(address_cells))
157 		address_cells = 1;
158 	if (OF_getprop(phandle, "#size-cells", &size_cells,
159 	    sizeof(size_cells)) < (ssize_t)sizeof(size_cells))
160 		size_cells = 1;
161 
162 	/*
163 	 * Get memory.
164 	 */
165 	if (node == -1 || (sz = OF_getprop(node, prop,
166 	    OFmem, sizeof(OFmem))) <= 0)
167 		panic("Physical memory map not found");
168 
169 	i = 0;
170 	j = 0;
171 	while (i < sz/sizeof(cell_t)) {
172 	      #ifndef __powerpc64__
173 		/* On 32-bit PPC, ignore regions starting above 4 GB */
174 		if (address_cells > 1 && OFmem[i] > 0) {
175 			i += address_cells + size_cells;
176 			continue;
177 		}
178 	      #endif
179 
180 		output[j].mr_start = OFmem[i++];
181 		if (address_cells == 2) {
182 			#ifdef __powerpc64__
183 			output[j].mr_start <<= 32;
184 			#endif
185 			output[j].mr_start += OFmem[i++];
186 		}
187 
188 		output[j].mr_size = OFmem[i++];
189 		if (size_cells == 2) {
190 			#ifdef __powerpc64__
191 			output[j].mr_size <<= 32;
192 			#endif
193 			output[j].mr_size += OFmem[i++];
194 		}
195 
196 	      #ifndef __powerpc64__
197 		/*
198 		 * Check for memory regions extending above 32-bit
199 		 * memory space, and restrict them to stay there.
200 		 */
201 		if (((uint64_t)output[j].mr_start +
202 		    (uint64_t)output[j].mr_size) >
203 		    BUS_SPACE_MAXADDR_32BIT) {
204 			output[j].mr_size = BUS_SPACE_MAXADDR_32BIT -
205 			    output[j].mr_start;
206 		}
207 	      #endif
208 
209 		j++;
210 	}
211 	sz = j*sizeof(output[0]);
212 
213 	return (sz);
214 }
215 
216 /*
217  * This is called during powerpc_init, before the system is really initialized.
218  * It shall provide the total and the available regions of RAM.
219  * Both lists must have a zero-size entry as terminator.
220  * The available regions need not take the kernel into account, but needs
221  * to provide space for two additional entry beyond the terminating one.
222  */
223 void
224 ofw_mem_regions(struct mem_region *memp, int *memsz,
225 		struct mem_region *availp, int *availsz)
226 {
227 	phandle_t phandle;
228 	int asz, msz;
229 	int res;
230 	char name[31];
231 
232 	asz = msz = 0;
233 
234 	/*
235 	 * Get memory from all the /memory nodes.
236 	 */
237 	for (phandle = OF_child(OF_peer(0)); phandle != 0;
238 	    phandle = OF_peer(phandle)) {
239 		if (OF_getprop(phandle, "name", name, sizeof(name)) <= 0)
240 			continue;
241 		if (strncmp(name, "memory", sizeof(name)) != 0)
242 			continue;
243 
244 		res = parse_ofw_memory(phandle, "reg", &memp[msz]);
245 		msz += res/sizeof(struct mem_region);
246 		if (OF_getproplen(phandle, "available") >= 0)
247 			res = parse_ofw_memory(phandle, "available",
248 			    &availp[asz]);
249 		else
250 			res = parse_ofw_memory(phandle, "reg", &availp[asz]);
251 		asz += res/sizeof(struct mem_region);
252 	}
253 
254 	*memsz = msz;
255 	*availsz = asz;
256 }
257 
258 #ifdef AIM
259 void
260 OF_initial_setup(void *fdt_ptr, void *junk, int (*openfirm)(void *))
261 {
262 	if (ofmsr[0] & PSL_DR)
263 		ofw_real_mode = 0;
264 	else
265 		ofw_real_mode = 1;
266 
267 	fdt = fdt_ptr;
268 
269 	#ifdef FDT_DTB_STATIC
270 	/* Check for a statically included blob */
271 	if (fdt == NULL)
272 		fdt = &fdt_static_dtb;
273 	#endif
274 }
275 
276 boolean_t
277 OF_bootstrap()
278 {
279 	boolean_t status = FALSE;
280 
281 	if (openfirmware_entry != NULL) {
282 		if (ofw_real_mode) {
283 			status = OF_install(OFW_STD_REAL, 0);
284 		} else {
285 			#ifdef __powerpc64__
286 			status = OF_install(OFW_STD_32BIT, 0);
287 			#else
288 			status = OF_install(OFW_STD_DIRECT, 0);
289 			#endif
290 		}
291 
292 		if (status != TRUE)
293 			return status;
294 
295 		OF_init(openfirmware);
296 	} else if (fdt != NULL) {
297 		status = OF_install(OFW_FDT, 0);
298 
299 		if (status != TRUE)
300 			return status;
301 
302 		OF_init(fdt);
303 	}
304 
305 	return (status);
306 }
307 
308 void
309 ofw_quiesce(void)
310 {
311 	struct {
312 		cell_t name;
313 		cell_t nargs;
314 		cell_t nreturns;
315 	} args;
316 
317 	KASSERT(!pmap_bootstrapped, ("Cannot call ofw_quiesce after VM is up"));
318 
319 	args.name = (cell_t)(uintptr_t)"quiesce";
320 	args.nargs = 0;
321 	args.nreturns = 0;
322 	openfirmware(&args);
323 }
324 
325 static int
326 openfirmware_core(void *args)
327 {
328 	int		result;
329 	register_t	oldmsr;
330 
331 	/*
332 	 * Turn off exceptions - we really don't want to end up
333 	 * anywhere unexpected with PCPU set to something strange
334 	 * or the stack pointer wrong.
335 	 */
336 	oldmsr = intr_disable();
337 
338 	ofw_sprg_prepare();
339 
340 	/* Save trap vectors */
341 	ofw_save_trap_vec(save_trap_of);
342 
343 	/* Restore initially saved trap vectors */
344 	ofw_restore_trap_vec(save_trap_init);
345 
346 #if defined(AIM) && !defined(__powerpc64__)
347 	/*
348 	 * Clear battable[] translations
349 	 */
350 	if (!(cpu_features & PPC_FEATURE_64))
351 		__asm __volatile("mtdbatu 2, %0\n"
352 				 "mtdbatu 3, %0" : : "r" (0));
353 	isync();
354 #endif
355 
356 	result = ofwcall(args);
357 
358 	/* Restore trap vecotrs */
359 	ofw_restore_trap_vec(save_trap_of);
360 
361 	ofw_sprg_restore();
362 
363 	intr_restore(oldmsr);
364 
365 	return (result);
366 }
367 
368 #ifdef SMP
369 struct ofw_rv_args {
370 	void *args;
371 	int retval;
372 	volatile int in_progress;
373 };
374 
375 static void
376 ofw_rendezvous_dispatch(void *xargs)
377 {
378 	struct ofw_rv_args *rv_args = xargs;
379 
380 	/* NOTE: Interrupts are disabled here */
381 
382 	if (PCPU_GET(cpuid) == 0) {
383 		/*
384 		 * Execute all OF calls on CPU 0
385 		 */
386 		rv_args->retval = openfirmware_core(rv_args->args);
387 		rv_args->in_progress = 0;
388 	} else {
389 		/*
390 		 * Spin with interrupts off on other CPUs while OF has
391 		 * control of the machine.
392 		 */
393 		while (rv_args->in_progress)
394 			cpu_spinwait();
395 	}
396 }
397 #endif
398 
399 static int
400 openfirmware(void *args)
401 {
402 	int result;
403 	#ifdef SMP
404 	struct ofw_rv_args rv_args;
405 
406 	rv_args.args = args;
407 	rv_args.in_progress = 1;
408 	smp_rendezvous(smp_no_rendevous_barrier, ofw_rendezvous_dispatch,
409 	    smp_no_rendevous_barrier, &rv_args);
410 	result = rv_args.retval;
411 	#else
412 	result = openfirmware_core(args);
413 	#endif
414 
415 	return (result);
416 }
417 
418 void
419 OF_reboot()
420 {
421 	struct {
422 		cell_t name;
423 		cell_t nargs;
424 		cell_t nreturns;
425 		cell_t arg;
426 	} args;
427 
428 	args.name = (cell_t)(uintptr_t)"interpret";
429 	args.nargs = 1;
430 	args.nreturns = 0;
431 	args.arg = (cell_t)(uintptr_t)"reset-all";
432 	openfirmware_core(&args); /* Don't do rendezvous! */
433 
434 	for (;;);	/* just in case */
435 }
436 
437 #endif /* AIM */
438 
439 void
440 OF_getetheraddr(device_t dev, u_char *addr)
441 {
442 	phandle_t	node;
443 
444 	node = ofw_bus_get_node(dev);
445 	OF_getprop(node, "local-mac-address", addr, ETHER_ADDR_LEN);
446 }
447 
448 /*
449  * Return a bus handle and bus tag that corresponds to the register
450  * numbered regno for the device referenced by the package handle
451  * dev. This function is intended to be used by console drivers in
452  * early boot only. It works by mapping the address of the device's
453  * register in the address space of its parent and recursively walk
454  * the device tree upward this way.
455  */
456 static void
457 OF_get_addr_props(phandle_t node, uint32_t *addrp, uint32_t *sizep, int *pcip)
458 {
459 	char type[64];
460 	uint32_t addr, size;
461 	int pci, res;
462 
463 	res = OF_getprop(node, "#address-cells", &addr, sizeof(addr));
464 	if (res == -1)
465 		addr = 2;
466 	res = OF_getprop(node, "#size-cells", &size, sizeof(size));
467 	if (res == -1)
468 		size = 1;
469 	pci = 0;
470 	if (addr == 3 && size == 2) {
471 		res = OF_getprop(node, "device_type", type, sizeof(type));
472 		if (res != -1) {
473 			type[sizeof(type) - 1] = '\0';
474 			pci = (strcmp(type, "pci") == 0) ? 1 : 0;
475 		}
476 	}
477 	if (addrp != NULL)
478 		*addrp = addr;
479 	if (sizep != NULL)
480 		*sizep = size;
481 	if (pcip != NULL)
482 		*pcip = pci;
483 }
484 
485 int
486 OF_decode_addr(phandle_t dev, int regno, bus_space_tag_t *tag,
487     bus_space_handle_t *handle)
488 {
489 	uint32_t cell[32];
490 	bus_addr_t addr, raddr, baddr;
491 	bus_size_t size, rsize;
492 	uint32_t c, nbridge, naddr, nsize;
493 	phandle_t bridge, parent;
494 	u_int spc, rspc, prefetch;
495 	int pci, pcib, res;
496 
497 	/* Sanity checking. */
498 	if (dev == 0)
499 		return (EINVAL);
500 	bridge = OF_parent(dev);
501 	if (bridge == 0)
502 		return (EINVAL);
503 	if (regno < 0)
504 		return (EINVAL);
505 	if (tag == NULL || handle == NULL)
506 		return (EINVAL);
507 
508 	/* Assume big-endian unless we find a PCI device */
509 	*tag = &bs_be_tag;
510 
511 	/* Get the requested register. */
512 	OF_get_addr_props(bridge, &naddr, &nsize, &pci);
513 	if (pci)
514 		*tag = &bs_le_tag;
515 	res = OF_getprop(dev, (pci) ? "assigned-addresses" : "reg",
516 	    cell, sizeof(cell));
517 	if (res == -1)
518 		return (ENXIO);
519 	if (res % sizeof(cell[0]))
520 		return (ENXIO);
521 	res /= sizeof(cell[0]);
522 	regno *= naddr + nsize;
523 	if (regno + naddr + nsize > res)
524 		return (EINVAL);
525 	spc = (pci) ? cell[regno] & OFW_PCI_PHYS_HI_SPACEMASK : ~0;
526 	prefetch = (pci) ? cell[regno] & OFW_PCI_PHYS_HI_PREFETCHABLE : 0;
527 	addr = 0;
528 	for (c = 0; c < naddr; c++)
529 		addr = ((uint64_t)addr << 32) | cell[regno++];
530 	size = 0;
531 	for (c = 0; c < nsize; c++)
532 		size = ((uint64_t)size << 32) | cell[regno++];
533 
534 	/*
535 	 * Map the address range in the bridge's decoding window as given
536 	 * by the "ranges" property. If a node doesn't have such property
537 	 * then no mapping is done.
538 	 */
539 	parent = OF_parent(bridge);
540 	while (parent != 0) {
541 		OF_get_addr_props(parent, &nbridge, NULL, &pcib);
542 		if (pcib)
543 			*tag = &bs_le_tag;
544 		res = OF_getprop(bridge, "ranges", cell, sizeof(cell));
545 		if (res == -1)
546 			goto next;
547 		if (res % sizeof(cell[0]))
548 			return (ENXIO);
549 		res /= sizeof(cell[0]);
550 		regno = 0;
551 		while (regno < res) {
552 			rspc = (pci)
553 			    ? cell[regno] & OFW_PCI_PHYS_HI_SPACEMASK
554 			    : ~0;
555 			if (rspc != spc) {
556 				regno += naddr + nbridge + nsize;
557 				continue;
558 			}
559 			raddr = 0;
560 			for (c = 0; c < naddr; c++)
561 				raddr = ((uint64_t)raddr << 32) | cell[regno++];
562 			rspc = (pcib)
563 			    ? cell[regno] & OFW_PCI_PHYS_HI_SPACEMASK
564 			    : ~0;
565 			baddr = 0;
566 			for (c = 0; c < nbridge; c++)
567 				baddr = ((uint64_t)baddr << 32) | cell[regno++];
568 			rsize = 0;
569 			for (c = 0; c < nsize; c++)
570 				rsize = ((uint64_t)rsize << 32) | cell[regno++];
571 			if (addr < raddr || addr >= raddr + rsize)
572 				continue;
573 			addr = addr - raddr + baddr;
574 			if (rspc != ~0)
575 				spc = rspc;
576 		}
577 
578 	next:
579 		bridge = parent;
580 		parent = OF_parent(bridge);
581 		OF_get_addr_props(bridge, &naddr, &nsize, &pci);
582 	}
583 
584 	return (bus_space_map(*tag, addr, size,
585 	    prefetch ? BUS_SPACE_MAP_PREFETCHABLE : 0, handle));
586 }
587 
588