1 /*- 2 * Copyright (C) 1996 Wolfgang Solfrank. 3 * Copyright (C) 1996 TooLs GmbH. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by TooLs GmbH. 17 * 4. The name of TooLs GmbH may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * $NetBSD: ofw_machdep.c,v 1.5 2000/05/23 13:25:43 tsubai Exp $ 32 */ 33 34 #include <sys/cdefs.h> 35 __FBSDID("$FreeBSD$"); 36 37 #include <sys/param.h> 38 #include <sys/bus.h> 39 #include <sys/systm.h> 40 #include <sys/conf.h> 41 #include <sys/disk.h> 42 #include <sys/fcntl.h> 43 #include <sys/malloc.h> 44 #include <sys/smp.h> 45 #include <sys/stat.h> 46 47 #include <net/ethernet.h> 48 49 #include <dev/ofw/openfirm.h> 50 #include <dev/ofw/ofw_pci.h> 51 #include <dev/ofw/ofw_bus.h> 52 53 #include <vm/vm.h> 54 #include <vm/vm_param.h> 55 #include <vm/vm_page.h> 56 57 #include <machine/bus.h> 58 #include <machine/cpu.h> 59 #include <machine/md_var.h> 60 #include <machine/platform.h> 61 #include <machine/ofw_machdep.h> 62 #include <machine/trap.h> 63 64 #ifdef AIM 65 extern register_t ofmsr[5]; 66 extern void *openfirmware_entry; 67 static void *fdt; 68 int ofw_real_mode; 69 extern char save_trap_init[0x2f00]; /* EXC_LAST */ 70 char save_trap_of[0x2f00]; /* EXC_LAST */ 71 72 int ofwcall(void *); 73 static int openfirmware(void *args); 74 75 __inline void 76 ofw_save_trap_vec(char *save_trap_vec) 77 { 78 if (!ofw_real_mode) 79 return; 80 81 bcopy((void *)EXC_RST, save_trap_vec, EXC_LAST - EXC_RST); 82 } 83 84 static __inline void 85 ofw_restore_trap_vec(char *restore_trap_vec) 86 { 87 if (!ofw_real_mode) 88 return; 89 90 bcopy(restore_trap_vec, (void *)EXC_RST, EXC_LAST - EXC_RST); 91 __syncicache(EXC_RSVD, EXC_LAST - EXC_RSVD); 92 } 93 94 /* 95 * Saved SPRG0-3 from OpenFirmware. Will be restored prior to the callback. 96 */ 97 register_t ofw_sprg0_save; 98 99 static __inline void 100 ofw_sprg_prepare(void) 101 { 102 if (ofw_real_mode) 103 return; 104 105 /* 106 * Assume that interrupt are disabled at this point, or 107 * SPRG1-3 could be trashed 108 */ 109 __asm __volatile("mfsprg0 %0\n\t" 110 "mtsprg0 %1\n\t" 111 "mtsprg1 %2\n\t" 112 "mtsprg2 %3\n\t" 113 "mtsprg3 %4\n\t" 114 : "=&r"(ofw_sprg0_save) 115 : "r"(ofmsr[1]), 116 "r"(ofmsr[2]), 117 "r"(ofmsr[3]), 118 "r"(ofmsr[4])); 119 } 120 121 static __inline void 122 ofw_sprg_restore(void) 123 { 124 if (ofw_real_mode) 125 return; 126 127 /* 128 * Note that SPRG1-3 contents are irrelevant. They are scratch 129 * registers used in the early portion of trap handling when 130 * interrupts are disabled. 131 * 132 * PCPU data cannot be used until this routine is called ! 133 */ 134 __asm __volatile("mtsprg0 %0" :: "r"(ofw_sprg0_save)); 135 } 136 #endif 137 138 static int 139 parse_ofw_memory(phandle_t node, const char *prop, struct mem_region *output) 140 { 141 cell_t address_cells, size_cells; 142 cell_t OFmem[4 * PHYS_AVAIL_SZ]; 143 int sz, i, j; 144 phandle_t phandle; 145 146 sz = 0; 147 148 /* 149 * Get #address-cells from root node, defaulting to 1 if it cannot 150 * be found. 151 */ 152 phandle = OF_finddevice("/"); 153 if (OF_getprop(phandle, "#address-cells", &address_cells, 154 sizeof(address_cells)) < (ssize_t)sizeof(address_cells)) 155 address_cells = 1; 156 if (OF_getprop(phandle, "#size-cells", &size_cells, 157 sizeof(size_cells)) < (ssize_t)sizeof(size_cells)) 158 size_cells = 1; 159 160 /* 161 * Get memory. 162 */ 163 if (node == -1 || (sz = OF_getprop(node, prop, 164 OFmem, sizeof(OFmem))) <= 0) 165 panic("Physical memory map not found"); 166 167 i = 0; 168 j = 0; 169 while (i < sz/sizeof(cell_t)) { 170 #ifndef __powerpc64__ 171 /* On 32-bit PPC, ignore regions starting above 4 GB */ 172 if (address_cells > 1 && OFmem[i] > 0) { 173 i += address_cells + size_cells; 174 continue; 175 } 176 #endif 177 178 output[j].mr_start = OFmem[i++]; 179 if (address_cells == 2) { 180 #ifdef __powerpc64__ 181 output[j].mr_start <<= 32; 182 #endif 183 output[j].mr_start += OFmem[i++]; 184 } 185 186 output[j].mr_size = OFmem[i++]; 187 if (size_cells == 2) { 188 #ifdef __powerpc64__ 189 output[j].mr_size <<= 32; 190 #endif 191 output[j].mr_size += OFmem[i++]; 192 } 193 194 #ifndef __powerpc64__ 195 /* 196 * Check for memory regions extending above 32-bit 197 * memory space, and restrict them to stay there. 198 */ 199 if (((uint64_t)output[j].mr_start + 200 (uint64_t)output[j].mr_size) > 201 BUS_SPACE_MAXADDR_32BIT) { 202 output[j].mr_size = BUS_SPACE_MAXADDR_32BIT - 203 output[j].mr_start; 204 } 205 #endif 206 207 j++; 208 } 209 sz = j*sizeof(output[0]); 210 211 return (sz); 212 } 213 214 /* 215 * This is called during powerpc_init, before the system is really initialized. 216 * It shall provide the total and the available regions of RAM. 217 * Both lists must have a zero-size entry as terminator. 218 * The available regions need not take the kernel into account, but needs 219 * to provide space for two additional entry beyond the terminating one. 220 */ 221 void 222 ofw_mem_regions(struct mem_region *memp, int *memsz, 223 struct mem_region *availp, int *availsz) 224 { 225 phandle_t phandle; 226 int asz, msz; 227 int res; 228 char name[31]; 229 230 asz = msz = 0; 231 232 /* 233 * Get memory from all the /memory nodes. 234 */ 235 for (phandle = OF_child(OF_peer(0)); phandle != 0; 236 phandle = OF_peer(phandle)) { 237 if (OF_getprop(phandle, "name", name, sizeof(name)) <= 0) 238 continue; 239 if (strncmp(name, "memory", sizeof(name)) != 0) 240 continue; 241 242 res = parse_ofw_memory(phandle, "reg", &memp[msz]); 243 msz += res/sizeof(struct mem_region); 244 if (OF_getproplen(phandle, "available") >= 0) 245 res = parse_ofw_memory(phandle, "available", 246 &availp[asz]); 247 else 248 res = parse_ofw_memory(phandle, "reg", &availp[asz]); 249 asz += res/sizeof(struct mem_region); 250 } 251 252 *memsz = msz; 253 *availsz = asz; 254 } 255 256 #ifdef AIM 257 void 258 OF_initial_setup(void *fdt_ptr, void *junk, int (*openfirm)(void *)) 259 { 260 if (ofmsr[0] & PSL_DR) 261 ofw_real_mode = 0; 262 else 263 ofw_real_mode = 1; 264 265 fdt = fdt_ptr; 266 267 #ifdef FDT_DTB_STATIC 268 /* Check for a statically included blob */ 269 if (fdt == NULL) 270 fdt = &fdt_static_dtb; 271 #endif 272 } 273 274 boolean_t 275 OF_bootstrap() 276 { 277 boolean_t status = FALSE; 278 279 if (openfirmware_entry != NULL) { 280 if (ofw_real_mode) { 281 status = OF_install(OFW_STD_REAL, 0); 282 } else { 283 #ifdef __powerpc64__ 284 status = OF_install(OFW_STD_32BIT, 0); 285 #else 286 status = OF_install(OFW_STD_DIRECT, 0); 287 #endif 288 } 289 290 if (status != TRUE) 291 return status; 292 293 OF_init(openfirmware); 294 } else if (fdt != NULL) { 295 status = OF_install(OFW_FDT, 0); 296 297 if (status != TRUE) 298 return status; 299 300 OF_init(fdt); 301 } 302 303 return (status); 304 } 305 306 void 307 ofw_quiesce(void) 308 { 309 struct { 310 cell_t name; 311 cell_t nargs; 312 cell_t nreturns; 313 } args; 314 315 KASSERT(!pmap_bootstrapped, ("Cannot call ofw_quiesce after VM is up")); 316 317 args.name = (cell_t)(uintptr_t)"quiesce"; 318 args.nargs = 0; 319 args.nreturns = 0; 320 openfirmware(&args); 321 } 322 323 static int 324 openfirmware_core(void *args) 325 { 326 int result; 327 register_t oldmsr; 328 329 if (openfirmware_entry == NULL) 330 return (-1); 331 332 /* 333 * Turn off exceptions - we really don't want to end up 334 * anywhere unexpected with PCPU set to something strange 335 * or the stack pointer wrong. 336 */ 337 oldmsr = intr_disable(); 338 339 ofw_sprg_prepare(); 340 341 /* Save trap vectors */ 342 ofw_save_trap_vec(save_trap_of); 343 344 /* Restore initially saved trap vectors */ 345 ofw_restore_trap_vec(save_trap_init); 346 347 #if defined(AIM) && !defined(__powerpc64__) 348 /* 349 * Clear battable[] translations 350 */ 351 if (!(cpu_features & PPC_FEATURE_64)) 352 __asm __volatile("mtdbatu 2, %0\n" 353 "mtdbatu 3, %0" : : "r" (0)); 354 isync(); 355 #endif 356 357 result = ofwcall(args); 358 359 /* Restore trap vecotrs */ 360 ofw_restore_trap_vec(save_trap_of); 361 362 ofw_sprg_restore(); 363 364 intr_restore(oldmsr); 365 366 return (result); 367 } 368 369 #ifdef SMP 370 struct ofw_rv_args { 371 void *args; 372 int retval; 373 volatile int in_progress; 374 }; 375 376 static void 377 ofw_rendezvous_dispatch(void *xargs) 378 { 379 struct ofw_rv_args *rv_args = xargs; 380 381 /* NOTE: Interrupts are disabled here */ 382 383 if (PCPU_GET(cpuid) == 0) { 384 /* 385 * Execute all OF calls on CPU 0 386 */ 387 rv_args->retval = openfirmware_core(rv_args->args); 388 rv_args->in_progress = 0; 389 } else { 390 /* 391 * Spin with interrupts off on other CPUs while OF has 392 * control of the machine. 393 */ 394 while (rv_args->in_progress) 395 cpu_spinwait(); 396 } 397 } 398 #endif 399 400 static int 401 openfirmware(void *args) 402 { 403 int result; 404 #ifdef SMP 405 struct ofw_rv_args rv_args; 406 #endif 407 408 if (openfirmware_entry == NULL) 409 return (-1); 410 411 #ifdef SMP 412 rv_args.args = args; 413 rv_args.in_progress = 1; 414 smp_rendezvous(smp_no_rendevous_barrier, ofw_rendezvous_dispatch, 415 smp_no_rendevous_barrier, &rv_args); 416 result = rv_args.retval; 417 #else 418 result = openfirmware_core(args); 419 #endif 420 421 return (result); 422 } 423 424 void 425 OF_reboot() 426 { 427 struct { 428 cell_t name; 429 cell_t nargs; 430 cell_t nreturns; 431 cell_t arg; 432 } args; 433 434 args.name = (cell_t)(uintptr_t)"interpret"; 435 args.nargs = 1; 436 args.nreturns = 0; 437 args.arg = (cell_t)(uintptr_t)"reset-all"; 438 openfirmware_core(&args); /* Don't do rendezvous! */ 439 440 for (;;); /* just in case */ 441 } 442 443 #endif /* AIM */ 444 445 void 446 OF_getetheraddr(device_t dev, u_char *addr) 447 { 448 phandle_t node; 449 450 node = ofw_bus_get_node(dev); 451 OF_getprop(node, "local-mac-address", addr, ETHER_ADDR_LEN); 452 } 453 454 /* 455 * Return a bus handle and bus tag that corresponds to the register 456 * numbered regno for the device referenced by the package handle 457 * dev. This function is intended to be used by console drivers in 458 * early boot only. It works by mapping the address of the device's 459 * register in the address space of its parent and recursively walk 460 * the device tree upward this way. 461 */ 462 static void 463 OF_get_addr_props(phandle_t node, uint32_t *addrp, uint32_t *sizep, int *pcip) 464 { 465 char type[64]; 466 uint32_t addr, size; 467 int pci, res; 468 469 res = OF_getprop(node, "#address-cells", &addr, sizeof(addr)); 470 if (res == -1) 471 addr = 2; 472 res = OF_getprop(node, "#size-cells", &size, sizeof(size)); 473 if (res == -1) 474 size = 1; 475 pci = 0; 476 if (addr == 3 && size == 2) { 477 res = OF_getprop(node, "device_type", type, sizeof(type)); 478 if (res != -1) { 479 type[sizeof(type) - 1] = '\0'; 480 pci = (strcmp(type, "pci") == 0) ? 1 : 0; 481 } 482 } 483 if (addrp != NULL) 484 *addrp = addr; 485 if (sizep != NULL) 486 *sizep = size; 487 if (pcip != NULL) 488 *pcip = pci; 489 } 490 491 int 492 OF_decode_addr(phandle_t dev, int regno, bus_space_tag_t *tag, 493 bus_space_handle_t *handle) 494 { 495 uint32_t cell[32]; 496 bus_addr_t addr, raddr, baddr; 497 bus_size_t size, rsize; 498 uint32_t c, nbridge, naddr, nsize; 499 phandle_t bridge, parent; 500 u_int spc, rspc, prefetch; 501 int pci, pcib, res; 502 503 /* Sanity checking. */ 504 if (dev == 0) 505 return (EINVAL); 506 bridge = OF_parent(dev); 507 if (bridge == 0) 508 return (EINVAL); 509 if (regno < 0) 510 return (EINVAL); 511 if (tag == NULL || handle == NULL) 512 return (EINVAL); 513 514 /* Assume big-endian unless we find a PCI device */ 515 *tag = &bs_be_tag; 516 517 /* Get the requested register. */ 518 OF_get_addr_props(bridge, &naddr, &nsize, &pci); 519 if (pci) 520 *tag = &bs_le_tag; 521 res = OF_getprop(dev, (pci) ? "assigned-addresses" : "reg", 522 cell, sizeof(cell)); 523 if (res == -1) 524 return (ENXIO); 525 if (res % sizeof(cell[0])) 526 return (ENXIO); 527 res /= sizeof(cell[0]); 528 regno *= naddr + nsize; 529 if (regno + naddr + nsize > res) 530 return (EINVAL); 531 spc = (pci) ? cell[regno] & OFW_PCI_PHYS_HI_SPACEMASK : ~0; 532 prefetch = (pci) ? cell[regno] & OFW_PCI_PHYS_HI_PREFETCHABLE : 0; 533 addr = 0; 534 for (c = 0; c < naddr; c++) 535 addr = ((uint64_t)addr << 32) | cell[regno++]; 536 size = 0; 537 for (c = 0; c < nsize; c++) 538 size = ((uint64_t)size << 32) | cell[regno++]; 539 540 /* 541 * Map the address range in the bridge's decoding window as given 542 * by the "ranges" property. If a node doesn't have such property 543 * then no mapping is done. 544 */ 545 parent = OF_parent(bridge); 546 while (parent != 0) { 547 OF_get_addr_props(parent, &nbridge, NULL, &pcib); 548 if (pcib) 549 *tag = &bs_le_tag; 550 res = OF_getprop(bridge, "ranges", cell, sizeof(cell)); 551 if (res == -1) 552 goto next; 553 if (res % sizeof(cell[0])) 554 return (ENXIO); 555 res /= sizeof(cell[0]); 556 regno = 0; 557 while (regno < res) { 558 rspc = (pci) 559 ? cell[regno] & OFW_PCI_PHYS_HI_SPACEMASK 560 : ~0; 561 if (rspc != spc) { 562 regno += naddr + nbridge + nsize; 563 continue; 564 } 565 raddr = 0; 566 for (c = 0; c < naddr; c++) 567 raddr = ((uint64_t)raddr << 32) | cell[regno++]; 568 rspc = (pcib) 569 ? cell[regno] & OFW_PCI_PHYS_HI_SPACEMASK 570 : ~0; 571 baddr = 0; 572 for (c = 0; c < nbridge; c++) 573 baddr = ((uint64_t)baddr << 32) | cell[regno++]; 574 rsize = 0; 575 for (c = 0; c < nsize; c++) 576 rsize = ((uint64_t)rsize << 32) | cell[regno++]; 577 if (addr < raddr || addr >= raddr + rsize) 578 continue; 579 addr = addr - raddr + baddr; 580 if (rspc != ~0) 581 spc = rspc; 582 } 583 584 next: 585 bridge = parent; 586 parent = OF_parent(bridge); 587 OF_get_addr_props(bridge, &naddr, &nsize, &pci); 588 } 589 590 return (bus_space_map(*tag, addr, size, 591 prefetch ? BUS_SPACE_MAP_PREFETCHABLE : 0, handle)); 592 } 593 594