xref: /freebsd/sys/powerpc/mpc85xx/mpc85xx_gpio.c (revision d0b2dbfa0ecf2bbc9709efc5e20baf8e4b44bbbf)
1 /*-
2  * Copyright (c) 2015 Justin Hibbits
3  * Copyright (c) 2013 Thomas Skibo
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/conf.h>
32 #include <sys/bus.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/lock.h>
36 #include <sys/mutex.h>
37 #include <sys/resource.h>
38 #include <sys/rman.h>
39 #include <sys/gpio.h>
40 
41 #include <machine/bus.h>
42 #include <machine/resource.h>
43 #include <machine/stdarg.h>
44 
45 #include <dev/fdt/fdt_common.h>
46 #include <dev/gpio/gpiobusvar.h>
47 #include <dev/ofw/ofw_bus.h>
48 #include <dev/ofw/ofw_bus_subr.h>
49 
50 #include "gpio_if.h"
51 
52 #define MAXPIN		(7)
53 
54 #define VALID_PIN(u)	((u) >= 0 && (u) <= MAXPIN)
55 
56 #define GPIO_LOCK(sc)			mtx_lock(&(sc)->sc_mtx)
57 #define	GPIO_UNLOCK(sc)		mtx_unlock(&(sc)->sc_mtx)
58 #define GPIO_LOCK_INIT(sc) \
59 	mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->dev),	\
60 	    "gpio", MTX_DEF)
61 #define GPIO_LOCK_DESTROY(_sc)	mtx_destroy(&_sc->sc_mtx);
62 
63 struct mpc85xx_gpio_softc {
64 	device_t	dev;
65 	device_t	busdev;
66 	struct mtx	sc_mtx;
67 	struct resource *out_res;	/* Memory resource */
68 	struct resource *in_res;
69 };
70 
71 static device_t
72 mpc85xx_gpio_get_bus(device_t dev)
73 {
74 	struct mpc85xx_gpio_softc *sc;
75 
76 	sc = device_get_softc(dev);
77 
78 	return (sc->busdev);
79 }
80 
81 static int
82 mpc85xx_gpio_pin_max(device_t dev, int *maxpin)
83 {
84 
85 	*maxpin = MAXPIN;
86 	return (0);
87 }
88 
89 /* Get a specific pin's capabilities. */
90 static int
91 mpc85xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
92 {
93 
94 	if (!VALID_PIN(pin))
95 		return (EINVAL);
96 
97 	*caps = (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT);
98 
99 	return (0);
100 }
101 
102 /* Get a specific pin's name. */
103 static int
104 mpc85xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
105 {
106 
107 	if (!VALID_PIN(pin))
108 		return (EINVAL);
109 
110 	snprintf(name, GPIOMAXNAME, "GPIO%d", pin);
111 	name[GPIOMAXNAME-1] = '\0';
112 
113 	return (0);
114 }
115 
116 /* Set a specific output pin's value. */
117 static int
118 mpc85xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
119 {
120 	struct mpc85xx_gpio_softc *sc = device_get_softc(dev);
121 	uint32_t outvals;
122 	uint8_t pinbit;
123 
124 	if (!VALID_PIN(pin) || value > 1)
125 		return (EINVAL);
126 
127 	GPIO_LOCK(sc);
128 	pinbit = 31 - pin;
129 
130 	outvals = bus_read_4(sc->out_res, 0);
131 	outvals &= ~(1 << pinbit);
132 	outvals |= (value << pinbit);
133 	bus_write_4(sc->out_res, 0, outvals);
134 
135 	GPIO_UNLOCK(sc);
136 
137 	return (0);
138 }
139 
140 /* Get a specific pin's input value. */
141 static int
142 mpc85xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *value)
143 {
144 	struct mpc85xx_gpio_softc *sc = device_get_softc(dev);
145 
146 	if (!VALID_PIN(pin))
147 		return (EINVAL);
148 
149 	*value = (bus_read_4(sc->in_res, 0) >> (31 - pin)) & 1;
150 
151 	return (0);
152 }
153 
154 /* Toggle a pin's output value. */
155 static int
156 mpc85xx_gpio_pin_toggle(device_t dev, uint32_t pin)
157 {
158 	struct mpc85xx_gpio_softc *sc = device_get_softc(dev);
159 	uint32_t val;
160 
161 	if (!VALID_PIN(pin))
162 		return (EINVAL);
163 
164 	GPIO_LOCK(sc);
165 
166 	val = bus_read_4(sc->out_res, 0);
167 	val ^= (1 << (31 - pin));
168 	bus_write_4(sc->out_res, 0, val);
169 
170 	GPIO_UNLOCK(sc);
171 
172 	return (0);
173 }
174 
175 static int
176 mpc85xx_gpio_probe(device_t dev)
177 {
178 	uint32_t svr;
179 
180 	if (!ofw_bus_status_okay(dev))
181 		return (ENXIO);
182 
183 	if (!ofw_bus_is_compatible(dev, "gpio"))
184 		return (ENXIO);
185 
186 	svr = mfspr(SPR_SVR);
187 	switch (SVR_VER(svr)) {
188 	case SVR_MPC8533:
189 	case SVR_MPC8533E:
190 		break;
191 	default:
192 		return (ENXIO);
193 	}
194 
195 	device_set_desc(dev, "MPC85xx GPIO driver");
196 	return (0);
197 }
198 
199 static int mpc85xx_gpio_detach(device_t dev);
200 
201 static int
202 mpc85xx_gpio_attach(device_t dev)
203 {
204 	struct mpc85xx_gpio_softc *sc = device_get_softc(dev);
205 	int rid;
206 
207 	sc->dev = dev;
208 
209 	GPIO_LOCK_INIT(sc);
210 
211 	/* Allocate memory. */
212 	rid = 0;
213 	sc->out_res = bus_alloc_resource_any(dev,
214 		     SYS_RES_MEMORY, &rid, RF_ACTIVE);
215 	if (sc->out_res == NULL) {
216 		device_printf(dev, "Can't allocate memory for device output port");
217 		mpc85xx_gpio_detach(dev);
218 		return (ENOMEM);
219 	}
220 
221 	rid = 1;
222 	sc->in_res = bus_alloc_resource_any(dev,
223 		     SYS_RES_MEMORY, &rid, RF_ACTIVE);
224 	if (sc->in_res == NULL) {
225 		device_printf(dev, "Can't allocate memory for device input port");
226 		mpc85xx_gpio_detach(dev);
227 		return (ENOMEM);
228 	}
229 
230 	sc->busdev = gpiobus_attach_bus(dev);
231 	if (sc->busdev == NULL) {
232 		mpc85xx_gpio_detach(dev);
233 		return (ENOMEM);
234 	}
235 
236 	OF_device_register_xref(OF_xref_from_node(ofw_bus_get_node(dev)), dev);
237 
238 	return (0);
239 }
240 
241 static int
242 mpc85xx_gpio_detach(device_t dev)
243 {
244 	struct mpc85xx_gpio_softc *sc = device_get_softc(dev);
245 
246 	gpiobus_detach_bus(dev);
247 
248 	if (sc->out_res != NULL) {
249 		/* Release output port resource. */
250 		bus_release_resource(dev, SYS_RES_MEMORY,
251 				     rman_get_rid(sc->out_res), sc->out_res);
252 	}
253 
254 	if (sc->in_res != NULL) {
255 		/* Release input port resource. */
256 		bus_release_resource(dev, SYS_RES_MEMORY,
257 				     rman_get_rid(sc->in_res), sc->in_res);
258 	}
259 
260 	GPIO_LOCK_DESTROY(sc);
261 
262 	return (0);
263 }
264 
265 static device_method_t mpc85xx_gpio_methods[] = {
266 	/* device_if */
267 	DEVMETHOD(device_probe, 	mpc85xx_gpio_probe),
268 	DEVMETHOD(device_attach, 	mpc85xx_gpio_attach),
269 	DEVMETHOD(device_detach, 	mpc85xx_gpio_detach),
270 
271 	/* GPIO protocol */
272 	DEVMETHOD(gpio_get_bus, 	mpc85xx_gpio_get_bus),
273 	DEVMETHOD(gpio_pin_max, 	mpc85xx_gpio_pin_max),
274 	DEVMETHOD(gpio_pin_getname, 	mpc85xx_gpio_pin_getname),
275 	DEVMETHOD(gpio_pin_getcaps, 	mpc85xx_gpio_pin_getcaps),
276 	DEVMETHOD(gpio_pin_get, 	mpc85xx_gpio_pin_get),
277 	DEVMETHOD(gpio_pin_set, 	mpc85xx_gpio_pin_set),
278 	DEVMETHOD(gpio_pin_toggle, 	mpc85xx_gpio_pin_toggle),
279 
280 	DEVMETHOD_END
281 };
282 
283 static driver_t mpc85xx_gpio_driver = {
284 	"gpio",
285 	mpc85xx_gpio_methods,
286 	sizeof(struct mpc85xx_gpio_softc),
287 };
288 
289 EARLY_DRIVER_MODULE(mpc85xx_gpio, simplebus, mpc85xx_gpio_driver, NULL, NULL,
290     BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE);
291