xref: /freebsd/sys/powerpc/mpc85xx/mpc85xx.c (revision ddd5b8e9b4d8957fce018c520657cdfa4ecffad3)
1 /*-
2  * Copyright (C) 2008 Semihalf, Rafal Jaworowski
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/lock.h>
33 #include <sys/mutex.h>
34 #include <sys/rman.h>
35 
36 #include <vm/vm.h>
37 #include <vm/vm_param.h>
38 
39 #include <machine/cpu.h>
40 #include <machine/cpufunc.h>
41 #include <machine/pio.h>
42 #include <machine/spr.h>
43 
44 #include <powerpc/mpc85xx/mpc85xx.h>
45 
46 /*
47  * MPC85xx system specific routines
48  */
49 
50 uint32_t
51 ccsr_read4(uintptr_t addr)
52 {
53 	volatile uint32_t *ptr = (void *)addr;
54 
55 	return (*ptr);
56 }
57 
58 void
59 ccsr_write4(uintptr_t addr, uint32_t val)
60 {
61 	volatile uint32_t *ptr = (void *)addr;
62 
63 	*ptr = val;
64 	powerpc_iomb();
65 }
66 
67 int
68 law_getmax(void)
69 {
70 	uint32_t ver;
71 
72 	ver = SVR_VER(mfspr(SPR_SVR));
73 	if (ver == SVR_MPC8555E || ver == SVR_MPC8555)
74 		return (8);
75 	if (ver == SVR_MPC8548E || ver == SVR_MPC8548 ||
76 	    ver == SVR_MPC8533E || ver == SVR_MPC8533)
77 		return (10);
78 
79 	return (12);
80 }
81 
82 #define	_LAW_SR(trgt,size)	(0x80000000 | (trgt << 20) | (ffsl(size) - 2))
83 #define	_LAW_BAR(addr)		(addr >> 12)
84 
85 int
86 law_enable(int trgt, u_long addr, u_long size)
87 {
88 	uint32_t bar, sr;
89 	int i, law_max;
90 
91 	if (size == 0)
92 		return (0);
93 
94 	law_max = law_getmax();
95 	bar = _LAW_BAR(addr);
96 	sr = _LAW_SR(trgt, size);
97 
98 	/* Bail if already programmed. */
99 	for (i = 0; i < law_max; i++)
100 		if (sr == ccsr_read4(OCP85XX_LAWSR(i)) &&
101 		    bar == ccsr_read4(OCP85XX_LAWBAR(i)))
102 			return (0);
103 
104 	/* Find an unused access window. */
105 	for (i = 0; i < law_max; i++)
106 		if ((ccsr_read4(OCP85XX_LAWSR(i)) & 0x80000000) == 0)
107 			break;
108 
109 	if (i == law_max)
110 		return (ENOSPC);
111 
112 	ccsr_write4(OCP85XX_LAWBAR(i), bar);
113 	ccsr_write4(OCP85XX_LAWSR(i), sr);
114 	return (0);
115 }
116 
117 int
118 law_disable(int trgt, u_long addr, u_long size)
119 {
120 	uint32_t bar, sr;
121 	int i, law_max;
122 
123 	law_max = law_getmax();
124 	bar = _LAW_BAR(addr);
125 	sr = _LAW_SR(trgt, size);
126 
127 	/* Find and disable requested LAW. */
128 	for (i = 0; i < law_max; i++)
129 		if (sr == ccsr_read4(OCP85XX_LAWSR(i)) &&
130 		    bar == ccsr_read4(OCP85XX_LAWBAR(i))) {
131 			ccsr_write4(OCP85XX_LAWBAR(i), 0);
132 			ccsr_write4(OCP85XX_LAWSR(i), 0);
133 			return (0);
134 		}
135 
136 	return (ENOENT);
137 }
138 
139 int
140 law_pci_target(struct resource *res, int *trgt_mem, int *trgt_io)
141 {
142 	u_long start;
143 	uint32_t ver;
144 	int trgt, rv;
145 
146 	ver = SVR_VER(mfspr(SPR_SVR));
147 
148 	start = rman_get_start(res) & 0xf000;
149 
150 	rv = 0;
151 	trgt = -1;
152 	switch (start) {
153 	case 0x8000:
154 		trgt = 0;
155 		break;
156 	case 0x9000:
157 		trgt = 1;
158 		break;
159 	case 0xa000:
160 		if (ver == SVR_MPC8548E || ver == SVR_MPC8548)
161 			trgt = 3;
162 		else
163 			trgt = 2;
164 		break;
165 	case 0xb000:
166 		if (ver == SVR_MPC8548E || ver == SVR_MPC8548)
167 			rv = EINVAL;
168 		else
169 			trgt = 3;
170 		break;
171 	default:
172 		rv = ENXIO;
173 	}
174 	if (rv == 0) {
175 		*trgt_mem = trgt;
176 		*trgt_io = trgt;
177 	}
178 	return (rv);
179 }
180 
181