xref: /freebsd/sys/powerpc/include/ucontext.h (revision 2ff63af9b88c7413b7d71715b5532625752a248e)
160727d8bSWarner Losh /*-
2*51369649SPedro F. Giffuni  * SPDX-License-Identifier: BSD-4-Clause
3*51369649SPedro F. Giffuni  *
4fb75554eSBenno Rice  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
5fb75554eSBenno Rice  * Copyright (C) 1995, 1996 TooLs GmbH.
6fb75554eSBenno Rice  * All rights reserved.
7fb75554eSBenno Rice  *
8fb75554eSBenno Rice  * Redistribution and use in source and binary forms, with or without
9fb75554eSBenno Rice  * modification, are permitted provided that the following conditions
10fb75554eSBenno Rice  * are met:
11fb75554eSBenno Rice  * 1. Redistributions of source code must retain the above copyright
12fb75554eSBenno Rice  *    notice, this list of conditions and the following disclaimer.
13fb75554eSBenno Rice  * 2. Redistributions in binary form must reproduce the above copyright
14fb75554eSBenno Rice  *    notice, this list of conditions and the following disclaimer in the
15fb75554eSBenno Rice  *    documentation and/or other materials provided with the distribution.
16fb75554eSBenno Rice  * 3. All advertising materials mentioning features or use of this software
17fb75554eSBenno Rice  *    must display the following acknowledgement:
18fb75554eSBenno Rice  *	This product includes software developed by TooLs GmbH.
19fb75554eSBenno Rice  * 4. The name of TooLs GmbH may not be used to endorse or promote products
20fb75554eSBenno Rice  *    derived from this software without specific prior written permission.
21fb75554eSBenno Rice  *
22fb75554eSBenno Rice  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23fb75554eSBenno Rice  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24fb75554eSBenno Rice  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25fb75554eSBenno Rice  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26fb75554eSBenno Rice  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27fb75554eSBenno Rice  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28fb75554eSBenno Rice  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29fb75554eSBenno Rice  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30fb75554eSBenno Rice  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31fb75554eSBenno Rice  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32dfeade78SDavid E. O'Brien  *
33dfeade78SDavid E. O'Brien  * $NetBSD: signal.h,v 1.4 1998/09/14 02:48:34 thorpej Exp $
34fb75554eSBenno Rice  */
35dfeade78SDavid E. O'Brien 
36fb75554eSBenno Rice #ifndef	_MACHINE_UCONTEXT_H_
37fb75554eSBenno Rice #define	_MACHINE_UCONTEXT_H_
38fb75554eSBenno Rice 
39fb75554eSBenno Rice typedef struct __mcontext {
40919cb336SPeter Grehan 	int		mc_vers;
41919cb336SPeter Grehan 	int		mc_flags;
42919cb336SPeter Grehan #define _MC_FP_VALID	0x01
43919cb336SPeter Grehan #define _MC_AV_VALID	0x02
44fb75554eSBenno Rice 	int		mc_onstack;	  	/* saved onstack flag */
45919cb336SPeter Grehan 	int		mc_len;			/* sizeof(__mcontext) */
4690edf67eSKonstantin Belousov 	__uint64_t	mc_avec[32*2];		/* vector register file */
4790edf67eSKonstantin Belousov 	__uint32_t	mc_av[2];
4890edf67eSKonstantin Belousov 	__register_t	mc_frame[42];
4990edf67eSKonstantin Belousov 	__uint64_t	mc_fpreg[33];
5090edf67eSKonstantin Belousov 	__uint64_t	mc_vsxfpreg[32];	/* low-order half of VSR0-31 */
51919cb336SPeter Grehan } mcontext_t __aligned(16);
52919cb336SPeter Grehan 
53c3e289e1SNathan Whitehorn #if defined(_KERNEL) && defined(__powerpc64__)
54c3e289e1SNathan Whitehorn typedef struct __mcontext32 {
55c3e289e1SNathan Whitehorn 	int		mc_vers;
56c3e289e1SNathan Whitehorn 	int		mc_flags;
57c3e289e1SNathan Whitehorn #define _MC_FP_VALID	0x01
58c3e289e1SNathan Whitehorn #define _MC_AV_VALID	0x02
59c3e289e1SNathan Whitehorn 	int		mc_onstack;	  	/* saved onstack flag */
60c3e289e1SNathan Whitehorn 	int		mc_len;			/* sizeof(__mcontext) */
61c3e289e1SNathan Whitehorn 	uint64_t	mc_avec[32*2];		/* vector register file */
62c3e289e1SNathan Whitehorn 	uint32_t	mc_av[2];
63c3e289e1SNathan Whitehorn 	uint32_t	mc_frame[42];
64c3e289e1SNathan Whitehorn 	uint64_t	mc_fpreg[33];
650aff8b5cSNathan Whitehorn 	uint64_t	mc_vsxfpreg[32];	/* low-order half of VSR0-31 */
66c3e289e1SNathan Whitehorn } mcontext32_t __aligned(16);
67c3e289e1SNathan Whitehorn #endif
68c3e289e1SNathan Whitehorn 
69919cb336SPeter Grehan /* GPRs and supervisor-level regs */
70919cb336SPeter Grehan #define mc_gpr		mc_frame
71919cb336SPeter Grehan #define mc_lr		mc_frame[32]
72919cb336SPeter Grehan #define mc_cr		mc_frame[33]
73919cb336SPeter Grehan #define mc_xer		mc_frame[34]
74919cb336SPeter Grehan #define	mc_ctr		mc_frame[35]
75919cb336SPeter Grehan #define mc_srr0		mc_frame[36]
76919cb336SPeter Grehan #define mc_srr1		mc_frame[37]
77fbd21ea6SNathan Whitehorn #define mc_exc		mc_frame[38]
78fbd21ea6SNathan Whitehorn #define mc_dar		mc_frame[39]
79fbd21ea6SNathan Whitehorn #define mc_dsisr	mc_frame[40]
80919cb336SPeter Grehan 
81919cb336SPeter Grehan /* floating-point state */
82919cb336SPeter Grehan #define mc_fpscr	mc_fpreg[32]
83919cb336SPeter Grehan 
84919cb336SPeter Grehan /* altivec state */
85919cb336SPeter Grehan #define mc_vscr		mc_av[0]
86919cb336SPeter Grehan #define mc_vrsave	mc_av[1]
87919cb336SPeter Grehan 
88919cb336SPeter Grehan #define _MC_VERSION	0x1
893327cde2SPeter Grehan #define _MC_VERSION_KSE 0xee	/* partial ucontext for libpthread */
90fb75554eSBenno Rice 
91fb75554eSBenno Rice #endif	/* !_MACHINE_UCONTEXT_H_ */
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