xref: /freebsd/sys/powerpc/include/tlb.h (revision 830940567b49bb0c08dfaed40418999e76616909)
1 /*-
2  * Copyright (C) 2006 Semihalf, Marian Balakowicz <m8@semihalf.com>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  * 3. The name of the author may not be used to endorse or promote products
14  *    derived from this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
19  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
21  * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
22  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
23  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
24  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  */
29 
30 #ifndef	_MACHINE_TLB_H_
31 #define	_MACHINE_TLB_H_
32 
33 /*  PowerPC E500 MAS registers */
34 #define MAS0_TLBSEL(x)		((x << 28) & 0x10000000)
35 #define MAS0_ESEL(x)		((x << 16) & 0x000F0000)
36 
37 #define MAS0_TLBSEL1		0x10000000
38 #define MAS0_TLBSEL0		0x00000000
39 #define MAS0_ESEL_TLB1MASK	0x000F0000
40 #define MAS0_ESEL_TLB0MASK	0x00030000
41 #define MAS0_ESEL_SHIFT		16
42 #define MAS0_NV_MASK		0x00000003
43 #define MAS0_NV_SHIFT		0
44 
45 #define MAS1_VALID		0x80000000
46 #define MAS1_IPROT		0x40000000
47 #define MAS1_TID_MASK		0x00FF0000
48 #define MAS1_TID_SHIFT		16
49 #define MAS1_TS_MASK		0x00001000
50 #define MAS1_TS_SHIFT		12
51 #define MAS1_TSIZE_MASK		0x00000F00
52 #define MAS1_TSIZE_SHIFT	8
53 
54 #define	TLB_SIZE_4K		1
55 #define	TLB_SIZE_16K		2
56 #define	TLB_SIZE_64K		3
57 #define	TLB_SIZE_256K		4
58 #define	TLB_SIZE_1M		5
59 #define	TLB_SIZE_4M		6
60 #define	TLB_SIZE_16M		7
61 #define	TLB_SIZE_64M		8
62 #define	TLB_SIZE_256M		9
63 #define	TLB_SIZE_1G		10
64 #define	TLB_SIZE_4G		11
65 
66 #define	MAS2_EPN_MASK		0xFFFFF000
67 #define	MAS2_EPN_SHIFT		12
68 #define	MAS2_X0			0x00000040
69 #define	MAS2_X1			0x00000020
70 #define	MAS2_W			0x00000010
71 #define	MAS2_I			0x00000008
72 #define	MAS2_M			0x00000004
73 #define	MAS2_G			0x00000002
74 #define	MAS2_E			0x00000001
75 
76 #define	MAS3_RPN		0xFFFFF000
77 #define	MAS3_RPN_SHIFT		12
78 #define	MAS3_U0			0x00000200
79 #define	MAS3_U1			0x00000100
80 #define	MAS3_U2			0x00000080
81 #define	MAS3_U3			0x00000040
82 #define	MAS3_UX			0x00000020
83 #define	MAS3_SX			0x00000010
84 #define	MAS3_UW			0x00000008
85 #define	MAS3_SW			0x00000004
86 #define	MAS3_UR			0x00000002
87 #define	MAS3_SR			0x00000001
88 
89 #define MAS4_TLBSELD1		0x10000000
90 #define MAS4_TLBSELD0		0x00000000
91 #define MAS4_TIDSELD_MASK	0x00030000
92 #define MAS4_TIDSELD_SHIFT	16
93 #define MAS4_TSIZED_MASK	0x00000F00
94 #define MAS4_TSIZED_SHIFT	8
95 #define MAS4_X0D		0x00000040
96 #define MAS4_X1D		0x00000020
97 #define MAS4_WD			0x00000010
98 #define MAS4_ID			0x00000008
99 #define MAS4_MD			0x00000004
100 #define MAS4_GD			0x00000002
101 #define MAS4_ED			0x00000001
102 
103 #define MAS6_SPID0_MASK		0x00FF0000
104 #define MAS6_SPID0_SHIFT	16
105 #define MAS6_SAS		0x00000001
106 
107 #define MAS1_GETTID(mas1)	(((mas1) & MAS1_TID_MASK) >> MAS1_TID_SHIFT)
108 
109 #define MAS2_TLB0_ENTRY_IDX_MASK	0x0007f000
110 #define MAS2_TLB0_ENTRY_IDX_SHIFT	12
111 
112 /*
113  * Maximum number of TLB1 entries used for a permanent mapping of kernel
114  * region (kernel image plus statically allocated data).
115  */
116 #define KERNEL_REGION_MAX_TLB_ENTRIES   4
117 
118 #define _TLB_ENTRY_IO	(MAS2_I | MAS2_G)
119 #ifdef SMP
120 #define _TLB_ENTRY_MEM	(MAS2_M)
121 #else
122 #define _TLB_ENTRY_MEM	(0)
123 #endif
124 
125 #define TID_KERNEL	0	/* TLB TID to use for kernel (shared) translations */
126 #define TID_KRESERVED	1	/* Number of TIDs reserved for kernel */
127 #define TID_URESERVED	0	/* Number of TIDs reserved for user */
128 #define TID_MIN		(TID_KRESERVED + TID_URESERVED)
129 #define TID_MAX		255
130 #define TID_NONE	-1
131 
132 #if !defined(LOCORE)
133 typedef struct tlb_entry {
134 	uint32_t mas1;
135 	uint32_t mas2;
136 	uint32_t mas3;
137 } tlb_entry_t;
138 
139 typedef int tlbtid_t;
140 struct pmap;
141 
142 void tlb0_print_tlbentries(void);
143 
144 void tlb1_inval_entry(unsigned int);
145 void tlb1_init(vm_offset_t);
146 void tlb1_print_entries(void);
147 void tlb1_print_tlbentries(void);
148 
149 #endif /* !LOCORE */
150 
151 #endif	/* _MACHINE_TLB_H_ */
152