1 /*- 2 * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 3. All advertising materials mentioning features or use of this software 13 * must display the following acknowledgement: 14 * This product includes software developed under OpenBSD by 15 * Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA. 16 * 4. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 20 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 23 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * $NetBSD: pio.h,v 1.1 1998/05/15 10:15:54 tsubai Exp $ 32 * $OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $ 33 * $FreeBSD$ 34 */ 35 36 #ifndef _MACHINE_PIO_H_ 37 #define _MACHINE_PIO_H_ 38 /* 39 * I/O macros. 40 */ 41 42 /* 43 * Use sync so that bus space operations cannot sneak out the bottom of 44 * mutex-protected sections (mutex release does not guarantee completion of 45 * accesses to caching-inhibited memory on some systems) 46 */ 47 #define powerpc_iomb() __asm __volatile("sync" : : : "memory") 48 49 static __inline void 50 __outb(volatile u_int8_t *a, u_int8_t v) 51 { 52 *a = v; 53 powerpc_iomb(); 54 } 55 56 static __inline void 57 __outw(volatile u_int16_t *a, u_int16_t v) 58 { 59 *a = v; 60 powerpc_iomb(); 61 } 62 63 static __inline void 64 __outl(volatile u_int32_t *a, u_int32_t v) 65 { 66 *a = v; 67 powerpc_iomb(); 68 } 69 70 static __inline void 71 __outll(volatile u_int64_t *a, u_int64_t v) 72 { 73 *a = v; 74 powerpc_iomb(); 75 } 76 77 static __inline void 78 __outwrb(volatile u_int16_t *a, u_int16_t v) 79 { 80 __asm__ volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a)); 81 powerpc_iomb(); 82 } 83 84 static __inline void 85 __outlrb(volatile u_int32_t *a, u_int32_t v) 86 { 87 __asm__ volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a)); 88 powerpc_iomb(); 89 } 90 91 static __inline u_int8_t 92 __inb(volatile u_int8_t *a) 93 { 94 u_int8_t _v_; 95 96 _v_ = *a; 97 powerpc_iomb(); 98 return _v_; 99 } 100 101 static __inline u_int16_t 102 __inw(volatile u_int16_t *a) 103 { 104 u_int16_t _v_; 105 106 _v_ = *a; 107 powerpc_iomb(); 108 return _v_; 109 } 110 111 static __inline u_int32_t 112 __inl(volatile u_int32_t *a) 113 { 114 u_int32_t _v_; 115 116 _v_ = *a; 117 powerpc_iomb(); 118 return _v_; 119 } 120 121 static __inline u_int64_t 122 __inll(volatile u_int64_t *a) 123 { 124 u_int64_t _v_; 125 126 _v_ = *a; 127 powerpc_iomb(); 128 return _v_; 129 } 130 131 static __inline u_int16_t 132 __inwrb(volatile u_int16_t *a) 133 { 134 u_int16_t _v_; 135 136 __asm__ volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a)); 137 powerpc_iomb(); 138 return _v_; 139 } 140 141 static __inline u_int32_t 142 __inlrb(volatile u_int32_t *a) 143 { 144 u_int32_t _v_; 145 146 __asm__ volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a)); 147 powerpc_iomb(); 148 return _v_; 149 } 150 151 #define outb(a,v) (__outb((volatile u_int8_t *)(a), v)) 152 #define out8(a,v) outb(a,v) 153 #define outw(a,v) (__outw((volatile u_int16_t *)(a), v)) 154 #define out16(a,v) outw(a,v) 155 #define outl(a,v) (__outl((volatile u_int32_t *)(a), v)) 156 #define out32(a,v) outl(a,v) 157 #define outll(a,v) (__outll((volatile u_int64_t *)(a), v)) 158 #define out64(a,v) outll(a,v) 159 #define inb(a) (__inb((volatile u_int8_t *)(a))) 160 #define in8(a) inb(a) 161 #define inw(a) (__inw((volatile u_int16_t *)(a))) 162 #define in16(a) inw(a) 163 #define inl(a) (__inl((volatile u_int32_t *)(a))) 164 #define in32(a) inl(a) 165 #define inll(a) (__inll((volatile u_int64_t *)(a))) 166 #define in64(a) inll(a) 167 168 #define out8rb(a,v) outb(a,v) 169 #define outwrb(a,v) (__outwrb((volatile u_int16_t *)(a), v)) 170 #define out16rb(a,v) outwrb(a,v) 171 #define outlrb(a,v) (__outlrb((volatile u_int32_t *)(a), v)) 172 #define out32rb(a,v) outlrb(a,v) 173 #define in8rb(a) inb(a) 174 #define inwrb(a) (__inwrb((volatile u_int16_t *)(a))) 175 #define in16rb(a) inwrb(a) 176 #define inlrb(a) (__inlrb((volatile u_int32_t *)(a))) 177 #define in32rb(a) inlrb(a) 178 179 180 static __inline void 181 __outsb(volatile u_int8_t *a, const u_int8_t *s, size_t c) 182 { 183 while (c--) 184 *a = *s++; 185 powerpc_iomb(); 186 } 187 188 static __inline void 189 __outsw(volatile u_int16_t *a, const u_int16_t *s, size_t c) 190 { 191 while (c--) 192 *a = *s++; 193 powerpc_iomb(); 194 } 195 196 static __inline void 197 __outsl(volatile u_int32_t *a, const u_int32_t *s, size_t c) 198 { 199 while (c--) 200 *a = *s++; 201 powerpc_iomb(); 202 } 203 204 static __inline void 205 __outsll(volatile u_int64_t *a, const u_int64_t *s, size_t c) 206 { 207 while (c--) 208 *a = *s++; 209 powerpc_iomb(); 210 } 211 212 static __inline void 213 __outswrb(volatile u_int16_t *a, const u_int16_t *s, size_t c) 214 { 215 while (c--) 216 __asm__ volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a)); 217 powerpc_iomb(); 218 } 219 220 static __inline void 221 __outslrb(volatile u_int32_t *a, const u_int32_t *s, size_t c) 222 { 223 while (c--) 224 __asm__ volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a)); 225 powerpc_iomb(); 226 } 227 228 static __inline void 229 __insb(volatile u_int8_t *a, u_int8_t *d, size_t c) 230 { 231 while (c--) 232 *d++ = *a; 233 powerpc_iomb(); 234 } 235 236 static __inline void 237 __insw(volatile u_int16_t *a, u_int16_t *d, size_t c) 238 { 239 while (c--) 240 *d++ = *a; 241 powerpc_iomb(); 242 } 243 244 static __inline void 245 __insl(volatile u_int32_t *a, u_int32_t *d, size_t c) 246 { 247 while (c--) 248 *d++ = *a; 249 powerpc_iomb(); 250 } 251 252 static __inline void 253 __insll(volatile u_int64_t *a, u_int64_t *d, size_t c) 254 { 255 while (c--) 256 *d++ = *a; 257 powerpc_iomb(); 258 } 259 260 static __inline void 261 __inswrb(volatile u_int16_t *a, u_int16_t *d, size_t c) 262 { 263 while (c--) 264 __asm__ volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a)); 265 powerpc_iomb(); 266 } 267 268 static __inline void 269 __inslrb(volatile u_int32_t *a, u_int32_t *d, size_t c) 270 { 271 while (c--) 272 __asm__ volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a)); 273 powerpc_iomb(); 274 } 275 276 #define outsb(a,s,c) (__outsb((volatile u_int8_t *)(a), s, c)) 277 #define outs8(a,s,c) outsb(a,s,c) 278 #define outsw(a,s,c) (__outsw((volatile u_int16_t *)(a), s, c)) 279 #define outs16(a,s,c) outsw(a,s,c) 280 #define outsl(a,s,c) (__outsl((volatile u_int32_t *)(a), s, c)) 281 #define outs32(a,s,c) outsl(a,s,c) 282 #define outsll(a,s,c) (__outsll((volatile u_int64_t *)(a), s, c)) 283 #define outs64(a,s,c) outsll(a,s,c) 284 #define insb(a,d,c) (__insb((volatile u_int8_t *)(a), d, c)) 285 #define ins8(a,d,c) insb(a,d,c) 286 #define insw(a,d,c) (__insw((volatile u_int16_t *)(a), d, c)) 287 #define ins16(a,d,c) insw(a,d,c) 288 #define insl(a,d,c) (__insl((volatile u_int32_t *)(a), d, c)) 289 #define ins32(a,d,c) insl(a,d,c) 290 #define insll(a,d,c) (__insll((volatile u_int64_t *)(a), d, c)) 291 #define ins64(a,d,c) insll(a,d,c) 292 293 #define outs8rb(a,s,c) outsb(a,s,c) 294 #define outswrb(a,s,c) (__outswrb((volatile u_int16_t *)(a), s, c)) 295 #define outs16rb(a,s,c) outswrb(a,s,c) 296 #define outslrb(a,s,c) (__outslrb((volatile u_int32_t *)(a), s, c)) 297 #define outs32rb(a,s,c) outslrb(a,s,c) 298 #define ins8rb(a,d,c) insb(a,d,c) 299 #define inswrb(a,d,c) (__inswrb((volatile u_int16_t *)(a), d, c)) 300 #define ins16rb(a,d,c) inswrb(a,d,c) 301 #define inslrb(a,d,c) (__inslrb((volatile u_int32_t *)(a), d, c)) 302 #define ins32rb(a,d,c) inslrb(a,d,c) 303 304 #endif /*_MACHINE_PIO_H_*/ 305