xref: /freebsd/sys/powerpc/include/pcpu.h (revision ddd5b8e9b4d8957fce018c520657cdfa4ecffad3)
1 /*-
2  * Copyright (c) 1999 Luoqi Chen <luoqi@freebsd.org>
3  * Copyright (c) Peter Wemm <peter@netplex.com.au>
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  */
29 
30 #ifndef	_MACHINE_PCPU_H_
31 #define	_MACHINE_PCPU_H_
32 
33 #include <machine/cpufunc.h>
34 #include <machine/slb.h>
35 #include <machine/tlb.h>
36 
37 struct pmap;
38 #define	CPUSAVE_LEN	9
39 
40 #define	PCPU_MD_COMMON_FIELDS						\
41 	int		pc_inside_intr;					\
42 	struct pmap	*pc_curpmap;		/* current pmap */	\
43 	struct thread	*pc_fputhread;		/* current fpu user */  \
44 	struct thread	*pc_vecthread;		/* current vec user */  \
45 	uintptr_t	pc_hwref;					\
46 	uint32_t	pc_pir;						\
47 	int		pc_bsp;						\
48 	volatile int	pc_awake;					\
49 	uint32_t	pc_ipimask;					\
50 	register_t	pc_tempsave[CPUSAVE_LEN];			\
51 	register_t	pc_disisave[CPUSAVE_LEN];			\
52 	register_t	pc_dbsave[CPUSAVE_LEN];
53 
54 #define PCPU_MD_AIM32_FIELDS						\
55 	/* char		__pad[0] */
56 
57 #define PCPU_MD_AIM64_FIELDS						\
58 	struct slb	pc_slb[64];					\
59 	struct slb	**pc_userslb;					\
60 	register_t	pc_slbsave[18];					\
61 	uint8_t		pc_slbstack[1024];				\
62 	char		__pad[1137]
63 
64 #ifdef __powerpc64__
65 #define PCPU_MD_AIM_FIELDS	PCPU_MD_AIM64_FIELDS
66 #else
67 #define PCPU_MD_AIM_FIELDS	PCPU_MD_AIM32_FIELDS
68 #endif
69 
70 #define	BOOKE_CRITSAVE_LEN	(CPUSAVE_LEN + 2)
71 #define	BOOKE_TLB_MAXNEST	3
72 #define	BOOKE_TLB_SAVELEN	16
73 #define	BOOKE_TLBSAVE_LEN	(BOOKE_TLB_SAVELEN * BOOKE_TLB_MAXNEST)
74 
75 #define PCPU_MD_BOOKE_FIELDS						\
76 	register_t	pc_booke_critsave[BOOKE_CRITSAVE_LEN];		\
77 	register_t	pc_booke_mchksave[CPUSAVE_LEN];			\
78 	register_t	pc_booke_tlbsave[BOOKE_TLBSAVE_LEN];		\
79 	register_t	pc_booke_tlb_level;				\
80 	uint32_t	*pc_booke_tlb_lock;				\
81 	int		pc_tid_next;					\
82 	char		__pad[173]
83 
84 /* Definitions for register offsets within the exception tmp save areas */
85 #define	CPUSAVE_R27	0		/* where r27 gets saved */
86 #define	CPUSAVE_R28	1		/* where r28 gets saved */
87 #define	CPUSAVE_R29	2		/* where r29 gets saved */
88 #define	CPUSAVE_R30	3		/* where r30 gets saved */
89 #define	CPUSAVE_R31	4		/* where r31 gets saved */
90 #define	CPUSAVE_AIM_DAR		5	/* where SPR_DAR gets saved */
91 #define	CPUSAVE_AIM_DSISR	6	/* where SPR_DSISR gets saved */
92 #define	CPUSAVE_BOOKE_DEAR	5	/* where SPR_DEAR gets saved */
93 #define	CPUSAVE_BOOKE_ESR	6	/* where SPR_ESR gets saved */
94 #define	CPUSAVE_SRR0	7		/* where SRR0 gets saved */
95 #define	CPUSAVE_SRR1	8		/* where SRR1 gets saved */
96 
97 /* Book-E TLBSAVE is more elaborate */
98 #define TLBSAVE_BOOKE_LR	0
99 #define TLBSAVE_BOOKE_CR	1
100 #define TLBSAVE_BOOKE_SRR0	2
101 #define TLBSAVE_BOOKE_SRR1	3
102 #define TLBSAVE_BOOKE_R20	4
103 #define TLBSAVE_BOOKE_R21	5
104 #define TLBSAVE_BOOKE_R22	6
105 #define TLBSAVE_BOOKE_R23	7
106 #define TLBSAVE_BOOKE_R24	8
107 #define TLBSAVE_BOOKE_R25	9
108 #define TLBSAVE_BOOKE_R26	10
109 #define TLBSAVE_BOOKE_R27	11
110 #define TLBSAVE_BOOKE_R28	12
111 #define TLBSAVE_BOOKE_R29	13
112 #define TLBSAVE_BOOKE_R30	14
113 #define TLBSAVE_BOOKE_R31	15
114 
115 #ifdef AIM
116 #define	PCPU_MD_FIELDS		\
117 	PCPU_MD_COMMON_FIELDS	\
118 	PCPU_MD_AIM_FIELDS
119 #endif
120 #if defined(BOOKE)
121 #define	PCPU_MD_FIELDS		\
122 	PCPU_MD_COMMON_FIELDS	\
123 	PCPU_MD_BOOKE_FIELDS
124 #endif
125 
126 /*
127  * Catch-all for ports (e.g. lsof, used by gtop)
128  */
129 #ifndef PCPU_MD_FIELDS
130 #define	PCPU_MD_FIELDS							\
131 	int		pc_md_placeholder
132 #endif
133 
134 #ifdef _KERNEL
135 
136 #define pcpup	((struct pcpu *) powerpc_get_pcpup())
137 
138 #ifdef AIM /* Book-E not yet adapted */
139 static __inline __pure2 struct thread *
140 __curthread(void)
141 {
142 	struct thread *td;
143 #ifdef __powerpc64__
144 	__asm __volatile("mr %0,13" : "=r"(td));
145 #else
146 	__asm __volatile("mr %0,2" : "=r"(td));
147 #endif
148 	return (td);
149 }
150 #define curthread (__curthread())
151 #endif
152 
153 #define	PCPU_GET(member)	(pcpup->pc_ ## member)
154 
155 /*
156  * XXX The implementation of this operation should be made atomic
157  * with respect to preemption.
158  */
159 #define	PCPU_ADD(member, value)	(pcpup->pc_ ## member += (value))
160 #define	PCPU_INC(member)	PCPU_ADD(member, 1)
161 #define	PCPU_PTR(member)	(&pcpup->pc_ ## member)
162 #define	PCPU_SET(member,value)	(pcpup->pc_ ## member = (value))
163 
164 #endif	/* _KERNEL */
165 
166 #endif	/* !_MACHINE_PCPU_H_ */
167