xref: /freebsd/sys/powerpc/include/pcpu.h (revision c6ec7d31830ab1c80edae95ad5e4b9dba10c47ac)
1 /*-
2  * Copyright (c) 1999 Luoqi Chen <luoqi@freebsd.org>
3  * Copyright (c) Peter Wemm <peter@netplex.com.au>
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  */
29 
30 #ifndef	_MACHINE_PCPU_H_
31 #define	_MACHINE_PCPU_H_
32 
33 #include <machine/cpufunc.h>
34 #include <machine/slb.h>
35 #include <machine/tlb.h>
36 
37 struct pmap;
38 #define	CPUSAVE_LEN	9
39 
40 #define	PCPU_MD_COMMON_FIELDS						\
41 	int		pc_inside_intr;					\
42 	struct pmap	*pc_curpmap;		/* current pmap */	\
43 	struct thread	*pc_fputhread;		/* current fpu user */  \
44 	struct thread	*pc_vecthread;		/* current vec user */  \
45 	uintptr_t	pc_hwref;					\
46 	uint32_t	pc_pir;						\
47 	int		pc_bsp;						\
48 	volatile int	pc_awake;					\
49 	uint32_t	pc_ipimask;					\
50 	register_t	pc_tempsave[CPUSAVE_LEN];			\
51 	register_t	pc_disisave[CPUSAVE_LEN];			\
52 	register_t	pc_dbsave[CPUSAVE_LEN];
53 
54 #define PCPU_MD_AIM32_FIELDS
55 
56 #define PCPU_MD_AIM64_FIELDS						\
57 	struct slb	pc_slb[64];					\
58 	struct slb	**pc_userslb;					\
59 	register_t	pc_slbsave[18];					\
60 	uint8_t		pc_slbstack[1024];
61 
62 #ifdef __powerpc64__
63 #define PCPU_MD_AIM_FIELDS	PCPU_MD_AIM64_FIELDS
64 #else
65 #define PCPU_MD_AIM_FIELDS	PCPU_MD_AIM32_FIELDS
66 #endif
67 
68 #define	BOOKE_CRITSAVE_LEN	(CPUSAVE_LEN + 2)
69 #define	BOOKE_TLB_MAXNEST	3
70 #define	BOOKE_TLB_SAVELEN	16
71 #define	BOOKE_TLBSAVE_LEN	(BOOKE_TLB_SAVELEN * BOOKE_TLB_MAXNEST)
72 
73 #define PCPU_MD_BOOKE_FIELDS						\
74 	register_t	pc_booke_critsave[BOOKE_CRITSAVE_LEN];		\
75 	register_t	pc_booke_mchksave[CPUSAVE_LEN];			\
76 	register_t	pc_booke_tlbsave[BOOKE_TLBSAVE_LEN];		\
77 	register_t	pc_booke_tlb_level;				\
78 	uint32_t	*pc_booke_tlb_lock;				\
79 	int		pc_tid_next;
80 
81 /* Definitions for register offsets within the exception tmp save areas */
82 #define	CPUSAVE_R27	0		/* where r27 gets saved */
83 #define	CPUSAVE_R28	1		/* where r28 gets saved */
84 #define	CPUSAVE_R29	2		/* where r29 gets saved */
85 #define	CPUSAVE_R30	3		/* where r30 gets saved */
86 #define	CPUSAVE_R31	4		/* where r31 gets saved */
87 #define	CPUSAVE_AIM_DAR		5	/* where SPR_DAR gets saved */
88 #define	CPUSAVE_AIM_DSISR	6	/* where SPR_DSISR gets saved */
89 #define	CPUSAVE_BOOKE_DEAR	5	/* where SPR_DEAR gets saved */
90 #define	CPUSAVE_BOOKE_ESR	6	/* where SPR_ESR gets saved */
91 #define	CPUSAVE_SRR0	7		/* where SRR0 gets saved */
92 #define	CPUSAVE_SRR1	8		/* where SRR1 gets saved */
93 
94 /* Book-E TLBSAVE is more elaborate */
95 #define TLBSAVE_BOOKE_LR	0
96 #define TLBSAVE_BOOKE_CR	1
97 #define TLBSAVE_BOOKE_SRR0	2
98 #define TLBSAVE_BOOKE_SRR1	3
99 #define TLBSAVE_BOOKE_R20	4
100 #define TLBSAVE_BOOKE_R21	5
101 #define TLBSAVE_BOOKE_R22	6
102 #define TLBSAVE_BOOKE_R23	7
103 #define TLBSAVE_BOOKE_R24	8
104 #define TLBSAVE_BOOKE_R25	9
105 #define TLBSAVE_BOOKE_R26	10
106 #define TLBSAVE_BOOKE_R27	11
107 #define TLBSAVE_BOOKE_R28	12
108 #define TLBSAVE_BOOKE_R29	13
109 #define TLBSAVE_BOOKE_R30	14
110 #define TLBSAVE_BOOKE_R31	15
111 
112 #ifndef COMPILING_LINT
113 #ifdef AIM
114 #define	PCPU_MD_FIELDS		\
115 	PCPU_MD_COMMON_FIELDS	\
116 	PCPU_MD_AIM_FIELDS
117 #endif
118 #if defined(BOOKE)
119 #define	PCPU_MD_FIELDS		\
120 	PCPU_MD_COMMON_FIELDS	\
121 	PCPU_MD_BOOKE_FIELDS
122 #endif
123 #else
124 #define	PCPU_MD_FIELDS		\
125 	PCPU_MD_COMMON_FIELDS	\
126 	PCPU_MD_AIM_FIELDS	\
127 	PCPU_MD_BOOKE_FIELDS
128 #endif
129 /*
130  * Catch-all for ports (e.g. lsof, used by gtop)
131  */
132 #ifndef PCPU_MD_FIELDS
133 #define	PCPU_MD_FIELDS							\
134 	int		pc_md_placeholder
135 #endif
136 
137 #ifdef _KERNEL
138 
139 #define pcpup	((struct pcpu *) powerpc_get_pcpup())
140 
141 #ifdef AIM /* Book-E not yet adapted */
142 static __inline __pure2 struct thread *
143 __curthread(void)
144 {
145 	struct thread *td;
146 #ifdef __powerpc64__
147 	__asm __volatile("mr %0,13" : "=r"(td));
148 #else
149 	__asm __volatile("mr %0,2" : "=r"(td));
150 #endif
151 	return (td);
152 }
153 #define curthread (__curthread())
154 #endif
155 
156 #define	PCPU_GET(member)	(pcpup->pc_ ## member)
157 
158 /*
159  * XXX The implementation of this operation should be made atomic
160  * with respect to preemption.
161  */
162 #define	PCPU_ADD(member, value)	(pcpup->pc_ ## member += (value))
163 #define	PCPU_INC(member)	PCPU_ADD(member, 1)
164 #define	PCPU_PTR(member)	(&pcpup->pc_ ## member)
165 #define	PCPU_SET(member,value)	(pcpup->pc_ ## member = (value))
166 
167 #endif	/* _KERNEL */
168 
169 #endif	/* !_MACHINE_PCPU_H_ */
170