xref: /freebsd/sys/powerpc/include/pcpu.h (revision b3f7a438bb233c85290dcdc5241d86c49100b6b7)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 1999 Luoqi Chen <luoqi@freebsd.org>
5  * Copyright (c) Peter Wemm <peter@netplex.com.au>
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  */
29 
30 #ifndef	_MACHINE_PCPU_H_
31 #define	_MACHINE_PCPU_H_
32 
33 #include <machine/cpufunc.h>
34 #include <machine/slb.h>
35 #include <machine/tlb.h>
36 
37 struct pmap;
38 struct pvo_entry;
39 #define	CPUSAVE_LEN	9
40 
41 #define	PCPU_MD_COMMON_FIELDS						\
42 	int		pc_inside_intr;					\
43 	struct pmap	*pc_curpmap;		/* current pmap */	\
44 	struct thread	*pc_fputhread;		/* current fpu user */  \
45 	struct thread	*pc_vecthread;		/* current vec user */  \
46 	struct thread	*pc_htmthread;		/* current htm user */  \
47 	uintptr_t	pc_hwref;					\
48 	uintptr_t	pc_pic;						\
49 	int		pc_bsp;						\
50 	volatile int	pc_awake;					\
51 	uint32_t	pc_ipimask;					\
52 	uint32_t	pc_flags;		/* cpu feature flags */ \
53 	register_t	pc_tempsave[CPUSAVE_LEN];			\
54 	register_t	pc_disisave[CPUSAVE_LEN];			\
55 	register_t	pc_dbsave[CPUSAVE_LEN];				\
56 	void		*pc_restore;					\
57 	void		*pc_qmap_addr;
58 
59 #define PCPU_MD_AIM32_FIELDS						\
60 	struct pvo_entry *qmap_pvo;					\
61 	struct mtx	qmap_lock;					\
62 	char		__pad[128];
63 
64 #define PCPU_MD_AIM64_FIELDS						\
65 	struct slb	slb[64];					\
66 	struct slb	**userslb;					\
67 	register_t	slbsave[18];					\
68 	uint8_t		slbstack[1024];				\
69 	struct pvo_entry *qmap_pvo;					\
70 	struct mtx	qmap_lock;					\
71 	uint64_t	opal_hmi_flags;					\
72 	char		__pad[1337];
73 
74 #ifdef __powerpc64__
75 #define PCPU_MD_AIM_FIELDS	PCPU_MD_AIM64_FIELDS
76 #else
77 #define PCPU_MD_AIM_FIELDS	PCPU_MD_AIM32_FIELDS
78 #endif
79 
80 /* CPU feature flags, can be used for cached flow control. */
81 #define	PC_FLAG_NOSRS		0x80000000
82 
83 #define	BOOKE_CRITSAVE_LEN	(CPUSAVE_LEN + 2)
84 #define	BOOKE_TLB_MAXNEST	4
85 #define	BOOKE_TLB_SAVELEN	16
86 #define	BOOKE_TLBSAVE_LEN	(BOOKE_TLB_SAVELEN * BOOKE_TLB_MAXNEST)
87 
88 /*
89  * Stack used by critical-class interrupts taken in kernel mode.  Sized for the
90  * full panic path (powerpc_interrupt -> trap_fatal -> printf -> backtrace),
91  * since that is the only thing that ever runs on it.
92  */
93 #define	BOOKE_CRITSTACK_SIZE	16384
94 
95 #ifdef __powerpc64__
96 #define	BOOKE_PCPU_PAD	869
97 #else
98 #define	BOOKE_PCPU_PAD	349
99 #endif
100 #define PCPU_MD_BOOKE_FIELDS						\
101 	register_t	critsave[BOOKE_CRITSAVE_LEN];		\
102 	register_t	mchksave[BOOKE_CRITSAVE_LEN];		\
103 	register_t	tlbsave[BOOKE_TLBSAVE_LEN];		\
104 	register_t	tlb_level;				\
105 	uintptr_t	*tlb_lock;				\
106 	void		*critstack;				\
107 	void		*mchkstack;				\
108 	int		tid_next;					\
109 	char		__pad[BOOKE_PCPU_PAD];
110 
111 /* Definitions for register offsets within the exception tmp save areas */
112 #define	CPUSAVE_R27	0		/* where r27 gets saved */
113 #define	CPUSAVE_R28	1		/* where r28 gets saved */
114 #define	CPUSAVE_R29	2		/* where r29 gets saved */
115 #define	CPUSAVE_R30	3		/* where r30 gets saved */
116 #define	CPUSAVE_R31	4		/* where r31 gets saved */
117 #define	CPUSAVE_AIM_DAR		5	/* where SPR_DAR gets saved */
118 #define	CPUSAVE_AIM_DSISR	6	/* where SPR_DSISR gets saved */
119 #define	CPUSAVE_BOOKE_DEAR	5	/* where SPR_DEAR gets saved */
120 #define	CPUSAVE_BOOKE_ESR	6	/* where SPR_ESR gets saved */
121 #define	CPUSAVE_SRR0	7		/* where SRR0 gets saved */
122 #define	CPUSAVE_SRR1	8		/* where SRR1 gets saved */
123 #define	BOOKE_CRITSAVE_SRR0	9	/* where real SRR0 gets saved (critical) */
124 #define	BOOKE_CRITSAVE_SRR1	10	/* where real SRR0 gets saved (critical) */
125 
126 /* Book-E TLBSAVE is more elaborate */
127 #define TLBSAVE_BOOKE_LR	0
128 #define TLBSAVE_BOOKE_CR	1
129 #define TLBSAVE_BOOKE_SRR0	2
130 #define TLBSAVE_BOOKE_SRR1	3
131 #define TLBSAVE_BOOKE_R20	4
132 #define TLBSAVE_BOOKE_R21	5
133 #define TLBSAVE_BOOKE_R22	6
134 #define TLBSAVE_BOOKE_R23	7
135 #define TLBSAVE_BOOKE_R24	8
136 #define TLBSAVE_BOOKE_R25	9
137 #define TLBSAVE_BOOKE_R26	10
138 #define TLBSAVE_BOOKE_R27	11
139 #define TLBSAVE_BOOKE_R28	12
140 #define TLBSAVE_BOOKE_R29	13
141 #define TLBSAVE_BOOKE_R30	14
142 #define TLBSAVE_BOOKE_R31	15
143 
144 #define	PCPU_MD_FIELDS		\
145 	PCPU_MD_COMMON_FIELDS	\
146 	union {			\
147 	    struct {		\
148 		PCPU_MD_AIM_FIELDS	\
149 	    } pc_aim;		\
150 	    struct {		\
151 		PCPU_MD_BOOKE_FIELDS	\
152 	    } pc_booke;		\
153 	}
154 
155 #ifdef _KERNEL
156 
157 #define pcpup	(get_pcpu())
158 
159 static __inline __pure2 struct thread *
160 __curthread(void)
161 {
162 	struct thread *td;
163 #ifdef __powerpc64__
164 	__asm __volatile("mr %0,13" : "=r"(td));
165 #else
166 	__asm __volatile("mr %0,2" : "=r"(td));
167 #endif
168 	return (td);
169 }
170 #define curthread (__curthread())
171 
172 #define	PCPU_GET(member)	(pcpup->pc_ ## member)
173 
174 /*
175  * XXX The implementation of this operation should be made atomic
176  * with respect to preemption.
177  */
178 #define	PCPU_ADD(member, value)	(pcpup->pc_ ## member += (value))
179 #define	PCPU_PTR(member)	(&pcpup->pc_ ## member)
180 #define	PCPU_SET(member,value)	(pcpup->pc_ ## member = (value))
181 
182 #endif	/* _KERNEL */
183 
184 #endif	/* !_MACHINE_PCPU_H_ */
185