1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 2001 David E. O'Brien 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 */ 39 40 #ifndef _POWERPC_INCLUDE_PARAM_H_ 41 #define _POWERPC_INCLUDE_PARAM_H_ 42 43 /* 44 * Machine dependent constants for PowerPC 45 */ 46 47 #include <machine/_align.h> 48 49 /* Needed to display interrupts on OFW PCI */ 50 #define __PCI_REROUTE_INTERRUPT 51 52 #ifndef MACHINE 53 #define MACHINE "powerpc" 54 #endif 55 #ifndef MACHINE_ARCH 56 #ifdef __powerpc64__ 57 #if defined(__LITTLE_ENDIAN__) 58 #define MACHINE_ARCH "powerpc64le" 59 #else 60 #define MACHINE_ARCH "powerpc64" 61 #endif 62 #else 63 #ifdef __SPE__ 64 #define MACHINE_ARCH "powerpcspe" 65 #else 66 #define MACHINE_ARCH "powerpc" 67 #endif 68 #endif 69 #endif 70 #define MID_MACHINE MID_POWERPC 71 #ifdef __powerpc64__ 72 #ifndef MACHINE_ARCH32 73 #define MACHINE_ARCH32 "powerpc" 74 #endif 75 #endif 76 77 #ifdef SMP 78 #ifndef MAXCPU 79 #define MAXCPU 256 80 #endif 81 #else 82 #define MAXCPU 1 83 #endif 84 85 #ifndef MAXMEMDOM 86 #define MAXMEMDOM 8 87 #endif 88 89 #define ALIGNBYTES _ALIGNBYTES 90 #define ALIGN(p) _ALIGN(p) 91 /* 92 * ALIGNED_POINTER is a boolean macro that checks whether an address 93 * is valid to fetch data elements of type t from on this architecture. 94 * This does not reflect the optimal alignment, just the possibility 95 * (within reasonable limits). 96 */ 97 #define ALIGNED_POINTER(p, t) ((((uintptr_t)(p)) & (sizeof (t) - 1)) == 0) 98 99 /* 100 * CACHE_LINE_SIZE is the compile-time maximum cache line size for an 101 * architecture. It should be used with appropriate caution. 102 */ 103 #define CACHE_LINE_SHIFT 7 104 #define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT) 105 106 #define PAGE_SHIFT 12 107 #define PAGE_SIZE (1 << PAGE_SHIFT) /* Page size */ 108 #define PAGE_MASK (PAGE_SIZE - 1) 109 #define NPTEPG (PAGE_SIZE/(sizeof (pt_entry_t))) 110 #define NPDEPG (PAGE_SIZE/(sizeof (pt_entry_t))) 111 112 #define L1_PAGE_SIZE_SHIFT 39 113 #define L1_PAGE_SIZE (1UL<<L1_PAGE_SIZE_SHIFT) 114 #define L1_PAGE_MASK (L1_PAGE_SIZE-1) 115 116 #define L2_PAGE_SIZE_SHIFT 30 117 #define L2_PAGE_SIZE (1UL<<L2_PAGE_SIZE_SHIFT) 118 #define L2_PAGE_MASK (L2_PAGE_SIZE-1) 119 120 #define L3_PAGE_SIZE_SHIFT 21 121 #define L3_PAGE_SIZE (1UL<<L3_PAGE_SIZE_SHIFT) 122 #define L3_PAGE_MASK (L3_PAGE_SIZE-1) 123 124 #define MAXPAGESIZES 3 /* maximum number of supported page sizes */ 125 126 #define RELOCATABLE_KERNEL 1 /* kernel may relocate during startup */ 127 128 #ifndef KSTACK_PAGES 129 #ifdef __powerpc64__ 130 #define KSTACK_PAGES 12 /* includes pcb */ 131 #else 132 #define KSTACK_PAGES 4 /* includes pcb */ 133 #endif 134 #endif 135 #define KSTACK_GUARD_PAGES 1 /* pages of kstack guard; 0 disables */ 136 #define USPACE (kstack_pages * PAGE_SIZE) /* total size of pcb */ 137 138 #define COPYFAULT 0x1 139 #define FUSUFAULT 0x2 140 141 /* 142 * Mach derived conversion macros 143 */ 144 #define trunc_page(x) ((x) & ~(PAGE_MASK)) 145 #define round_page(x) (((x) + PAGE_MASK) & ~PAGE_MASK) 146 #define trunc_2mpage(x) ((unsigned long)(x) & ~L3_PAGE_MASK) 147 #define round_2mpage(x) ((((unsigned long)(x)) + L3_PAGE_MASK) & ~L3_PAGE_MASK) 148 #define trunc_1gpage(x) ((unsigned long)(x) & ~L2_PAGE_MASK) 149 150 #define atop(x) ((x) >> PAGE_SHIFT) 151 #define ptoa(x) ((x) << PAGE_SHIFT) 152 153 #define powerpc_btop(x) ((x) >> PAGE_SHIFT) 154 #define powerpc_ptob(x) ((x) << PAGE_SHIFT) 155 156 #define pgtok(x) ((x) * (PAGE_SIZE / 1024UL)) 157 158 #define btoc(x) ((vm_offset_t)(((x)+PAGE_MASK)>>PAGE_SHIFT)) 159 160 #endif /* !_POWERPC_INCLUDE_PARAM_H_ */ 161