xref: /freebsd/sys/powerpc/include/hid.h (revision 9e8e140099cade5ade805070c8205a09fae81b8e)
119ca68d9SBenno Rice /*-
219ca68d9SBenno Rice  * Copyright (c) 2000 Tsubai Masanari.  All rights reserved.
319ca68d9SBenno Rice  *
419ca68d9SBenno Rice  * Redistribution and use in source and binary forms, with or without
519ca68d9SBenno Rice  * modification, are permitted provided that the following conditions
619ca68d9SBenno Rice  * are met:
719ca68d9SBenno Rice  * 1. Redistributions of source code must retain the above copyright
819ca68d9SBenno Rice  *    notice, this list of conditions and the following disclaimer.
919ca68d9SBenno Rice  * 2. Redistributions in binary form must reproduce the above copyright
1019ca68d9SBenno Rice  *    notice, this list of conditions and the following disclaimer in the
1119ca68d9SBenno Rice  *    documentation and/or other materials provided with the distribution.
1219ca68d9SBenno Rice  * 3. The name of the author may not be used to endorse or promote products
1319ca68d9SBenno Rice  *    derived from this software without specific prior written permission.
1419ca68d9SBenno Rice  *
1519ca68d9SBenno Rice  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
1619ca68d9SBenno Rice  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
1719ca68d9SBenno Rice  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
1819ca68d9SBenno Rice  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
1919ca68d9SBenno Rice  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2019ca68d9SBenno Rice  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2119ca68d9SBenno Rice  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2219ca68d9SBenno Rice  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2319ca68d9SBenno Rice  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
2419ca68d9SBenno Rice  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2519ca68d9SBenno Rice  *
2619ca68d9SBenno Rice  * $NetBSD: hid.h,v 1.2 2001/08/22 21:05:25 matt Exp $
2719ca68d9SBenno Rice  * $FreeBSD$
2819ca68d9SBenno Rice  */
2919ca68d9SBenno Rice 
3019ca68d9SBenno Rice #ifndef _POWERPC_HID_H_
3119ca68d9SBenno Rice #define _POWERPC_HID_H_
3219ca68d9SBenno Rice 
3319ca68d9SBenno Rice /* Hardware Implementation Dependent registers for the PowerPC */
3419ca68d9SBenno Rice 
3519ca68d9SBenno Rice #define HID0_EMCP	0x80000000  /* Enable MCP */
3619ca68d9SBenno Rice #define HID0_DBP	0x40000000  /* Disable 60x bus parity generation */
3719ca68d9SBenno Rice #define HID0_EBA	0x20000000  /* Enable 60x bus address parity checking */
3819ca68d9SBenno Rice #define HID0_EBD	0x10000000  /* Enable 60x bus data parity checking */
3919ca68d9SBenno Rice #define HID0_BCLK	0x08000000  /* CLK_OUT clock type selection */
4019ca68d9SBenno Rice #define HID0_EICE	0x04000000  /* Enable ICE output */
4119ca68d9SBenno Rice #define HID0_TBEN	0x04000000  /* Time base enable (7450) */
4219ca68d9SBenno Rice #define HID0_ECLK	0x02000000  /* CLK_OUT clock type selection */
4319ca68d9SBenno Rice #define HID0_PAR	0x01000000  /* Disable precharge of ARTRY */
4419ca68d9SBenno Rice #define HID0_STEN	0x01000000  /* Software table search enable (7450) */
459e8e1400SPeter Grehan #define HID0_HBATEN	0x00800000  /* High BAT enable (74[45][578])  */
4619ca68d9SBenno Rice #define HID0_DOZE	0x00800000  /* Enable doze mode */
4719ca68d9SBenno Rice #define HID0_NAP	0x00400000  /* Enable nap mode */
4819ca68d9SBenno Rice #define HID0_SLEEP	0x00200000  /* Enable sleep mode */
4919ca68d9SBenno Rice #define HID0_DPM	0x00100000  /* Enable Dynamic power management */
5019ca68d9SBenno Rice #define HID0_RISEG	0x00080000  /* Read I-SEG */
519e8e1400SPeter Grehan #define HID0_BHTCLR	0x00040000  /* Clear branch history table (7450) */
5219ca68d9SBenno Rice #define HID0_EIEC	0x00040000  /* Enable internal error checking */
539e8e1400SPeter Grehan #define HID0_XAEN	0x00020000  /* Enable eXtended Addressing (7450) */
5419ca68d9SBenno Rice #define HID0_NHR	0x00010000  /* Not hard reset */
5519ca68d9SBenno Rice #define HID0_ICE	0x00008000  /* Enable i-cache */
5619ca68d9SBenno Rice #define HID0_DCE	0x00004000  /* Enable d-cache */
5719ca68d9SBenno Rice #define HID0_ILOCK	0x00002000  /* i-cache lock */
5819ca68d9SBenno Rice #define HID0_DLOCK	0x00001000  /* d-cache lock */
5919ca68d9SBenno Rice #define HID0_ICFI	0x00000800  /* i-cache flush invalidate */
6019ca68d9SBenno Rice #define HID0_DCFI	0x00000400  /* d-cache flush invalidate */
6119ca68d9SBenno Rice #define HID0_SPD	0x00000200  /* Disable speculative cache access */
62e6d3e1c2SPeter Grehan #define HID0_XBSEN	0x00000100  /* Extended BAT block-size enable (7457) */
6319ca68d9SBenno Rice #define HID0_IFEM	0x00000100  /* Enable M-bit for I-fetch */
649e8e1400SPeter Grehan #define HID0_XBSEN	0x00000100  /* Extended BAT block size enable (7455+)*/
6519ca68d9SBenno Rice #define HID0_SGE	0x00000080  /* Enable store gathering */
6619ca68d9SBenno Rice #define HID0_DCFA	0x00000040  /* Data cache flush assist */
6719ca68d9SBenno Rice #define HID0_BTIC	0x00000020  /* Enable BTIC */
689e8e1400SPeter Grehan #define HID0_LRSTK      0x00000010  /* Link register stack enable (7450) */
6919ca68d9SBenno Rice #define HID0_ABE	0x00000008  /* Enable address broadcast */
709e8e1400SPeter Grehan #define HID0_FOLD       0x00000008  /* Branch folding enable (7450) */
7119ca68d9SBenno Rice #define HID0_BHT	0x00000004  /* Enable branch history table */
7219ca68d9SBenno Rice #define HID0_NOPTI	0x00000001  /* No-op the dcbt(st) */
7319ca68d9SBenno Rice 
7419ca68d9SBenno Rice #define HID0_BITMASK							\
7519ca68d9SBenno Rice     "\20"								\
7619ca68d9SBenno Rice     "\040EMCP\037DBP\036EBA\035EBD\034BCLK\033EICE\032ECLK\031PAR"	\
7719ca68d9SBenno Rice     "\030DOZE\027NAP\026SLEEP\025DPM\024RISEG\023EIEC\022res\021NHR"	\
7819ca68d9SBenno Rice     "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011IFEM"	\
7919ca68d9SBenno Rice     "\010SGE\007DCFA\006BTIC\005FBIOB\004ABE\003BHT\002NOPDST\001NOPTI"
8019ca68d9SBenno Rice 
8119ca68d9SBenno Rice #define HID0_7450_BITMASK						\
8219ca68d9SBenno Rice     "\20"								\
8319ca68d9SBenno Rice     "\040EMCP\037b1\036b2\035b3\034b4\033TBEN\032b6\031STEN"		\
84e6d3e1c2SPeter Grehan     "\030HBATEN\027NAP\026SLEEP\025DPM\024b12\023BHTCLR\022XAEN\021NHR"	\
85e6d3e1c2SPeter Grehan     "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011XBSEN"	\
8619ca68d9SBenno Rice     "\010SGE\007b25\006BTIC\005LRSTK\004FOLD\003BHT\002NOPDST\001NOPTI"
8719ca68d9SBenno Rice 
8819ca68d9SBenno Rice /*
8919ca68d9SBenno Rice  *  HID0 bit definitions per cpu model
9019ca68d9SBenno Rice  *
91e6d3e1c2SPeter Grehan  * bit	603	604	750	7400	7410   7450    7457
92e6d3e1c2SPeter Grehan  *   0	EMCP	EMCP	EMCP	EMCP	EMCP   -       -
93e6d3e1c2SPeter Grehan  *   1	-	ECP	DBP	-	-      -       -
94e6d3e1c2SPeter Grehan  *   2	EBA	EBA	EBA	EBA	EDA    -       -
95e6d3e1c2SPeter Grehan  *   3	EBD	EBD	EBD	EBD	EBD    -       -
96e6d3e1c2SPeter Grehan  *   4	SBCLK	-	BCLK	BCKL	BCLK   -       -
97e6d3e1c2SPeter Grehan  *   5	EICE	-	-	-	-      TBEN    TBEN
98e6d3e1c2SPeter Grehan  *   6	ECLK	-	ECLK	ECLK	ECLK   -       -
99e6d3e1c2SPeter Grehan  *   7	PAR	PAR	PAR	PAR	PAR    STEN    STEN
100e6d3e1c2SPeter Grehan  *   8	DOZE	-	DOZE	DOZE	DOZE   -       HBATEN
101e6d3e1c2SPeter Grehan  *   9	NAP	-	NAP	NAP	NAP    NAP     NAP
102e6d3e1c2SPeter Grehan  *  10	SLEEP	-	SLEEP	SLEEP	SLEEP  SLEEP   SLEEP
103e6d3e1c2SPeter Grehan  *  11	DPM	-	DPM	DPM	DPM    DPM     DPM
104e6d3e1c2SPeter Grehan  *  12	RISEG	-	-	RISEG	-      -       -
105e6d3e1c2SPeter Grehan  *  13	-	-	-	EIEC	EIEC   BHTCLR  BHTCLR
106e6d3e1c2SPeter Grehan  *  14	-	-	-	-	-      XAEN    XAEN
107e6d3e1c2SPeter Grehan  *  15	-	NHR	NHR	NHR	NHR    NHR     NHR
108e6d3e1c2SPeter Grehan  *  16	ICE	ICE	ICE	ICE	ICE    ICE     ICE
109e6d3e1c2SPeter Grehan  *  17	DCE	DCE	DCE	DCE	DCE    DCE     DCE
110e6d3e1c2SPeter Grehan  *  18	ILOCK	ILOCK	ILOCK	ILOCK	ILOCK  ILOCK   ILOCK
111e6d3e1c2SPeter Grehan  *  19	DLOCK	DLOCK	DLOCK	DLOCK	DLOCK  DLOCK   DLOCK
112e6d3e1c2SPeter Grehan  *  20	ICFI	ICFI	ICFI	ICFI	ICFI   ICFI    ICFI
113e6d3e1c2SPeter Grehan  *  21	DCFI	DCFI	DCFI	DCFI	DCFI   DCFI    DCFI
114e6d3e1c2SPeter Grehan  *  22	-	-	SPD	SPD	SPG    SPD     SPD
115e6d3e1c2SPeter Grehan  *  23	-	-	IFEM	IFTT	IFTT   -       XBSEN
116e6d3e1c2SPeter Grehan  *  24	-	SIE	SGE	SGE	SGE    SGE     SGE
117e6d3e1c2SPeter Grehan  *  25	-	-	DCFA	DCFA	DCFA   -       -
118e6d3e1c2SPeter Grehan  *  26	-	-	BTIC	BTIC	BTIC   BTIC    BTIC
119e6d3e1c2SPeter Grehan  *  27	FBIOB	-	-	-	-      LRSTK   LRSTK
120e6d3e1c2SPeter Grehan  *  28	-	-	ABE	-	-      FOLD    FOLD
121e6d3e1c2SPeter Grehan  *  29	-	BHT	BHT	BHT	BHT    BHT     BHT
122e6d3e1c2SPeter Grehan  *  30	-	-	-	NOPDST	NOPDST NOPDST  NOPDST
123e6d3e1c2SPeter Grehan  *  31	NOOPTI	-	NOOPTI	NOPTI	NOPTI  NOPTI   NOPTI
12419ca68d9SBenno Rice  *
12519ca68d9SBenno Rice  *  604: ECP = Enable cache parity checking
12619ca68d9SBenno Rice  *  604: SIE = Serial instruction execution disable
12719ca68d9SBenno Rice  * 7450: TBEN = Time Base Enable
12819ca68d9SBenno Rice  * 7450: STEN = Software table lookup enable
12919ca68d9SBenno Rice  * 7450: BHTCLR = Branch history clear
130e6d3e1c2SPeter Grehan  * 7450: XAEN = Extended Addressing Enabled
13119ca68d9SBenno Rice  * 7450: LRSTK = Link Register Stack Enable
13219ca68d9SBenno Rice  * 7450: FOLD = Branch folding enable
133e6d3e1c2SPeter Grehan  * 7457: HBATEN = High BAT Enable
134e6d3e1c2SPeter Grehan  * 7457: XBSEN = Extended BAT Block Size Enable
13519ca68d9SBenno Rice  */
13619ca68d9SBenno Rice 
13719ca68d9SBenno Rice #endif /* _POWERPC_HID_H_ */
138