xref: /freebsd/sys/powerpc/include/frame.h (revision b57e802a8521cd90a2f8e3f2612ac107ac9a3591)
1fb75554eSBenno Rice /*
2fb75554eSBenno Rice  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
3fb75554eSBenno Rice  * Copyright (C) 1995, 1996 TooLs GmbH.
4fb75554eSBenno Rice  * All rights reserved.
5fb75554eSBenno Rice  *
6fb75554eSBenno Rice  * Redistribution and use in source and binary forms, with or without
7fb75554eSBenno Rice  * modification, are permitted provided that the following conditions
8fb75554eSBenno Rice  * are met:
9fb75554eSBenno Rice  * 1. Redistributions of source code must retain the above copyright
10fb75554eSBenno Rice  *    notice, this list of conditions and the following disclaimer.
11fb75554eSBenno Rice  * 2. Redistributions in binary form must reproduce the above copyright
12fb75554eSBenno Rice  *    notice, this list of conditions and the following disclaimer in the
13fb75554eSBenno Rice  *    documentation and/or other materials provided with the distribution.
14fb75554eSBenno Rice  * 3. All advertising materials mentioning features or use of this software
15fb75554eSBenno Rice  *    must display the following acknowledgement:
16fb75554eSBenno Rice  *	This product includes software developed by TooLs GmbH.
17fb75554eSBenno Rice  * 4. The name of TooLs GmbH may not be used to endorse or promote products
18fb75554eSBenno Rice  *    derived from this software without specific prior written permission.
19fb75554eSBenno Rice  *
20fb75554eSBenno Rice  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
21fb75554eSBenno Rice  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22fb75554eSBenno Rice  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23fb75554eSBenno Rice  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24fb75554eSBenno Rice  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25fb75554eSBenno Rice  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26fb75554eSBenno Rice  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27fb75554eSBenno Rice  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28fb75554eSBenno Rice  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29fb75554eSBenno Rice  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30dfeade78SDavid E. O'Brien  *
31dfeade78SDavid E. O'Brien  *	$NetBSD: frame.h,v 1.2 1999/01/10 10:13:15 tsubai Exp $
32dfeade78SDavid E. O'Brien  * $FreeBSD$
33fb75554eSBenno Rice  */
34dfeade78SDavid E. O'Brien 
35fb75554eSBenno Rice #ifndef	_MACHINE_FRAME_H_
36fb75554eSBenno Rice #define	_MACHINE_FRAME_H_
37fb75554eSBenno Rice 
38fb75554eSBenno Rice #include <machine/types.h>
39fb75554eSBenno Rice 
40fb75554eSBenno Rice /*
41fb75554eSBenno Rice  * We have to save all registers on every trap, because
42fb75554eSBenno Rice  *	1. user could attach this process every time
43fb75554eSBenno Rice  *	2. we must be able to restore all user registers in case of fork
44fb75554eSBenno Rice  * Actually, we do not save the fp registers on trap, since
45fb75554eSBenno Rice  * these are not used by the kernel. They are saved only when switching
46fb75554eSBenno Rice  * between processes using the FPU.
47fb75554eSBenno Rice  *
48fb75554eSBenno Rice  * Change ordering to cluster together these register_t's.		XXX
49fb75554eSBenno Rice  */
50fb75554eSBenno Rice struct trapframe {
51fb75554eSBenno Rice 	register_t fixreg[32];
52fb75554eSBenno Rice 	register_t lr;
53fb75554eSBenno Rice 	int cr;
54fb75554eSBenno Rice 	int xer;
55fb75554eSBenno Rice 	register_t ctr;
56fb75554eSBenno Rice 	register_t srr0;
57fb75554eSBenno Rice 	register_t srr1;
58fb75554eSBenno Rice 	register_t dar;		/* dar & dsisr are only filled on a DSI trap */
59fb75554eSBenno Rice 	int dsisr;
60fb75554eSBenno Rice 	int exc;
61fb75554eSBenno Rice };
62fb75554eSBenno Rice /*
63fb75554eSBenno Rice  * This is to ensure alignment of the stackpointer
64fb75554eSBenno Rice  */
65fb75554eSBenno Rice #define	FRAMELEN	roundup(sizeof(struct trapframe) + 8, 16)
665fd2c51eSMark Peek #define	trapframe(td)	((td)->td_frame)
67fb75554eSBenno Rice 
68fb75554eSBenno Rice struct switchframe {
69fb75554eSBenno Rice 	register_t sp;
704eed0cf1SBenno Rice 	register_t fill;
714eed0cf1SBenno Rice 	register_t user_sr;
724eed0cf1SBenno Rice 	register_t cr;
73fb75554eSBenno Rice 	register_t fixreg2;
74fb75554eSBenno Rice 	register_t fixreg[19];		/* R13-R31 */
75fb75554eSBenno Rice };
76fb75554eSBenno Rice 
77fb75554eSBenno Rice struct clockframe {
78fb75554eSBenno Rice 	register_t srr1;
79fb75554eSBenno Rice 	register_t srr0;
80fb75554eSBenno Rice 	int pri;
81fb75554eSBenno Rice 	int depth;
82fb75554eSBenno Rice };
83fb75554eSBenno Rice 
84fb75554eSBenno Rice /*
85fb75554eSBenno Rice  * Call frame for PowerPC used during fork.
86fb75554eSBenno Rice  */
87fb75554eSBenno Rice struct callframe {
884eed0cf1SBenno Rice 	register_t	cf_func;
894eed0cf1SBenno Rice 	register_t	cf_arg0;
904eed0cf1SBenno Rice 	register_t	cf_arg1;
91fb75554eSBenno Rice };
92fb75554eSBenno Rice 
93b57e802aSBenno Rice #define	IFRAMELEN	sizeof(struct intrframe)
94b57e802aSBenno Rice struct intrframe {
95b57e802aSBenno Rice 	register_t r1;			/*  0 */
96b57e802aSBenno Rice 	register_t _pad4;		/*  4 */
97b57e802aSBenno Rice 	/*
98b57e802aSBenno Rice 	 * The next 4 fields are "clockframe"
99b57e802aSBenno Rice 	 */
100b57e802aSBenno Rice 	register_t srr1;		/*  8 */
101b57e802aSBenno Rice 	register_t srr0;		/* 12 */
102b57e802aSBenno Rice 	int pri;			/* 16 */
103b57e802aSBenno Rice 	int intr_depth;			/* 20 */
104b57e802aSBenno Rice 	register_t vrsave;		/* 24 */
105b57e802aSBenno Rice 	register_t ctr;			/* 28 */
106b57e802aSBenno Rice 	register_t xer;			/* 32 */
107b57e802aSBenno Rice 	register_t cr;			/* 36 */
108b57e802aSBenno Rice 	register_t lr;			/* 40 */
109b57e802aSBenno Rice 	register_t r12;			/* 44 */
110b57e802aSBenno Rice 	register_t r11;			/* 48 */
111b57e802aSBenno Rice 	register_t r10;			/* 52 */
112b57e802aSBenno Rice 	register_t r9;			/* 56 */
113b57e802aSBenno Rice 	register_t r8;			/* 60 */
114b57e802aSBenno Rice 	register_t r7;			/* 64 */
115b57e802aSBenno Rice 	register_t r6;			/* 68 */
116b57e802aSBenno Rice 	register_t r5;			/* 72 */
117b57e802aSBenno Rice 	register_t r4;			/* 76 */
118b57e802aSBenno Rice 	register_t r3;			/* 80 */
119b57e802aSBenno Rice 	register_t r0;			/* 84 */
120b57e802aSBenno Rice };
121b57e802aSBenno Rice 
122b57e802aSBenno Rice #define	SPFRAMELEN	sizeof(struct spillframe)
123b57e802aSBenno Rice struct spillframe {
124b57e802aSBenno Rice 	register_t	r1;		/*  0 */
125b57e802aSBenno Rice 	register_t	_pad4;		/*  4 */
126b57e802aSBenno Rice 	register_t	r12;		/*  8 */
127b57e802aSBenno Rice 	register_t	r11;		/* 12 */
128b57e802aSBenno Rice 	register_t	r10;		/* 16 */
129b57e802aSBenno Rice 	register_t	r9;		/* 20 */
130b57e802aSBenno Rice 	register_t	r8;		/* 24 */
131b57e802aSBenno Rice 	register_t	r7;		/* 28 */
132b57e802aSBenno Rice 	register_t	r6;		/* 32 */
133b57e802aSBenno Rice 	register_t	r5;		/* 36 */
134b57e802aSBenno Rice 	register_t	r4;		/* 40 */
135b57e802aSBenno Rice 	register_t	r3;		/* 44 */
136b57e802aSBenno Rice 	register_t	r0;		/* 48 */
137b57e802aSBenno Rice };
138b57e802aSBenno Rice 
139fb75554eSBenno Rice #endif	/* _MACHINE_FRAME_H_ */
140