1 /*- 2 * Copyright (c) 2008 Nathan Whitehorn 3 * All rights reserved 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #ifndef _MACHINE_DBDMA_H_ 30 #define _MACHINE_DBDMA_H_ 31 32 #include <sys/param.h> 33 #include <machine/bus.h> 34 35 /* 36 * Apple's DBDMA (Descriptor-based DMA) interface is a common DMA engine 37 * used by a variety of custom Apple ASICs. It is described in the CHRP 38 * specification and in the book Macintosh Technology in the Common 39 * Hardware Reference Platform, copyright 1995 Apple Computer. 40 */ 41 42 /* DBDMA Command Values */ 43 44 enum { 45 DBDMA_OUTPUT_MORE = 0, 46 DBDMA_OUTPUT_LAST = 1, 47 DBDMA_INPUT_MORE = 2, 48 DBDMA_INPUT_LAST = 3, 49 50 DBDMA_STORE_QUAD = 4, 51 DBDMA_LOAD_QUAD = 5, 52 DBDMA_NOP = 6, 53 DBDMA_STOP = 7 54 }; 55 56 /* These codes are for the interrupt, branch, and wait flags */ 57 58 enum { 59 DBDMA_NEVER = 0, 60 DBDMA_COND_TRUE = 1, 61 DBDMA_COND_FALSE = 2, 62 DBDMA_ALWAYS = 3 63 }; 64 65 /* Channel status bits */ 66 #define DBDMA_STATUS_RUN (0x01 << 15) 67 #define DBDMA_STATUS_PAUSE (0x01 << 14) 68 #define DBDMA_STATUS_FLUSH (0x01 << 13) 69 #define DBDMA_STATUS_WAKE (0x01 << 12) 70 #define DBDMA_STATUS_DEAD (0x01 << 11) 71 #define DBDMA_STATUS_ACTIVE (0x01 << 10) 72 73 /* Set by hardware if a branch was taken */ 74 #define DBDMA_STATUS_BRANCH 8 75 76 struct dbdma_command; 77 typedef struct dbdma_command dbdma_command_t; 78 struct dbdma_channel; 79 typedef struct dbdma_channel dbdma_channel_t; 80 81 int dbdma_allocate_channel(struct resource *dbdma_regs, 82 bus_dma_tag_t parent_dma, int slots, dbdma_channel_t **chan); 83 84 int dbdma_resize_channel(dbdma_channel_t *chan, int newslots); 85 int dbdma_free_channel(dbdma_channel_t *chan); 86 87 uint16_t dbdma_get_cmd_status(dbdma_channel_t *chan, int slot); 88 uint16_t dbdma_get_residuals(dbdma_channel_t *chan, int slot); 89 90 void dbdma_run(dbdma_channel_t *chan); 91 void dbdma_stop(dbdma_channel_t *chan); 92 void dbdma_reset(dbdma_channel_t *chan); 93 void dbdma_set_current_cmd(dbdma_channel_t *chan, int slot); 94 95 void dbdma_pause(dbdma_channel_t *chan); 96 void dbdma_wake(dbdma_channel_t *chan); 97 98 uint16_t dbdma_get_chan_status(dbdma_channel_t *chan); 99 uint8_t dbdma_get_chan_device_status(dbdma_channel_t *chan); 100 101 void dbdma_set_interrupt_selector(dbdma_channel_t *chan, uint8_t mask, 102 uint8_t value); 103 void dbdma_set_branch_selector(dbdma_channel_t *chan, uint8_t mask, 104 uint8_t value); 105 void dbdma_set_wait_selector(dbdma_channel_t *chan, uint8_t mask, 106 uint8_t value); 107 108 void dbdma_insert_command(dbdma_channel_t *chan, int slot, int command, 109 int stream, bus_addr_t data, size_t count, uint8_t interrupt, 110 uint8_t branch, uint8_t wait, uint32_t branch_slot); 111 112 void dbdma_insert_stop(dbdma_channel_t *chan, int slot); 113 void dbdma_insert_nop(dbdma_channel_t *chan, int slot); 114 void dbdma_insert_branch(dbdma_channel_t *chan, int slot, int to_slot); 115 116 void dbdma_sync_commands(dbdma_channel_t *chan, bus_dmasync_op_t op); 117 118 #endif /* _MACHINE_DBDMA_H_ */ 119