17d8ccad7SMarcel Moolenaar /*- 27d8ccad7SMarcel Moolenaar * Copyright (c) 2008 Nathan Whitehorn 37d8ccad7SMarcel Moolenaar * All rights reserved 47d8ccad7SMarcel Moolenaar * 57d8ccad7SMarcel Moolenaar * Redistribution and use in source and binary forms, with or without 67d8ccad7SMarcel Moolenaar * modification, are permitted provided that the following conditions 77d8ccad7SMarcel Moolenaar * are met: 87d8ccad7SMarcel Moolenaar * 1. Redistributions of source code must retain the above copyright 97d8ccad7SMarcel Moolenaar * notice, this list of conditions and the following disclaimer. 107d8ccad7SMarcel Moolenaar * 2. Redistributions in binary form must reproduce the above copyright 117d8ccad7SMarcel Moolenaar * notice, this list of conditions and the following disclaimer in the 127d8ccad7SMarcel Moolenaar * documentation and/or other materials provided with the distribution. 137d8ccad7SMarcel Moolenaar * 147d8ccad7SMarcel Moolenaar * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 157d8ccad7SMarcel Moolenaar * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 167d8ccad7SMarcel Moolenaar * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 177d8ccad7SMarcel Moolenaar * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 187d8ccad7SMarcel Moolenaar * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 197d8ccad7SMarcel Moolenaar * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 207d8ccad7SMarcel Moolenaar * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 217d8ccad7SMarcel Moolenaar * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 227d8ccad7SMarcel Moolenaar * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 237d8ccad7SMarcel Moolenaar * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 247d8ccad7SMarcel Moolenaar * SUCH DAMAGE. 257d8ccad7SMarcel Moolenaar * 267d8ccad7SMarcel Moolenaar * $FreeBSD$ 277d8ccad7SMarcel Moolenaar */ 287d8ccad7SMarcel Moolenaar 297d8ccad7SMarcel Moolenaar #ifndef _MACHINE_DBDMA_H_ 307d8ccad7SMarcel Moolenaar #define _MACHINE_DBDMA_H_ 317d8ccad7SMarcel Moolenaar 327d8ccad7SMarcel Moolenaar #include <sys/param.h> 337d8ccad7SMarcel Moolenaar #include <machine/bus.h> 347d8ccad7SMarcel Moolenaar 357d8ccad7SMarcel Moolenaar /* 367d8ccad7SMarcel Moolenaar * Apple's DBDMA (Descriptor-based DMA) interface is a common DMA engine 377d8ccad7SMarcel Moolenaar * used by a variety of custom Apple ASICs. It is described in the CHRP 387d8ccad7SMarcel Moolenaar * specification and in the book Macintosh Technology in the Common 397d8ccad7SMarcel Moolenaar * Hardware Reference Platform, copyright 1995 Apple Computer. 407d8ccad7SMarcel Moolenaar */ 417d8ccad7SMarcel Moolenaar 427d8ccad7SMarcel Moolenaar /* DBDMA Command Values */ 437d8ccad7SMarcel Moolenaar 447d8ccad7SMarcel Moolenaar enum { 457d8ccad7SMarcel Moolenaar DBDMA_OUTPUT_MORE = 0, 467d8ccad7SMarcel Moolenaar DBDMA_OUTPUT_LAST = 1, 477d8ccad7SMarcel Moolenaar DBDMA_INPUT_MORE = 2, 487d8ccad7SMarcel Moolenaar DBDMA_INPUT_LAST = 3, 497d8ccad7SMarcel Moolenaar 507d8ccad7SMarcel Moolenaar DBDMA_STORE_QUAD = 4, 517d8ccad7SMarcel Moolenaar DBDMA_LOAD_QUAD = 5, 527d8ccad7SMarcel Moolenaar DBDMA_NOP = 6, 537d8ccad7SMarcel Moolenaar DBDMA_STOP = 7 547d8ccad7SMarcel Moolenaar }; 557d8ccad7SMarcel Moolenaar 567d8ccad7SMarcel Moolenaar /* These codes are for the interrupt, branch, and wait flags */ 577d8ccad7SMarcel Moolenaar 587d8ccad7SMarcel Moolenaar enum { 597d8ccad7SMarcel Moolenaar DBDMA_NEVER = 0, 607d8ccad7SMarcel Moolenaar DBDMA_COND_TRUE = 1, 617d8ccad7SMarcel Moolenaar DBDMA_COND_FALSE = 2, 627d8ccad7SMarcel Moolenaar DBDMA_ALWAYS = 3 637d8ccad7SMarcel Moolenaar }; 647d8ccad7SMarcel Moolenaar 657d8ccad7SMarcel Moolenaar /* Channel status bits */ 667d8ccad7SMarcel Moolenaar #define DBDMA_STATUS_RUN (0x01 << 15) 677d8ccad7SMarcel Moolenaar #define DBDMA_STATUS_PAUSE (0x01 << 14) 687d8ccad7SMarcel Moolenaar #define DBDMA_STATUS_FLUSH (0x01 << 13) 697d8ccad7SMarcel Moolenaar #define DBDMA_STATUS_WAKE (0x01 << 12) 707d8ccad7SMarcel Moolenaar #define DBDMA_STATUS_DEAD (0x01 << 11) 717d8ccad7SMarcel Moolenaar #define DBDMA_STATUS_ACTIVE (0x01 << 10) 727d8ccad7SMarcel Moolenaar 737d8ccad7SMarcel Moolenaar /* Set by hardware if a branch was taken */ 747d8ccad7SMarcel Moolenaar #define DBDMA_STATUS_BRANCH 8 757d8ccad7SMarcel Moolenaar 767d8ccad7SMarcel Moolenaar struct dbdma_command; 777d8ccad7SMarcel Moolenaar typedef struct dbdma_command dbdma_command_t; 787d8ccad7SMarcel Moolenaar struct dbdma_channel; 797d8ccad7SMarcel Moolenaar typedef struct dbdma_channel dbdma_channel_t; 807d8ccad7SMarcel Moolenaar 817d8ccad7SMarcel Moolenaar int dbdma_allocate_channel(struct resource *dbdma_regs, 827d8ccad7SMarcel Moolenaar bus_dma_tag_t parent_dma, int slots, dbdma_channel_t **chan); 837d8ccad7SMarcel Moolenaar 847d8ccad7SMarcel Moolenaar int dbdma_resize_channel(dbdma_channel_t *chan, int newslots); 857d8ccad7SMarcel Moolenaar int dbdma_free_channel(dbdma_channel_t *chan); 867d8ccad7SMarcel Moolenaar 877d8ccad7SMarcel Moolenaar uint16_t dbdma_get_cmd_status(dbdma_channel_t *chan, int slot); 887d8ccad7SMarcel Moolenaar uint16_t dbdma_get_residuals(dbdma_channel_t *chan, int slot); 897d8ccad7SMarcel Moolenaar 907d8ccad7SMarcel Moolenaar void dbdma_run(dbdma_channel_t *chan); 917d8ccad7SMarcel Moolenaar void dbdma_stop(dbdma_channel_t *chan); 927d8ccad7SMarcel Moolenaar void dbdma_reset(dbdma_channel_t *chan); 937d8ccad7SMarcel Moolenaar void dbdma_set_current_cmd(dbdma_channel_t *chan, int slot); 947d8ccad7SMarcel Moolenaar 957d8ccad7SMarcel Moolenaar void dbdma_pause(dbdma_channel_t *chan); 967d8ccad7SMarcel Moolenaar void dbdma_wake(dbdma_channel_t *chan); 977d8ccad7SMarcel Moolenaar 987d8ccad7SMarcel Moolenaar uint16_t dbdma_get_chan_status(dbdma_channel_t *chan); 997d8ccad7SMarcel Moolenaar uint8_t dbdma_get_chan_device_status(dbdma_channel_t *chan); 1007d8ccad7SMarcel Moolenaar 1017d8ccad7SMarcel Moolenaar void dbdma_set_interrupt_selector(dbdma_channel_t *chan, uint8_t mask, 1027d8ccad7SMarcel Moolenaar uint8_t value); 1037d8ccad7SMarcel Moolenaar void dbdma_set_branch_selector(dbdma_channel_t *chan, uint8_t mask, 1047d8ccad7SMarcel Moolenaar uint8_t value); 1057d8ccad7SMarcel Moolenaar void dbdma_set_wait_selector(dbdma_channel_t *chan, uint8_t mask, 1067d8ccad7SMarcel Moolenaar uint8_t value); 1077d8ccad7SMarcel Moolenaar 1087d8ccad7SMarcel Moolenaar void dbdma_insert_command(dbdma_channel_t *chan, int slot, int command, 1097d8ccad7SMarcel Moolenaar int stream, bus_addr_t data, size_t count, uint8_t interrupt, 1107d8ccad7SMarcel Moolenaar uint8_t branch, uint8_t wait, uint32_t branch_slot); 1117d8ccad7SMarcel Moolenaar 1127d8ccad7SMarcel Moolenaar void dbdma_insert_stop(dbdma_channel_t *chan, int slot); 1137d8ccad7SMarcel Moolenaar void dbdma_insert_nop(dbdma_channel_t *chan, int slot); 1147d8ccad7SMarcel Moolenaar void dbdma_insert_branch(dbdma_channel_t *chan, int slot, int to_slot); 1157d8ccad7SMarcel Moolenaar 1167d8ccad7SMarcel Moolenaar void dbdma_sync_commands(dbdma_channel_t *chan, bus_dmasync_op_t op); 1177d8ccad7SMarcel Moolenaar 1187d8ccad7SMarcel Moolenaar #endif /* _MACHINE_DBDMA_H_ */ 119