160727d8bSWarner Losh /*- 2f9bac91bSBenno Rice * Copyright (C) 1995-1997 Wolfgang Solfrank. 3f9bac91bSBenno Rice * Copyright (C) 1995-1997 TooLs GmbH. 4f9bac91bSBenno Rice * All rights reserved. 5f9bac91bSBenno Rice * 6f9bac91bSBenno Rice * Redistribution and use in source and binary forms, with or without 7f9bac91bSBenno Rice * modification, are permitted provided that the following conditions 8f9bac91bSBenno Rice * are met: 9f9bac91bSBenno Rice * 1. Redistributions of source code must retain the above copyright 10f9bac91bSBenno Rice * notice, this list of conditions and the following disclaimer. 11f9bac91bSBenno Rice * 2. Redistributions in binary form must reproduce the above copyright 12f9bac91bSBenno Rice * notice, this list of conditions and the following disclaimer in the 13f9bac91bSBenno Rice * documentation and/or other materials provided with the distribution. 14f9bac91bSBenno Rice * 3. All advertising materials mentioning features or use of this software 15f9bac91bSBenno Rice * must display the following acknowledgement: 16f9bac91bSBenno Rice * This product includes software developed by TooLs GmbH. 17f9bac91bSBenno Rice * 4. The name of TooLs GmbH may not be used to endorse or promote products 18f9bac91bSBenno Rice * derived from this software without specific prior written permission. 19f9bac91bSBenno Rice * 20f9bac91bSBenno Rice * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 21f9bac91bSBenno Rice * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22f9bac91bSBenno Rice * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23f9bac91bSBenno Rice * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 24f9bac91bSBenno Rice * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25f9bac91bSBenno Rice * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26f9bac91bSBenno Rice * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27f9bac91bSBenno Rice * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28f9bac91bSBenno Rice * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 29f9bac91bSBenno Rice * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30f9bac91bSBenno Rice * 31f9bac91bSBenno Rice * $NetBSD: cpu.h,v 1.11 2000/05/26 21:19:53 thorpej Exp $ 32f9bac91bSBenno Rice * $FreeBSD$ 33f9bac91bSBenno Rice */ 34f9bac91bSBenno Rice 35f9bac91bSBenno Rice #ifndef _MACHINE_CPU_H_ 36f9bac91bSBenno Rice #define _MACHINE_CPU_H_ 37f9bac91bSBenno Rice 38f9bac91bSBenno Rice #include <machine/frame.h> 39f9bac91bSBenno Rice #include <machine/pcb.h> 40f9bac91bSBenno Rice #include <machine/psl.h> 41f9bac91bSBenno Rice 42227f6604SNathan Whitehorn /* 43227f6604SNathan Whitehorn * CPU Feature Attributes 44227f6604SNathan Whitehorn * 45227f6604SNathan Whitehorn * These are defined in the PowerPC ELF ABI for the AT_HWCAP vector, 46227f6604SNathan Whitehorn * and are exported to userland via the machdep.cpu_features 47227f6604SNathan Whitehorn * sysctl. 48227f6604SNathan Whitehorn */ 49227f6604SNathan Whitehorn 50227f6604SNathan Whitehorn extern int cpu_features; 51227f6604SNathan Whitehorn 52227f6604SNathan Whitehorn #define PPC_FEATURE_32 0x80000000 /* Always true */ 53227f6604SNathan Whitehorn #define PPC_FEATURE_64 0x40000000 /* Defined on a 64-bit CPU */ 54227f6604SNathan Whitehorn #define PPC_FEATURE_HAS_ALTIVEC 0x10000000 55227f6604SNathan Whitehorn #define PPC_FEATURE_HAS_FPU 0x08000000 56227f6604SNathan Whitehorn #define PPC_FEATURE_HAS_MMU 0x04000000 57227f6604SNathan Whitehorn #define PPC_FEATURE_UNIFIED_CACHE 0x01000000 58*35f612b8SNathan Whitehorn #define PPC_FEATURE_HAS_VSX 0x00000080 59227f6604SNathan Whitehorn 60227f6604SNathan Whitehorn #define PPC_FEATURE_BITMASK \ 61227f6604SNathan Whitehorn "\20" \ 62*35f612b8SNathan Whitehorn "\040PPC32\037PPC64\035ALTIVEC\034FPU\033MMU\031UNIFIEDCACHE" \ 63*35f612b8SNathan Whitehorn "\010VSX" 64227f6604SNathan Whitehorn 659a7fefa5SBenno Rice #define TRAPF_USERMODE(frame) (((frame)->srr1 & PSL_PR) != 0) 66c791ba59SBenno Rice #define TRAPF_PC(frame) ((frame)->srr0) 67c791ba59SBenno Rice 68f9bac91bSBenno Rice #define cpu_swapout(p) 69f9bac91bSBenno Rice #define cpu_number() 0 70f9bac91bSBenno Rice 71f9bac91bSBenno Rice /* 72f9bac91bSBenno Rice * CTL_MACHDEP definitions. 73f9bac91bSBenno Rice */ 74f9bac91bSBenno Rice #define CPU_CACHELINE 1 75f9bac91bSBenno Rice 76f9bac91bSBenno Rice static __inline u_int64_t 77f9bac91bSBenno Rice get_cyclecount(void) 78f9bac91bSBenno Rice { 790a9b03cbSPeter Grehan u_int32_t _upper, _lower; 800a9b03cbSPeter Grehan u_int64_t _time; 81f9bac91bSBenno Rice 82f9bac91bSBenno Rice __asm __volatile( 83f9bac91bSBenno Rice "mftb %0\n" 84f9bac91bSBenno Rice "mftbu %1" 850a9b03cbSPeter Grehan : "=r" (_lower), "=r" (_upper)); 86f9bac91bSBenno Rice 870a9b03cbSPeter Grehan _time = (u_int64_t)_upper; 880a9b03cbSPeter Grehan _time = (_time << 32) + _lower; 890a9b03cbSPeter Grehan return (_time); 90f9bac91bSBenno Rice } 91f9bac91bSBenno Rice 925fd2c51eSMark Peek #define cpu_getstack(td) ((td)->td_frame->fixreg[1]) 939ddcd322SNathan Whitehorn #define cpu_spinwait() __asm __volatile("or 27,27,27") /* yield */ 94f9bac91bSBenno Rice 9511722a8cSMarcel Moolenaar extern char btext[]; 9611722a8cSMarcel Moolenaar extern char etext[]; 9711722a8cSMarcel Moolenaar 9826502503SMarcel Moolenaar void cpu_halt(void); 9926502503SMarcel Moolenaar void cpu_reset(void); 100e1c161e7SJustin Hibbits void cpu_sleep(void); 101e1c161e7SJustin Hibbits void flush_disable_caches(void); 102d163144bSBenno Rice void fork_trampoline(void); 10326502503SMarcel Moolenaar void swi_vm(void *); 10426502503SMarcel Moolenaar 105f9bac91bSBenno Rice #endif /* _MACHINE_CPU_H_ */ 106