xref: /freebsd/sys/powerpc/fpu/fpu_instr.h (revision fe75646a0234a261c0013bf1840fdac4acaf0cec)
1 /*	$NetBSD: instr.h,v 1.4 2005/12/11 12:18:43 christos Exp $ */
2 
3 /*-
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  * Copyright (c) 1992, 1993
7  *	The Regents of the University of California.  All rights reserved.
8  *
9  * This software was developed by the Computer Systems Engineering group
10  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
11  * contributed to Berkeley.
12  *
13  * All advertising materials mentioning features or use of this software
14  * must display the following acknowledgement:
15  *	This product includes software developed by the University of
16  *	California, Lawrence Berkeley Laboratory.
17  *
18  * Redistribution and use in source and binary forms, with or without
19  * modification, are permitted provided that the following conditions
20  * are met:
21  * 1. Redistributions of source code must retain the above copyright
22  *    notice, this list of conditions and the following disclaimer.
23  * 2. Redistributions in binary form must reproduce the above copyright
24  *    notice, this list of conditions and the following disclaimer in the
25  *    documentation and/or other materials provided with the distribution.
26  * 3. Neither the name of the University nor the names of its contributors
27  *    may be used to endorse or promote products derived from this software
28  *    without specific prior written permission.
29  *
30  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40  * SUCH DAMAGE.
41  */
42 
43 /*
44  * An instruction.
45  */
46 union instr {
47 	int	i_int;			/* as a whole */
48 
49 	/*
50 	 * Any instruction type.
51 	 */
52 	struct {
53 		u_int	i_opcd:6;	/* first-level decode */
54 		u_int	:25;
55 		u_int	i_rc:1;
56 	} i_any;
57 
58 	/*
59 	 * Format A
60 	 */
61 	struct {
62 		u_int	i_opcd:6;
63 		u_int	i_frt:5;
64 		u_int	i_fra:5;
65 		u_int	i_frb:5;
66 		u_int	i_frc:5;
67 		u_int	i_xo:5;
68 		u_int	i_rc:1;
69 	} i_a;
70 
71 	/*
72 	 * Format B
73 	 */
74 	struct {
75 		u_int	i_opcd:6;
76 		int	i_bo:5;
77 		int	i_bi:5;
78 		int	i_bd:14;
79 		int	i_aa:1;
80 		int	i_lk:1;
81 	} i_b;
82 
83 	/*
84 	 * Format D
85 	 */
86 	struct {
87 		u_int	i_opcd:6;
88 		u_int	i_rs:5;
89 		u_int	i_ra:5;
90 		int	i_d:16;
91 	} i_d;
92 
93 	/*
94 	 * Format DE
95 	 */
96 	struct {
97 		u_int	i_opcd:6;
98 		u_int	i_rs:5;
99 		u_int	i_ra:5;
100 		int	i_d:12;
101 		u_int	i_xo:4;
102 	} i_de;
103 
104 	/*
105 	 * Format I
106 	 */
107 	struct {
108 		u_int	i_opcd:6;
109 		int	i_li:24;
110 		int	i_aa:1;
111 		int	i_lk:1;
112 	} i_i;
113 
114 	/*
115 	 * Format M
116 	 */
117 	struct {
118 		u_int	i_opcd:6;
119 		u_int	i_rs:5;
120 		u_int	i_ra:5;
121 		u_int	i_rb:5;
122 		int	i_mb:5;
123 		int	i_me:5;
124 		u_int	i_rc:1;
125 	} i_m;
126 
127 	/*
128 	 * Format MD
129 	 */
130 	struct {
131 		u_int	i_opcd:6;
132 		u_int	i_rs:5;
133 		u_int	i_ra:5;
134 		u_int	i_rb:5;
135 		int	i_sh1_5:5;
136 		int	i_mb:6;
137 		u_int	i_xo:3;
138 		int	i_sh0:2;
139 		u_int	i_rc:1;
140 	} i_md;
141 
142 	/*
143 	 * Format MDS
144 	 */
145 	struct {
146 		u_int	i_opcd:6;
147 		u_int	i_rs:5;
148 		u_int	i_ra:5;
149 		u_int	i_rb:5;
150 		int	i_sh:5;
151 		int	i_mb:6;
152 		u_int	i_xo:4;
153 		u_int	i_rc:1;
154 	} i_mds;
155 
156 	/*
157 	 * Format S
158 	 */
159 	struct {
160 		u_int	i_opcd:6;
161 		int	:24;
162 		int	i_i:1;
163 		int	:1;
164 	} i_s;
165 
166 	/*
167 	 * Format X
168 	 */
169 	struct {
170 		u_int	i_opcd:6;
171 		u_int	i_rs:5;
172 		u_int	i_ra:5;
173 		u_int	i_rb:5;
174 		u_int	i_xo:10;
175 		u_int	i_rc:1;
176 	} i_x;
177 
178 	/*
179 	 * Format XFL
180 	 */
181 	struct {
182 		u_int	i_opcd:6;
183 		int	:1;
184 		int	i_flm:8;
185 		int	:1;
186 		int	i_frb:5;
187 		u_int	i_xo:10;
188 		int	:1;
189 	} i_xfl;
190 
191 	/*
192 	 * Format XFX
193 	 */
194 	struct {
195 		u_int	i_opcd:6;
196 		int	i_dcrn:10;
197 		u_int	i_xo:10;
198 		int	:1;
199 	} i_xfx;
200 
201 	/*
202 	 * Format XL
203 	 */
204 	struct {
205 		u_int	i_opcd:6;
206 		int	i_bt:5;
207 		int	i_ba:5;
208 		int	i_bb:5;
209 		u_int	i_xo:10;
210 		int	i_lk:1;
211 	} i_xl;
212 
213 	/*
214 	 * Format XS
215 	 */
216 	struct {
217 		u_int	i_opcd:6;
218 		u_int	i_rs:5;
219 		u_int	i_ra:5;
220 		int	i_sh0_4:5;
221 		u_int	i_xo:9;
222 		int	i_sh5:1;
223 		u_int	i_rc:1;
224 	} i_xs;
225 
226 };
227 
228 #define	i_rt	i_rs
229 
230 /*
231  * Primary opcode numbers:
232  */
233 
234 #define	OPC_TDI		0x02
235 #define	OPC_TWI		0x03
236 #define	OPC_MULLI	0x07
237 #define	OPC_SUBFIC	0x08
238 #define	OPC_BCE		0x09
239 #define	OPC_CMPLI	0x0a
240 #define	OPC_CMPI	0x0b
241 #define	OPC_ADDIC	0x0c
242 #define	OPC_ADDIC_DOT	0x0d
243 #define	OPC_ADDI	0x0e
244 #define	OPC_ADDIS	0x0f
245 #define	OPC_BC		0x10
246 #define	OPC_SC		0x11
247 #define	OPC_B		0x12
248 #define	OPC_branch_19	0x13
249 #define	OPC_RLWIMI	0x14
250 #define	OPC_RLWINM	0x15
251 #define	OPC_BE		0x16
252 #define	OPC_RLWNM	0x17
253 #define	OPC_ORI		0x18
254 #define	OPC_ORIS	0x19
255 #define	OPC_XORI	0x1a
256 #define	OPC_XORIS	0x1b
257 #define	OPC_ANDI	0x1c
258 #define	OPC_ANDIS	0x1d
259 #define	OPC_dwe_rot_30	0x1e
260 #define	OPC_integer_31	0x1f
261 #define	OPC_LWZ		0x20
262 #define	OPC_LWZU	0x21
263 #define	OPC_LBZ		0x22
264 #define	OPC_LBZU	0x23
265 #define	OPC_STW		0x24
266 #define	OPC_STWU	0x25
267 #define	OPC_STB		0x26
268 #define	OPC_STBU	0x27
269 #define	OPC_LHZ		0x28
270 #define	OPC_LHZU	0x29
271 #define	OPC_LHA		0x2a
272 #define	OPC_LHAU	0x2b
273 #define	OPC_STH		0x2c
274 #define	OPC_STHU	0x2d
275 #define	OPC_LMW		0x2e
276 #define	OPC_STMW	0x2f
277 #define	OPC_LFS		0x30
278 #define	OPC_LFSU	0x31
279 #define	OPC_LFD		0x32
280 #define	OPC_LFDU	0x33
281 #define	OPC_STFS	0x34
282 #define	OPC_STFSU	0x35
283 #define	OPC_STFD	0x36
284 #define	OPC_STFDU	0x37
285 #define	OPC_load_st_58	0x3a
286 #define	OPC_sp_fp_59	0x3b
287 #define	OPC_load_st_62	0x3e
288 #define	OPC_dp_fp_63	0x3f
289 
290 /*
291  * Opcode 31 sub-types (FP only)
292  */
293 #define	OPC31_TW	0x004
294 #define	OPC31_LFSX	0x217
295 #define	OPC31_LFSUX	0x237
296 #define	OPC31_LFDX	0x257
297 #define	OPC31_LFDUX	0x277
298 #define	OPC31_STFSX	0x297
299 #define	OPC31_STFSUX	0x2b7
300 #define	OPC31_STFDX	0x2d7
301 #define	OPC31_STFDUX	0x2f7
302 #define	OPC31_STFIWX	0x3d7
303 
304 /* Mask for all valid indexed FP load/store ops (except stfiwx) */
305 #define	OPC31_FPMASK	0x31f
306 #define	OPC31_FPOP	0x217
307 
308 /*
309  * Opcode 59 sub-types:
310  */
311 
312 #define	OPC59_FDIVS	0x12
313 #define	OPC59_FSUBS	0x14
314 #define	OPC59_FADDS	0x15
315 #define	OPC59_FSQRTS	0x16
316 #define	OPC59_FRES	0x18
317 #define	OPC59_FMULS	0x19
318 #define	OPC59_FMSUBS	0x1c
319 #define	OPC59_FMADDS	0x1d
320 #define	OPC59_FNMSUBS	0x1e
321 #define	OPC59_FNMADDS	0x1f
322 
323 /*
324  * Opcode 62 sub-types:
325  */
326 #define	OPC62_LDE	0x0
327 #define	OPC62_LDEU	0x1
328 #define	OPC62_LFSE	0x4
329 #define	OPC62_LFSEU	0x5
330 #define	OPC62_LFDE	0x6
331 #define	OPC62_LFDEU	0x7
332 #define	OPC62_STDE	0x8
333 #define	OPC62_STDEU	0x9
334 #define	OPC62_STFSE	0xc
335 #define	OPC62_STFSEU	0xd
336 #define	OPC62_STFDE	0xe
337 #define	OPC62_STFDEU	0xf
338 
339 /*
340  * Opcode 63 sub-types:
341  *
342  * (The first group are masks....)
343  */
344 
345 #define	OPC63M_MASK	0x10
346 #define	OPC63M_FDIV	0x12
347 #define	OPC63M_FSUB	0x14
348 #define	OPC63M_FADD	0x15
349 #define	OPC63M_FSQRT	0x16
350 #define	OPC63M_FSEL	0x17
351 #define	OPC63M_FMUL	0x19
352 #define	OPC63M_FRSQRTE	0x1a
353 #define	OPC63M_FMSUB	0x1c
354 #define	OPC63M_FMADD	0x1d
355 #define	OPC63M_FNMSUB	0x1e
356 #define	OPC63M_FNMADD	0x1f
357 
358 #define	OPC63_FCMPU	0x00
359 #define	OPC63_FRSP	0x0c
360 #define	OPC63_FCTIW	0x0e
361 #define	OPC63_FCTIWZ	0x0f
362 #define	OPC63_FCMPO	0x20
363 #define	OPC63_MTFSB1	0x26
364 #define	OPC63_FNEG	0x28
365 #define	OPC63_MCRFS	0x40
366 #define	OPC63_MTFSB0	0x46
367 #define	OPC63_FMR	0x48
368 #define	OPC63_MTFSFI	0x86
369 #define	OPC63_FNABS	0x88
370 #define	OPC63_FABS	0x108
371 #define	OPC63_MFFS	0x247
372 #define	OPC63_MTFSF	0x2c7
373 #define	OPC63_FCTID	0x32e
374 #define	OPC63_FCTIDZ	0x32f
375 #define	OPC63_FCFID	0x34e
376 
377 /*
378  * FPU data types.
379  */
380 #define FTYPE_LNG	-1	/* data = 64-bit signed long integer */
381 #define	FTYPE_INT	0	/* data = 32-bit signed integer */
382 #define	FTYPE_SNG	1	/* data = 32-bit float */
383 #define	FTYPE_DBL	2	/* data = 64-bit double */
384