xref: /freebsd/sys/powerpc/fpu/fpu_compare.c (revision eda14cbc264d6969b02f2b1994cef11148e914f1)
1 /*	$NetBSD: fpu_compare.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */
2 
3 /*-
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  * Copyright (c) 1992, 1993
7  *	The Regents of the University of California.  All rights reserved.
8  *
9  * This software was developed by the Computer Systems Engineering group
10  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
11  * contributed to Berkeley.
12  *
13  * All advertising materials mentioning features or use of this software
14  * must display the following acknowledgement:
15  *	This product includes software developed by the University of
16  *	California, Lawrence Berkeley Laboratory.
17  *
18  * Redistribution and use in source and binary forms, with or without
19  * modification, are permitted provided that the following conditions
20  * are met:
21  * 1. Redistributions of source code must retain the above copyright
22  *    notice, this list of conditions and the following disclaimer.
23  * 2. Redistributions in binary form must reproduce the above copyright
24  *    notice, this list of conditions and the following disclaimer in the
25  *    documentation and/or other materials provided with the distribution.
26  * 3. Neither the name of the University nor the names of its contributors
27  *    may be used to endorse or promote products derived from this software
28  *    without specific prior written permission.
29  *
30  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40  * SUCH DAMAGE.
41  *
42  *	@(#)fpu_compare.c	8.1 (Berkeley) 6/11/93
43  */
44 
45 /*
46  * FCMPU and FCMPO instructions.
47  *
48  * These rely on the fact that our internal wide format is achieved by
49  * adding zero bits to the end of narrower mantissas.
50  */
51 
52 #include <sys/cdefs.h>
53 __FBSDID("$FreeBSD$");
54 
55 #include <sys/types.h>
56 #include <sys/systm.h>
57 
58 #include <machine/fpu.h>
59 #include <machine/reg.h>
60 
61 #include <powerpc/fpu/fpu_arith.h>
62 #include <powerpc/fpu/fpu_emu.h>
63 
64 /*
65  * Perform a compare instruction (with or without unordered exception).
66  * This updates the fcc field in the fsr.
67  *
68  * If either operand is NaN, the result is unordered.  For ordered, this
69  * causes an NV exception.  Everything else is ordered:
70  *	|Inf| > |numbers| > |0|.
71  * We already arranged for fp_class(Inf) > fp_class(numbers) > fp_class(0),
72  * so we get this directly.  Note, however, that two zeros compare equal
73  * regardless of sign, while everything else depends on sign.
74  *
75  * Incidentally, two Infs of the same sign compare equal (per the 80387
76  * manual---it would be nice if the SPARC documentation were more
77  * complete).
78  */
79 void
80 fpu_compare(struct fpemu *fe, int ordered)
81 {
82 	struct fpn *a, *b, *r;
83 	int cc;
84 
85 	a = &fe->fe_f1;
86 	b = &fe->fe_f2;
87 	r = &fe->fe_f3;
88 
89 	if (ISNAN(a) || ISNAN(b)) {
90 		/*
91 		 * In any case, we already got an exception for signalling
92 		 * NaNs; here we may replace that one with an identical
93 		 * exception, but so what?.
94 		 */
95 		cc = FPSCR_FU;
96 		if (ISSNAN(a) || ISSNAN(b))
97 			cc |= FPSCR_VXSNAN;
98 		if (ordered) {
99 			if (fe->fe_fpscr & FPSCR_VE || ISQNAN(a) || ISQNAN(b))
100 				cc |= FPSCR_VXVC;
101 		}
102 		goto done;
103 	}
104 
105 	/*
106 	 * Must handle both-zero early to avoid sign goofs.  Otherwise,
107 	 * at most one is 0, and if the signs differ we are done.
108 	 */
109 	if (ISZERO(a) && ISZERO(b)) {
110 		cc = FPSCR_FE;
111 		goto done;
112 	}
113 	if (a->fp_sign) {		/* a < 0 (or -0) */
114 		if (!b->fp_sign) {	/* b >= 0 (or if a = -0, b > 0) */
115 			cc = FPSCR_FL;
116 			goto done;
117 		}
118 	} else {			/* a > 0 (or +0) */
119 		if (b->fp_sign) {	/* b <= -0 (or if a = +0, b < 0) */
120 			cc = FPSCR_FG;
121 			goto done;
122 		}
123 	}
124 
125 	/*
126 	 * Now the signs are the same (but may both be negative).  All
127 	 * we have left are these cases:
128 	 *
129 	 *	|a| < |b|		[classes or values differ]
130 	 *	|a| > |b|		[classes or values differ]
131 	 *	|a| == |b|		[classes and values identical]
132 	 *
133 	 * We define `diff' here to expand these as:
134 	 *
135 	 *	|a| < |b|, a,b >= 0: a < b => FSR_CC_LT
136 	 *	|a| < |b|, a,b < 0:  a > b => FSR_CC_GT
137 	 *	|a| > |b|, a,b >= 0: a > b => FSR_CC_GT
138 	 *	|a| > |b|, a,b < 0:  a < b => FSR_CC_LT
139 	 */
140 #define opposite_cc(cc) ((cc) == FPSCR_FL ? FPSCR_FG : FPSCR_FL)
141 #define	diff(magnitude) (a->fp_sign ? opposite_cc(magnitude) :  (magnitude))
142 	if (a->fp_class < b->fp_class) {	/* |a| < |b| */
143 		cc = diff(FPSCR_FL);
144 		goto done;
145 	}
146 	if (a->fp_class > b->fp_class) {	/* |a| > |b| */
147 		cc = diff(FPSCR_FG);
148 		goto done;
149 	}
150 	/* now none can be 0: only Inf and numbers remain */
151 	if (ISINF(a)) {				/* |Inf| = |Inf| */
152 		cc = FPSCR_FE;
153 		goto done;
154 	}
155 	fpu_sub(fe);
156 	if (ISZERO(r))
157 		cc = FPSCR_FE;
158 	else if (r->fp_sign)
159 		cc = FPSCR_FL;
160 	else
161 		cc = FPSCR_FG;
162 done:
163 	fe->fe_cx = cc;
164 }
165