1 /* $NetBSD: fpu_compare.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */ 2 3 /*- 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 * Copyright (c) 1992, 1993 7 * The Regents of the University of California. All rights reserved. 8 * 9 * This software was developed by the Computer Systems Engineering group 10 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 11 * contributed to Berkeley. 12 * 13 * All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Lawrence Berkeley Laboratory. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions 20 * are met: 21 * 1. Redistributions of source code must retain the above copyright 22 * notice, this list of conditions and the following disclaimer. 23 * 2. Redistributions in binary form must reproduce the above copyright 24 * notice, this list of conditions and the following disclaimer in the 25 * documentation and/or other materials provided with the distribution. 26 * 3. Neither the name of the University nor the names of its contributors 27 * may be used to endorse or promote products derived from this software 28 * without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 40 * SUCH DAMAGE. 41 * 42 * @(#)fpu_compare.c 8.1 (Berkeley) 6/11/93 43 */ 44 45 /* 46 * FCMPU and FCMPO instructions. 47 * 48 * These rely on the fact that our internal wide format is achieved by 49 * adding zero bits to the end of narrower mantissas. 50 */ 51 52 #include <sys/cdefs.h> 53 #include <sys/types.h> 54 #include <sys/systm.h> 55 56 #include <machine/fpu.h> 57 58 #include <powerpc/fpu/fpu_arith.h> 59 #include <powerpc/fpu/fpu_emu.h> 60 61 /* 62 * Perform a compare instruction (with or without unordered exception). 63 * This updates the fcc field in the fsr. 64 * 65 * If either operand is NaN, the result is unordered. For ordered, this 66 * causes an NV exception. Everything else is ordered: 67 * |Inf| > |numbers| > |0|. 68 * We already arranged for fp_class(Inf) > fp_class(numbers) > fp_class(0), 69 * so we get this directly. Note, however, that two zeros compare equal 70 * regardless of sign, while everything else depends on sign. 71 * 72 * Incidentally, two Infs of the same sign compare equal (per the 80387 73 * manual---it would be nice if the SPARC documentation were more 74 * complete). 75 */ 76 void 77 fpu_compare(struct fpemu *fe, int ordered) 78 { 79 struct fpn *a, *b, *r; 80 int cc; 81 82 a = &fe->fe_f1; 83 b = &fe->fe_f2; 84 r = &fe->fe_f3; 85 86 if (ISNAN(a) || ISNAN(b)) { 87 /* 88 * In any case, we already got an exception for signalling 89 * NaNs; here we may replace that one with an identical 90 * exception, but so what?. 91 */ 92 cc = FPSCR_FU; 93 if (ISSNAN(a) || ISSNAN(b)) 94 cc |= FPSCR_VXSNAN; 95 if (ordered) { 96 if (fe->fe_fpscr & FPSCR_VE || ISQNAN(a) || ISQNAN(b)) 97 cc |= FPSCR_VXVC; 98 } 99 goto done; 100 } 101 102 /* 103 * Must handle both-zero early to avoid sign goofs. Otherwise, 104 * at most one is 0, and if the signs differ we are done. 105 */ 106 if (ISZERO(a) && ISZERO(b)) { 107 cc = FPSCR_FE; 108 goto done; 109 } 110 if (a->fp_sign) { /* a < 0 (or -0) */ 111 if (!b->fp_sign) { /* b >= 0 (or if a = -0, b > 0) */ 112 cc = FPSCR_FL; 113 goto done; 114 } 115 } else { /* a > 0 (or +0) */ 116 if (b->fp_sign) { /* b <= -0 (or if a = +0, b < 0) */ 117 cc = FPSCR_FG; 118 goto done; 119 } 120 } 121 122 /* 123 * Now the signs are the same (but may both be negative). All 124 * we have left are these cases: 125 * 126 * |a| < |b| [classes or values differ] 127 * |a| > |b| [classes or values differ] 128 * |a| == |b| [classes and values identical] 129 * 130 * We define `diff' here to expand these as: 131 * 132 * |a| < |b|, a,b >= 0: a < b => FSR_CC_LT 133 * |a| < |b|, a,b < 0: a > b => FSR_CC_GT 134 * |a| > |b|, a,b >= 0: a > b => FSR_CC_GT 135 * |a| > |b|, a,b < 0: a < b => FSR_CC_LT 136 */ 137 #define opposite_cc(cc) ((cc) == FPSCR_FL ? FPSCR_FG : FPSCR_FL) 138 #define diff(magnitude) (a->fp_sign ? opposite_cc(magnitude) : (magnitude)) 139 if (a->fp_class < b->fp_class) { /* |a| < |b| */ 140 cc = diff(FPSCR_FL); 141 goto done; 142 } 143 if (a->fp_class > b->fp_class) { /* |a| > |b| */ 144 cc = diff(FPSCR_FG); 145 goto done; 146 } 147 /* now none can be 0: only Inf and numbers remain */ 148 if (ISINF(a)) { /* |Inf| = |Inf| */ 149 cc = FPSCR_FE; 150 goto done; 151 } 152 fpu_sub(fe); 153 if (ISZERO(r)) 154 cc = FPSCR_FE; 155 else if (r->fp_sign) 156 cc = FPSCR_FL; 157 else 158 cc = FPSCR_FG; 159 done: 160 fe->fe_cx = cc; 161 } 162