1 /* $NetBSD: fpu_add.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */ 2 3 /*- 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 * Copyright (c) 1992, 1993 7 * The Regents of the University of California. All rights reserved. 8 * 9 * This software was developed by the Computer Systems Engineering group 10 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 11 * contributed to Berkeley. 12 * 13 * All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Lawrence Berkeley Laboratory. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions 20 * are met: 21 * 1. Redistributions of source code must retain the above copyright 22 * notice, this list of conditions and the following disclaimer. 23 * 2. Redistributions in binary form must reproduce the above copyright 24 * notice, this list of conditions and the following disclaimer in the 25 * documentation and/or other materials provided with the distribution. 26 * 3. Neither the name of the University nor the names of its contributors 27 * may be used to endorse or promote products derived from this software 28 * without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 40 * SUCH DAMAGE. 41 * 42 * @(#)fpu_add.c 8.1 (Berkeley) 6/11/93 43 */ 44 45 /* 46 * Perform an FPU add (return x + y). 47 * 48 * To subtract, negate y and call add. 49 */ 50 51 #include <sys/cdefs.h> 52 #include <sys/types.h> 53 #include <sys/systm.h> 54 55 #include <machine/fpu.h> 56 #include <machine/ieeefp.h> 57 58 #include <powerpc/fpu/fpu_arith.h> 59 #include <powerpc/fpu/fpu_emu.h> 60 61 struct fpn * 62 fpu_add(struct fpemu *fe) 63 { 64 struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r; 65 u_int r0, r1, r2, r3; 66 int rd; 67 68 /* 69 * Put the `heavier' operand on the right (see fpu_emu.h). 70 * Then we will have one of the following cases, taken in the 71 * following order: 72 * 73 * - y = NaN. Implied: if only one is a signalling NaN, y is. 74 * The result is y. 75 * - y = Inf. Implied: x != NaN (is 0, number, or Inf: the NaN 76 * case was taken care of earlier). 77 * If x = -y, the result is NaN. Otherwise the result 78 * is y (an Inf of whichever sign). 79 * - y is 0. Implied: x = 0. 80 * If x and y differ in sign (one positive, one negative), 81 * the result is +0 except when rounding to -Inf. If same: 82 * +0 + +0 = +0; -0 + -0 = -0. 83 * - x is 0. Implied: y != 0. 84 * Result is y. 85 * - other. Implied: both x and y are numbers. 86 * Do addition a la Hennessey & Patterson. 87 */ 88 DPRINTF(FPE_REG, ("fpu_add:\n")); 89 DUMPFPN(FPE_REG, x); 90 DUMPFPN(FPE_REG, y); 91 DPRINTF(FPE_REG, ("=>\n")); 92 ORDER(x, y); 93 if (ISNAN(y)) { 94 fe->fe_cx |= FPSCR_VXSNAN; 95 DUMPFPN(FPE_REG, y); 96 return (y); 97 } 98 if (ISINF(y)) { 99 if (ISINF(x) && x->fp_sign != y->fp_sign) { 100 fe->fe_cx |= FPSCR_VXISI; 101 return (fpu_newnan(fe)); 102 } 103 DUMPFPN(FPE_REG, y); 104 return (y); 105 } 106 rd = ((fe->fe_fpscr) & FPSCR_RN); 107 if (ISZERO(y)) { 108 if (rd != FP_RM) /* only -0 + -0 gives -0 */ 109 y->fp_sign &= x->fp_sign; 110 else /* any -0 operand gives -0 */ 111 y->fp_sign |= x->fp_sign; 112 DUMPFPN(FPE_REG, y); 113 return (y); 114 } 115 if (ISZERO(x)) { 116 DUMPFPN(FPE_REG, y); 117 return (y); 118 } 119 /* 120 * We really have two numbers to add, although their signs may 121 * differ. Make the exponents match, by shifting the smaller 122 * number right (e.g., 1.011 => 0.1011) and increasing its 123 * exponent (2^3 => 2^4). Note that we do not alter the exponents 124 * of x and y here. 125 */ 126 r = &fe->fe_f3; 127 r->fp_class = FPC_NUM; 128 if (x->fp_exp == y->fp_exp) { 129 r->fp_exp = x->fp_exp; 130 r->fp_sticky = 0; 131 } else { 132 if (x->fp_exp < y->fp_exp) { 133 /* 134 * Try to avoid subtract case iii (see below). 135 * This also guarantees that x->fp_sticky = 0. 136 */ 137 SWAP(x, y); 138 } 139 /* now x->fp_exp > y->fp_exp */ 140 r->fp_exp = x->fp_exp; 141 r->fp_sticky = fpu_shr(y, x->fp_exp - y->fp_exp); 142 } 143 r->fp_sign = x->fp_sign; 144 if (x->fp_sign == y->fp_sign) { 145 FPU_DECL_CARRY 146 147 /* 148 * The signs match, so we simply add the numbers. The result 149 * may be `supernormal' (as big as 1.111...1 + 1.111...1, or 150 * 11.111...0). If so, a single bit shift-right will fix it 151 * (but remember to adjust the exponent). 152 */ 153 /* r->fp_mant = x->fp_mant + y->fp_mant */ 154 FPU_ADDS(r->fp_mant[3], x->fp_mant[3], y->fp_mant[3]); 155 FPU_ADDCS(r->fp_mant[2], x->fp_mant[2], y->fp_mant[2]); 156 FPU_ADDCS(r->fp_mant[1], x->fp_mant[1], y->fp_mant[1]); 157 FPU_ADDC(r0, x->fp_mant[0], y->fp_mant[0]); 158 if ((r->fp_mant[0] = r0) >= FP_2) { 159 (void) fpu_shr(r, 1); 160 r->fp_exp++; 161 } 162 } else { 163 FPU_DECL_CARRY 164 165 /* 166 * The signs differ, so things are rather more difficult. 167 * H&P would have us negate the negative operand and add; 168 * this is the same as subtracting the negative operand. 169 * This is quite a headache. Instead, we will subtract 170 * y from x, regardless of whether y itself is the negative 171 * operand. When this is done one of three conditions will 172 * hold, depending on the magnitudes of x and y: 173 * case i) |x| > |y|. The result is just x - y, 174 * with x's sign, but it may need to be normalized. 175 * case ii) |x| = |y|. The result is 0 (maybe -0) 176 * so must be fixed up. 177 * case iii) |x| < |y|. We goofed; the result should 178 * be (y - x), with the same sign as y. 179 * We could compare |x| and |y| here and avoid case iii, 180 * but that would take just as much work as the subtract. 181 * We can tell case iii has occurred by an overflow. 182 * 183 * N.B.: since x->fp_exp >= y->fp_exp, x->fp_sticky = 0. 184 */ 185 /* r->fp_mant = x->fp_mant - y->fp_mant */ 186 FPU_SET_CARRY(y->fp_sticky); 187 FPU_SUBCS(r3, x->fp_mant[3], y->fp_mant[3]); 188 FPU_SUBCS(r2, x->fp_mant[2], y->fp_mant[2]); 189 FPU_SUBCS(r1, x->fp_mant[1], y->fp_mant[1]); 190 FPU_SUBC(r0, x->fp_mant[0], y->fp_mant[0]); 191 if (r0 < FP_2) { 192 /* cases i and ii */ 193 if ((r0 | r1 | r2 | r3) == 0) { 194 /* case ii */ 195 r->fp_class = FPC_ZERO; 196 r->fp_sign = rd == FP_RM; 197 return (r); 198 } 199 } else { 200 /* 201 * Oops, case iii. This can only occur when the 202 * exponents were equal, in which case neither 203 * x nor y have sticky bits set. Flip the sign 204 * (to y's sign) and negate the result to get y - x. 205 */ 206 #ifdef DIAGNOSTIC 207 if (x->fp_exp != y->fp_exp || r->fp_sticky) 208 panic("fpu_add"); 209 #endif 210 r->fp_sign = y->fp_sign; 211 FPU_SUBS(r3, 0, r3); 212 FPU_SUBCS(r2, 0, r2); 213 FPU_SUBCS(r1, 0, r1); 214 FPU_SUBC(r0, 0, r0); 215 } 216 r->fp_mant[3] = r3; 217 r->fp_mant[2] = r2; 218 r->fp_mant[1] = r1; 219 r->fp_mant[0] = r0; 220 if (r0 < FP_1) 221 fpu_norm(r); 222 } 223 DUMPFPN(FPE_REG, r); 224 return (r); 225 } 226