1 /* $NetBSD: fpu_add.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */ 2 3 /*- 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 * Copyright (c) 1992, 1993 7 * The Regents of the University of California. All rights reserved. 8 * 9 * This software was developed by the Computer Systems Engineering group 10 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 11 * contributed to Berkeley. 12 * 13 * All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Lawrence Berkeley Laboratory. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions 20 * are met: 21 * 1. Redistributions of source code must retain the above copyright 22 * notice, this list of conditions and the following disclaimer. 23 * 2. Redistributions in binary form must reproduce the above copyright 24 * notice, this list of conditions and the following disclaimer in the 25 * documentation and/or other materials provided with the distribution. 26 * 3. Neither the name of the University nor the names of its contributors 27 * may be used to endorse or promote products derived from this software 28 * without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 40 * SUCH DAMAGE. 41 */ 42 43 /* 44 * Perform an FPU add (return x + y). 45 * 46 * To subtract, negate y and call add. 47 */ 48 49 #include <sys/cdefs.h> 50 #include <sys/types.h> 51 #include <sys/systm.h> 52 53 #include <machine/fpu.h> 54 #include <machine/ieeefp.h> 55 56 #include <powerpc/fpu/fpu_arith.h> 57 #include <powerpc/fpu/fpu_emu.h> 58 59 struct fpn * 60 fpu_add(struct fpemu *fe) 61 { 62 struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r; 63 u_int r0, r1, r2, r3; 64 int rd; 65 66 /* 67 * Put the `heavier' operand on the right (see fpu_emu.h). 68 * Then we will have one of the following cases, taken in the 69 * following order: 70 * 71 * - y = NaN. Implied: if only one is a signalling NaN, y is. 72 * The result is y. 73 * - y = Inf. Implied: x != NaN (is 0, number, or Inf: the NaN 74 * case was taken care of earlier). 75 * If x = -y, the result is NaN. Otherwise the result 76 * is y (an Inf of whichever sign). 77 * - y is 0. Implied: x = 0. 78 * If x and y differ in sign (one positive, one negative), 79 * the result is +0 except when rounding to -Inf. If same: 80 * +0 + +0 = +0; -0 + -0 = -0. 81 * - x is 0. Implied: y != 0. 82 * Result is y. 83 * - other. Implied: both x and y are numbers. 84 * Do addition a la Hennessey & Patterson. 85 */ 86 DPRINTF(FPE_REG, ("fpu_add:\n")); 87 DUMPFPN(FPE_REG, x); 88 DUMPFPN(FPE_REG, y); 89 DPRINTF(FPE_REG, ("=>\n")); 90 ORDER(x, y); 91 if (ISNAN(y)) { 92 fe->fe_cx |= FPSCR_VXSNAN; 93 DUMPFPN(FPE_REG, y); 94 return (y); 95 } 96 if (ISINF(y)) { 97 if (ISINF(x) && x->fp_sign != y->fp_sign) { 98 fe->fe_cx |= FPSCR_VXISI; 99 return (fpu_newnan(fe)); 100 } 101 DUMPFPN(FPE_REG, y); 102 return (y); 103 } 104 rd = ((fe->fe_fpscr) & FPSCR_RN); 105 if (ISZERO(y)) { 106 if (rd != FP_RM) /* only -0 + -0 gives -0 */ 107 y->fp_sign &= x->fp_sign; 108 else /* any -0 operand gives -0 */ 109 y->fp_sign |= x->fp_sign; 110 DUMPFPN(FPE_REG, y); 111 return (y); 112 } 113 if (ISZERO(x)) { 114 DUMPFPN(FPE_REG, y); 115 return (y); 116 } 117 /* 118 * We really have two numbers to add, although their signs may 119 * differ. Make the exponents match, by shifting the smaller 120 * number right (e.g., 1.011 => 0.1011) and increasing its 121 * exponent (2^3 => 2^4). Note that we do not alter the exponents 122 * of x and y here. 123 */ 124 r = &fe->fe_f3; 125 r->fp_class = FPC_NUM; 126 if (x->fp_exp == y->fp_exp) { 127 r->fp_exp = x->fp_exp; 128 r->fp_sticky = 0; 129 } else { 130 if (x->fp_exp < y->fp_exp) { 131 /* 132 * Try to avoid subtract case iii (see below). 133 * This also guarantees that x->fp_sticky = 0. 134 */ 135 SWAP(x, y); 136 } 137 /* now x->fp_exp > y->fp_exp */ 138 r->fp_exp = x->fp_exp; 139 r->fp_sticky = fpu_shr(y, x->fp_exp - y->fp_exp); 140 } 141 r->fp_sign = x->fp_sign; 142 if (x->fp_sign == y->fp_sign) { 143 FPU_DECL_CARRY 144 145 /* 146 * The signs match, so we simply add the numbers. The result 147 * may be `supernormal' (as big as 1.111...1 + 1.111...1, or 148 * 11.111...0). If so, a single bit shift-right will fix it 149 * (but remember to adjust the exponent). 150 */ 151 /* r->fp_mant = x->fp_mant + y->fp_mant */ 152 FPU_ADDS(r->fp_mant[3], x->fp_mant[3], y->fp_mant[3]); 153 FPU_ADDCS(r->fp_mant[2], x->fp_mant[2], y->fp_mant[2]); 154 FPU_ADDCS(r->fp_mant[1], x->fp_mant[1], y->fp_mant[1]); 155 FPU_ADDC(r0, x->fp_mant[0], y->fp_mant[0]); 156 if ((r->fp_mant[0] = r0) >= FP_2) { 157 (void) fpu_shr(r, 1); 158 r->fp_exp++; 159 } 160 } else { 161 FPU_DECL_CARRY 162 163 /* 164 * The signs differ, so things are rather more difficult. 165 * H&P would have us negate the negative operand and add; 166 * this is the same as subtracting the negative operand. 167 * This is quite a headache. Instead, we will subtract 168 * y from x, regardless of whether y itself is the negative 169 * operand. When this is done one of three conditions will 170 * hold, depending on the magnitudes of x and y: 171 * case i) |x| > |y|. The result is just x - y, 172 * with x's sign, but it may need to be normalized. 173 * case ii) |x| = |y|. The result is 0 (maybe -0) 174 * so must be fixed up. 175 * case iii) |x| < |y|. We goofed; the result should 176 * be (y - x), with the same sign as y. 177 * We could compare |x| and |y| here and avoid case iii, 178 * but that would take just as much work as the subtract. 179 * We can tell case iii has occurred by an overflow. 180 * 181 * N.B.: since x->fp_exp >= y->fp_exp, x->fp_sticky = 0. 182 */ 183 /* r->fp_mant = x->fp_mant - y->fp_mant */ 184 FPU_SET_CARRY(y->fp_sticky); 185 FPU_SUBCS(r3, x->fp_mant[3], y->fp_mant[3]); 186 FPU_SUBCS(r2, x->fp_mant[2], y->fp_mant[2]); 187 FPU_SUBCS(r1, x->fp_mant[1], y->fp_mant[1]); 188 FPU_SUBC(r0, x->fp_mant[0], y->fp_mant[0]); 189 if (r0 < FP_2) { 190 /* cases i and ii */ 191 if ((r0 | r1 | r2 | r3) == 0) { 192 /* case ii */ 193 r->fp_class = FPC_ZERO; 194 r->fp_sign = rd == FP_RM; 195 return (r); 196 } 197 } else { 198 /* 199 * Oops, case iii. This can only occur when the 200 * exponents were equal, in which case neither 201 * x nor y have sticky bits set. Flip the sign 202 * (to y's sign) and negate the result to get y - x. 203 */ 204 #ifdef DIAGNOSTIC 205 if (x->fp_exp != y->fp_exp || r->fp_sticky) 206 panic("fpu_add"); 207 #endif 208 r->fp_sign = y->fp_sign; 209 FPU_SUBS(r3, 0, r3); 210 FPU_SUBCS(r2, 0, r2); 211 FPU_SUBCS(r1, 0, r1); 212 FPU_SUBC(r0, 0, r0); 213 } 214 r->fp_mant[3] = r3; 215 r->fp_mant[2] = r2; 216 r->fp_mant[1] = r1; 217 r->fp_mant[0] = r0; 218 if (r0 < FP_1) 219 fpu_norm(r); 220 } 221 DUMPFPN(FPE_REG, r); 222 return (r); 223 } 224