xref: /freebsd/sys/powerpc/cpufreq/pcr.c (revision 4d846d260e2b9a3d4d0a701462568268cbfe7a5b)
11016f143SNathan Whitehorn /*-
2*4d846d26SWarner Losh  * SPDX-License-Identifier: BSD-2-Clause
371e3c308SPedro F. Giffuni  *
41016f143SNathan Whitehorn  * Copyright (c) 2009 Nathan Whitehorn
51016f143SNathan Whitehorn  * All rights reserved.
61016f143SNathan Whitehorn  *
71016f143SNathan Whitehorn  * Redistribution and use in source and binary forms, with or without
81016f143SNathan Whitehorn  * modification, are permitted provided that the following conditions
91016f143SNathan Whitehorn  * are met:
101016f143SNathan Whitehorn  * 1. Redistributions of source code must retain the above copyright
111016f143SNathan Whitehorn  *    notice, this list of conditions and the following disclaimer.
121016f143SNathan Whitehorn  * 2. Redistributions in binary form must reproduce the above copyright
131016f143SNathan Whitehorn  *    notice, this list of conditions and the following disclaimer in the
141016f143SNathan Whitehorn  *    documentation and/or other materials provided with the distribution.
151016f143SNathan Whitehorn  *
161016f143SNathan Whitehorn  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
171016f143SNathan Whitehorn  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
181016f143SNathan Whitehorn  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
191016f143SNathan Whitehorn  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
201016f143SNathan Whitehorn  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
211016f143SNathan Whitehorn  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
221016f143SNathan Whitehorn  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
231016f143SNathan Whitehorn  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
241016f143SNathan Whitehorn  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
251016f143SNathan Whitehorn  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
261016f143SNathan Whitehorn  * SUCH DAMAGE.
271016f143SNathan Whitehorn  */
281016f143SNathan Whitehorn 
291016f143SNathan Whitehorn #include <sys/cdefs.h>
301016f143SNathan Whitehorn __FBSDID("$FreeBSD$");
311016f143SNathan Whitehorn 
321016f143SNathan Whitehorn #include <sys/param.h>
331016f143SNathan Whitehorn #include <sys/systm.h>
341016f143SNathan Whitehorn #include <sys/bus.h>
351016f143SNathan Whitehorn #include <sys/cpu.h>
361016f143SNathan Whitehorn #include <sys/kernel.h>
371016f143SNathan Whitehorn #include <sys/module.h>
381016f143SNathan Whitehorn 
391016f143SNathan Whitehorn #include <dev/ofw/ofw_bus.h>
401016f143SNathan Whitehorn 
411016f143SNathan Whitehorn #include "cpufreq_if.h"
421016f143SNathan Whitehorn 
431016f143SNathan Whitehorn struct pcr_softc {
441016f143SNathan Whitehorn 	device_t dev;
451016f143SNathan Whitehorn 	uint32_t pcr_vals[3];
461016f143SNathan Whitehorn 	int nmodes;
471016f143SNathan Whitehorn };
481016f143SNathan Whitehorn 
491016f143SNathan Whitehorn static void	pcr_identify(driver_t *driver, device_t parent);
501016f143SNathan Whitehorn static int	pcr_probe(device_t dev);
511016f143SNathan Whitehorn static int	pcr_attach(device_t dev);
521016f143SNathan Whitehorn static int	pcr_settings(device_t dev, struct cf_setting *sets, int *count);
531016f143SNathan Whitehorn static int	pcr_set(device_t dev, const struct cf_setting *set);
541016f143SNathan Whitehorn static int	pcr_get(device_t dev, struct cf_setting *set);
551016f143SNathan Whitehorn static int	pcr_type(device_t dev, int *type);
561016f143SNathan Whitehorn 
571016f143SNathan Whitehorn static device_method_t pcr_methods[] = {
581016f143SNathan Whitehorn 	/* Device interface */
591016f143SNathan Whitehorn 	DEVMETHOD(device_identify,	pcr_identify),
601016f143SNathan Whitehorn 	DEVMETHOD(device_probe,		pcr_probe),
611016f143SNathan Whitehorn 	DEVMETHOD(device_attach,	pcr_attach),
621016f143SNathan Whitehorn 
631016f143SNathan Whitehorn 	/* cpufreq interface */
641016f143SNathan Whitehorn 	DEVMETHOD(cpufreq_drv_set,	pcr_set),
651016f143SNathan Whitehorn 	DEVMETHOD(cpufreq_drv_get,	pcr_get),
661016f143SNathan Whitehorn 	DEVMETHOD(cpufreq_drv_type,	pcr_type),
671016f143SNathan Whitehorn 	DEVMETHOD(cpufreq_drv_settings,	pcr_settings),
681016f143SNathan Whitehorn 	{0, 0}
691016f143SNathan Whitehorn };
701016f143SNathan Whitehorn 
711016f143SNathan Whitehorn static driver_t pcr_driver = {
721016f143SNathan Whitehorn 	"pcr",
731016f143SNathan Whitehorn 	pcr_methods,
741016f143SNathan Whitehorn 	sizeof(struct pcr_softc)
751016f143SNathan Whitehorn };
761016f143SNathan Whitehorn 
77b3407dccSJohn Baldwin DRIVER_MODULE(pcr, cpu, pcr_driver, 0, 0);
781016f143SNathan Whitehorn 
791016f143SNathan Whitehorn /*
801016f143SNathan Whitehorn  * States
811016f143SNathan Whitehorn  */
821016f143SNathan Whitehorn 
831016f143SNathan Whitehorn #define PCR_TO_FREQ(a)	((a >> 17) & 3)
841016f143SNathan Whitehorn 
851016f143SNathan Whitehorn #define	PCR_FULL	0
861016f143SNathan Whitehorn #define PCR_HALF	1
871016f143SNathan Whitehorn #define PCR_QUARTER	2		/* Only on 970MP */
881016f143SNathan Whitehorn 
891016f143SNathan Whitehorn #define PSR_RECEIVED	(1ULL << 61)
901016f143SNathan Whitehorn #define PSR_COMPLETED	(1ULL << 61)
911016f143SNathan Whitehorn 
921016f143SNathan Whitehorn /*
931016f143SNathan Whitehorn  * SCOM addresses
941016f143SNathan Whitehorn  */
951016f143SNathan Whitehorn 
961016f143SNathan Whitehorn #define	SCOM_PCR	0x0aa00100	/* Power Control Register */
971016f143SNathan Whitehorn #define SCOM_PCR_BIT	0x80000000	/* Data bit for PCR */
981016f143SNathan Whitehorn #define SCOM_PSR	0x40800100	/* Power Status Register */
991016f143SNathan Whitehorn 
1001016f143SNathan Whitehorn /*
1011016f143SNathan Whitehorn  * SCOM Glue
1021016f143SNathan Whitehorn  */
1031016f143SNathan Whitehorn 
1041016f143SNathan Whitehorn #define SCOMC_READ	0x00008000
1051016f143SNathan Whitehorn #define SCOMC_WRITE	0x00000000
1061016f143SNathan Whitehorn 
1071016f143SNathan Whitehorn static void
1081016f143SNathan Whitehorn write_scom(register_t address, uint64_t value)
1091016f143SNathan Whitehorn {
1101016f143SNathan Whitehorn 	register_t msr;
111c3e289e1SNathan Whitehorn 	#ifndef __powerpc64__
1121016f143SNathan Whitehorn 	register_t hi, lo, scratch;
113c3e289e1SNathan Whitehorn 	#endif
1141016f143SNathan Whitehorn 
1151016f143SNathan Whitehorn 	msr = mfmsr();
1161016f143SNathan Whitehorn 	mtmsr(msr & ~PSL_EE); isync();
1171016f143SNathan Whitehorn 
118c3e289e1SNathan Whitehorn 	#ifdef __powerpc64__
119c3e289e1SNathan Whitehorn 	mtspr(SPR_SCOMD, value);
120c3e289e1SNathan Whitehorn 	#else
121c3e289e1SNathan Whitehorn 	hi = (value >> 32) & 0xffffffff;
122c3e289e1SNathan Whitehorn 	lo = value & 0xffffffff;
1231016f143SNathan Whitehorn 	mtspr64(SPR_SCOMD, hi, lo, scratch);
124c3e289e1SNathan Whitehorn 	#endif
1251016f143SNathan Whitehorn 	isync();
1261016f143SNathan Whitehorn 	mtspr(SPR_SCOMC, address | SCOMC_WRITE);
1271016f143SNathan Whitehorn 	isync();
1281016f143SNathan Whitehorn 
1291016f143SNathan Whitehorn 	mtmsr(msr); isync();
1301016f143SNathan Whitehorn }
1311016f143SNathan Whitehorn 
1321016f143SNathan Whitehorn static uint64_t
1331016f143SNathan Whitehorn read_scom(register_t address)
1341016f143SNathan Whitehorn {
1351016f143SNathan Whitehorn 	register_t msr;
1361016f143SNathan Whitehorn 	uint64_t ret;
1371016f143SNathan Whitehorn 
1381016f143SNathan Whitehorn 	msr = mfmsr();
1391016f143SNathan Whitehorn 	mtmsr(msr & ~PSL_EE); isync();
1401016f143SNathan Whitehorn 
1411016f143SNathan Whitehorn 	mtspr(SPR_SCOMC, address | SCOMC_READ);
1421016f143SNathan Whitehorn 	isync();
1431016f143SNathan Whitehorn 
1441016f143SNathan Whitehorn 	__asm __volatile ("mfspr %0,%1;"
1451016f143SNathan Whitehorn             " mr %0+1, %0; srdi %0,%0,32" : "=r" (ret) : "K" (SPR_SCOMD));
1461016f143SNathan Whitehorn 
1471016f143SNathan Whitehorn 	(void)mfspr(SPR_SCOMC); /* Complete transcation */
1481016f143SNathan Whitehorn 
1491016f143SNathan Whitehorn 	mtmsr(msr); isync();
1501016f143SNathan Whitehorn 
1511016f143SNathan Whitehorn 	return (ret);
1521016f143SNathan Whitehorn }
1531016f143SNathan Whitehorn 
1541016f143SNathan Whitehorn static void
1551016f143SNathan Whitehorn pcr_identify(driver_t *driver, device_t parent)
1561016f143SNathan Whitehorn {
1571016f143SNathan Whitehorn 	uint16_t vers;
1581016f143SNathan Whitehorn 	vers = mfpvr() >> 16;
1591016f143SNathan Whitehorn 
1601016f143SNathan Whitehorn 	/* Check for an IBM 970-class CPU */
1611016f143SNathan Whitehorn 	switch (vers) {
1621016f143SNathan Whitehorn 		case IBM970FX:
1631016f143SNathan Whitehorn 		case IBM970GX:
1641016f143SNathan Whitehorn 		case IBM970MP:
1651016f143SNathan Whitehorn 			break;
1661016f143SNathan Whitehorn 		default:
1671016f143SNathan Whitehorn 			return;
1681016f143SNathan Whitehorn 	}
1691016f143SNathan Whitehorn 
1701016f143SNathan Whitehorn 	/* Make sure we're not being doubly invoked. */
1711016f143SNathan Whitehorn 	if (device_find_child(parent, "pcr", -1) != NULL)
1721016f143SNathan Whitehorn 		return;
1731016f143SNathan Whitehorn 
1741016f143SNathan Whitehorn 	/*
1751016f143SNathan Whitehorn 	 * We attach a child for every CPU since settings need to
1761016f143SNathan Whitehorn 	 * be performed on every CPU in the SMP case.
1771016f143SNathan Whitehorn 	 */
1781016f143SNathan Whitehorn 	if (BUS_ADD_CHILD(parent, 10, "pcr", -1) == NULL)
1791016f143SNathan Whitehorn 		device_printf(parent, "add pcr child failed\n");
1801016f143SNathan Whitehorn }
1811016f143SNathan Whitehorn 
1821016f143SNathan Whitehorn static int
1831016f143SNathan Whitehorn pcr_probe(device_t dev)
1841016f143SNathan Whitehorn {
1851016f143SNathan Whitehorn 	if (resource_disabled("pcr", 0))
1861016f143SNathan Whitehorn 		return (ENXIO);
1871016f143SNathan Whitehorn 
1881016f143SNathan Whitehorn 	device_set_desc(dev, "PPC 970 Power Control Register");
1891016f143SNathan Whitehorn 	return (0);
1901016f143SNathan Whitehorn }
1911016f143SNathan Whitehorn 
1921016f143SNathan Whitehorn static int
1931016f143SNathan Whitehorn pcr_attach(device_t dev)
1941016f143SNathan Whitehorn {
1951016f143SNathan Whitehorn 	struct pcr_softc *sc;
1961016f143SNathan Whitehorn 	phandle_t cpu;
1971016f143SNathan Whitehorn 	uint32_t modes[3];
1981016f143SNathan Whitehorn 	int i;
1991016f143SNathan Whitehorn 
2001016f143SNathan Whitehorn 	sc = device_get_softc(dev);
2011016f143SNathan Whitehorn 	sc->dev = dev;
2021016f143SNathan Whitehorn 
2031016f143SNathan Whitehorn 	cpu = ofw_bus_get_node(device_get_parent(dev));
2041016f143SNathan Whitehorn 
2051016f143SNathan Whitehorn 	if (cpu <= 0) {
2061016f143SNathan Whitehorn 		device_printf(dev,"No CPU device tree node!\n");
2071016f143SNathan Whitehorn 		return (ENXIO);
2081016f143SNathan Whitehorn 	}
2091016f143SNathan Whitehorn 
210c59bb3ffSNathan Whitehorn 	if (OF_getproplen(cpu, "power-mode-data") <= 0) {
211c59bb3ffSNathan Whitehorn 		/* Use the first CPU's node */
212c59bb3ffSNathan Whitehorn 		cpu = OF_child(OF_parent(cpu));
213c59bb3ffSNathan Whitehorn 	}
214c59bb3ffSNathan Whitehorn 
2151016f143SNathan Whitehorn 	/*
2161016f143SNathan Whitehorn 	 * Collect the PCR values for each mode from the device tree.
2171016f143SNathan Whitehorn 	 * These include bus timing information, and so cannot be
2181016f143SNathan Whitehorn 	 * directly computed.
2191016f143SNathan Whitehorn 	 */
2201016f143SNathan Whitehorn 	sc->nmodes = OF_getproplen(cpu, "power-mode-data");
2211016f143SNathan Whitehorn 	if (sc->nmodes <= 0 || sc->nmodes > sizeof(sc->pcr_vals)) {
2221016f143SNathan Whitehorn 		device_printf(dev,"No power mode data in device tree!\n");
2231016f143SNathan Whitehorn 		return (ENXIO);
2241016f143SNathan Whitehorn 	}
2251016f143SNathan Whitehorn 	OF_getprop(cpu, "power-mode-data", modes, sc->nmodes);
2261016f143SNathan Whitehorn 	sc->nmodes /= sizeof(modes[0]);
2271016f143SNathan Whitehorn 
2281016f143SNathan Whitehorn 	/* Sort the modes */
2291016f143SNathan Whitehorn 	for (i = 0; i < sc->nmodes; i++)
2301016f143SNathan Whitehorn 		sc->pcr_vals[PCR_TO_FREQ(modes[i])] = modes[i];
2311016f143SNathan Whitehorn 
2321016f143SNathan Whitehorn 	cpufreq_register(dev);
2331016f143SNathan Whitehorn 	return (0);
2341016f143SNathan Whitehorn }
2351016f143SNathan Whitehorn 
2361016f143SNathan Whitehorn static int
2371016f143SNathan Whitehorn pcr_settings(device_t dev, struct cf_setting *sets, int *count)
2381016f143SNathan Whitehorn {
2391016f143SNathan Whitehorn 	struct pcr_softc *sc;
2401016f143SNathan Whitehorn 
2411016f143SNathan Whitehorn 	sc = device_get_softc(dev);
2421016f143SNathan Whitehorn 	if (sets == NULL || count == NULL)
2431016f143SNathan Whitehorn 		return (EINVAL);
2441016f143SNathan Whitehorn 	if (*count < sc->nmodes)
2451016f143SNathan Whitehorn 		return (E2BIG);
2461016f143SNathan Whitehorn 
2471016f143SNathan Whitehorn 	/* Return a list of valid settings for this driver. */
2481016f143SNathan Whitehorn 	memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * sc->nmodes);
2491016f143SNathan Whitehorn 
2501016f143SNathan Whitehorn 	sets[0].freq = 10000; sets[0].dev = dev;
2511016f143SNathan Whitehorn 	sets[1].freq = 5000; sets[1].dev = dev;
2529ffdae0fSJustin Hibbits 	if (sc->nmodes > 2) {
2539ffdae0fSJustin Hibbits 		sets[2].freq = 2500;
2549ffdae0fSJustin Hibbits 		sets[2].dev = dev;
2559ffdae0fSJustin Hibbits 	}
2561016f143SNathan Whitehorn 	*count = sc->nmodes;
2571016f143SNathan Whitehorn 
2581016f143SNathan Whitehorn 	return (0);
2591016f143SNathan Whitehorn }
2601016f143SNathan Whitehorn 
2611016f143SNathan Whitehorn static int
2621016f143SNathan Whitehorn pcr_set(device_t dev, const struct cf_setting *set)
2631016f143SNathan Whitehorn {
2641016f143SNathan Whitehorn 	struct pcr_softc *sc;
2651016f143SNathan Whitehorn 	register_t pcr, msr;
2661016f143SNathan Whitehorn 	uint64_t psr;
2671016f143SNathan Whitehorn 
2681016f143SNathan Whitehorn 	if (set == NULL)
2691016f143SNathan Whitehorn 		return (EINVAL);
2701016f143SNathan Whitehorn 	sc = device_get_softc(dev);
2711016f143SNathan Whitehorn 
2721016f143SNathan Whitehorn 	/* Construct the new PCR */
2731016f143SNathan Whitehorn 
2741016f143SNathan Whitehorn 	pcr = SCOM_PCR_BIT;
2751016f143SNathan Whitehorn 
2761016f143SNathan Whitehorn 	if (set->freq == 10000)
2771016f143SNathan Whitehorn 		pcr |= sc->pcr_vals[0];
2781016f143SNathan Whitehorn 	else if (set->freq == 5000)
2791016f143SNathan Whitehorn 		pcr |= sc->pcr_vals[1];
2801016f143SNathan Whitehorn 	else if (set->freq == 2500)
2811016f143SNathan Whitehorn 		pcr |= sc->pcr_vals[2];
2821016f143SNathan Whitehorn 
2831016f143SNathan Whitehorn 	msr = mfmsr();
2841016f143SNathan Whitehorn 	mtmsr(msr & ~PSL_EE); isync();
2851016f143SNathan Whitehorn 
2861016f143SNathan Whitehorn 	/* 970MP requires PCR and PCRH to be cleared first */
2871016f143SNathan Whitehorn 
2881016f143SNathan Whitehorn 	write_scom(SCOM_PCR,0);			/* Clear PCRH */
2891016f143SNathan Whitehorn 	write_scom(SCOM_PCR,SCOM_PCR_BIT);	/* Clear PCR */
2901016f143SNathan Whitehorn 
2911016f143SNathan Whitehorn 	/* Set PCR */
2921016f143SNathan Whitehorn 
2931016f143SNathan Whitehorn 	write_scom(SCOM_PCR, pcr);
2941016f143SNathan Whitehorn 
2951016f143SNathan Whitehorn 	/* Wait for completion */
2961016f143SNathan Whitehorn 
2971016f143SNathan Whitehorn 	do {
2981016f143SNathan Whitehorn 		DELAY(100);
2991016f143SNathan Whitehorn 		psr = read_scom(SCOM_PSR);
3001016f143SNathan Whitehorn 	} while ((psr & PSR_RECEIVED) && !(psr & PSR_COMPLETED));
3011016f143SNathan Whitehorn 
3021016f143SNathan Whitehorn 	mtmsr(msr); isync();
3031016f143SNathan Whitehorn 
3041016f143SNathan Whitehorn 	return (0);
3051016f143SNathan Whitehorn }
3061016f143SNathan Whitehorn 
3071016f143SNathan Whitehorn static int
3081016f143SNathan Whitehorn pcr_get(device_t dev, struct cf_setting *set)
3091016f143SNathan Whitehorn {
3101016f143SNathan Whitehorn 	uint64_t psr;
3111016f143SNathan Whitehorn 
3121016f143SNathan Whitehorn 	if (set == NULL)
3131016f143SNathan Whitehorn 		return (EINVAL);
3141016f143SNathan Whitehorn 
3151016f143SNathan Whitehorn 	memset(set, CPUFREQ_VAL_UNKNOWN, sizeof(*set));
3161016f143SNathan Whitehorn 
3171016f143SNathan Whitehorn 	psr = read_scom(SCOM_PSR);
3181016f143SNathan Whitehorn 
3191016f143SNathan Whitehorn 	/* We want bits 6 and 7 */
3201016f143SNathan Whitehorn 	psr = (psr >> 56) & 3;
3211016f143SNathan Whitehorn 
3221016f143SNathan Whitehorn 	set->freq = 10000;
3231016f143SNathan Whitehorn 	if (psr == PCR_HALF)
3241016f143SNathan Whitehorn 		set->freq = 5000;
3251016f143SNathan Whitehorn 	else if (psr == PCR_QUARTER)
3261016f143SNathan Whitehorn 		set->freq = 2500;
3271016f143SNathan Whitehorn 
3281016f143SNathan Whitehorn 	set->dev = dev;
3291016f143SNathan Whitehorn 
3301016f143SNathan Whitehorn 	return (0);
3311016f143SNathan Whitehorn }
3321016f143SNathan Whitehorn 
3331016f143SNathan Whitehorn static int
3341016f143SNathan Whitehorn pcr_type(device_t dev, int *type)
3351016f143SNathan Whitehorn {
3361016f143SNathan Whitehorn 
3371016f143SNathan Whitehorn 	if (type == NULL)
3381016f143SNathan Whitehorn 		return (EINVAL);
3391016f143SNathan Whitehorn 
3401016f143SNathan Whitehorn 	*type = CPUFREQ_TYPE_RELATIVE;
3411016f143SNathan Whitehorn 	return (0);
3421016f143SNathan Whitehorn }
343