1b40ce02aSNathan Whitehorn /*- 2b40ce02aSNathan Whitehorn * Copyright (c) 2008-2009 Semihalf, Rafal Jaworowski 3b40ce02aSNathan Whitehorn * All rights reserved. 4b40ce02aSNathan Whitehorn * 5b40ce02aSNathan Whitehorn * Redistribution and use in source and binary forms, with or without 6b40ce02aSNathan Whitehorn * modification, are permitted provided that the following conditions 7b40ce02aSNathan Whitehorn * are met: 8b40ce02aSNathan Whitehorn * 9b40ce02aSNathan Whitehorn * 1. Redistributions of source code must retain the above copyright 10b40ce02aSNathan Whitehorn * notice, this list of conditions and the following disclaimer. 11b40ce02aSNathan Whitehorn * 2. Redistributions in binary form must reproduce the above copyright 12b40ce02aSNathan Whitehorn * notice, this list of conditions and the following disclaimer in the 13b40ce02aSNathan Whitehorn * documentation and/or other materials provided with the distribution. 14b40ce02aSNathan Whitehorn * 15b40ce02aSNathan Whitehorn * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16b40ce02aSNathan Whitehorn * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17b40ce02aSNathan Whitehorn * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18b40ce02aSNathan Whitehorn * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19b40ce02aSNathan Whitehorn * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20b40ce02aSNathan Whitehorn * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21b40ce02aSNathan Whitehorn * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22b40ce02aSNathan Whitehorn * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23b40ce02aSNathan Whitehorn * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24b40ce02aSNathan Whitehorn * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25b40ce02aSNathan Whitehorn */ 26b40ce02aSNathan Whitehorn 27b40ce02aSNathan Whitehorn #include <sys/cdefs.h> 28b40ce02aSNathan Whitehorn __FBSDID("$FreeBSD$"); 29b40ce02aSNathan Whitehorn 30b40ce02aSNathan Whitehorn #include <sys/param.h> 31b40ce02aSNathan Whitehorn #include <sys/systm.h> 32b40ce02aSNathan Whitehorn #include <sys/kernel.h> 33b40ce02aSNathan Whitehorn #include <sys/bus.h> 34b40ce02aSNathan Whitehorn #include <sys/pcpu.h> 35b40ce02aSNathan Whitehorn #include <sys/proc.h> 36b40ce02aSNathan Whitehorn #include <sys/smp.h> 37b40ce02aSNathan Whitehorn 38b40ce02aSNathan Whitehorn #include <machine/bootinfo.h> 39b40ce02aSNathan Whitehorn #include <machine/bus.h> 40b40ce02aSNathan Whitehorn #include <machine/cpu.h> 41b40ce02aSNathan Whitehorn #include <machine/hid.h> 42b40ce02aSNathan Whitehorn #include <machine/platform.h> 43b40ce02aSNathan Whitehorn #include <machine/platformvar.h> 44b40ce02aSNathan Whitehorn #include <machine/smp.h> 45b40ce02aSNathan Whitehorn #include <machine/spr.h> 46b40ce02aSNathan Whitehorn #include <machine/vmparam.h> 47b40ce02aSNathan Whitehorn 48b40ce02aSNathan Whitehorn #include <powerpc/mpc85xx/mpc85xx.h> 49b40ce02aSNathan Whitehorn #include <powerpc/mpc85xx/ocpbus.h> 50b40ce02aSNathan Whitehorn 51b40ce02aSNathan Whitehorn #include "platform_if.h" 52b40ce02aSNathan Whitehorn 53b40ce02aSNathan Whitehorn static int cpu; 54b40ce02aSNathan Whitehorn 55b40ce02aSNathan Whitehorn static int bare_probe(platform_t); 56b40ce02aSNathan Whitehorn static void bare_mem_regions(platform_t, struct mem_region **phys, int *physsz, 57b40ce02aSNathan Whitehorn struct mem_region **avail, int *availsz); 58b40ce02aSNathan Whitehorn static u_long bare_timebase_freq(platform_t, struct cpuref *cpuref); 59b40ce02aSNathan Whitehorn static int bare_smp_first_cpu(platform_t, struct cpuref *cpuref); 60b40ce02aSNathan Whitehorn static int bare_smp_next_cpu(platform_t, struct cpuref *cpuref); 61b40ce02aSNathan Whitehorn static int bare_smp_get_bsp(platform_t, struct cpuref *cpuref); 62b40ce02aSNathan Whitehorn static int bare_smp_start_cpu(platform_t, struct pcpu *cpu); 63b40ce02aSNathan Whitehorn 64b40ce02aSNathan Whitehorn static platform_method_t bare_methods[] = { 65b40ce02aSNathan Whitehorn PLATFORMMETHOD(platform_probe, bare_probe), 66b40ce02aSNathan Whitehorn PLATFORMMETHOD(platform_mem_regions, bare_mem_regions), 67b40ce02aSNathan Whitehorn PLATFORMMETHOD(platform_timebase_freq, bare_timebase_freq), 68b40ce02aSNathan Whitehorn 69b40ce02aSNathan Whitehorn PLATFORMMETHOD(platform_smp_first_cpu, bare_smp_first_cpu), 70b40ce02aSNathan Whitehorn PLATFORMMETHOD(platform_smp_next_cpu, bare_smp_next_cpu), 71b40ce02aSNathan Whitehorn PLATFORMMETHOD(platform_smp_get_bsp, bare_smp_get_bsp), 72b40ce02aSNathan Whitehorn PLATFORMMETHOD(platform_smp_start_cpu, bare_smp_start_cpu), 73b40ce02aSNathan Whitehorn 74b40ce02aSNathan Whitehorn { 0, 0 } 75b40ce02aSNathan Whitehorn }; 76b40ce02aSNathan Whitehorn 77b40ce02aSNathan Whitehorn static platform_def_t bare_platform = { 78b40ce02aSNathan Whitehorn "bare metal", 79b40ce02aSNathan Whitehorn bare_methods, 80b40ce02aSNathan Whitehorn 0 81b40ce02aSNathan Whitehorn }; 82b40ce02aSNathan Whitehorn 83b40ce02aSNathan Whitehorn PLATFORM_DEF(bare_platform); 84b40ce02aSNathan Whitehorn 85b40ce02aSNathan Whitehorn static int 86b40ce02aSNathan Whitehorn bare_probe(platform_t plat) 87b40ce02aSNathan Whitehorn { 88b40ce02aSNathan Whitehorn 89b40ce02aSNathan Whitehorn return (BUS_PROBE_GENERIC); 90b40ce02aSNathan Whitehorn } 91b40ce02aSNathan Whitehorn 92b40ce02aSNathan Whitehorn #define MEM_REGIONS 8 93b40ce02aSNathan Whitehorn static struct mem_region avail_regions[MEM_REGIONS]; 94b40ce02aSNathan Whitehorn 95b40ce02aSNathan Whitehorn void 96b40ce02aSNathan Whitehorn bare_mem_regions(platform_t plat, struct mem_region **phys, int *physsz, 97b40ce02aSNathan Whitehorn struct mem_region **avail, int *availsz) 98b40ce02aSNathan Whitehorn { 99b40ce02aSNathan Whitehorn struct bi_mem_region *mr; 100b40ce02aSNathan Whitehorn int i; 101b40ce02aSNathan Whitehorn 102b40ce02aSNathan Whitehorn /* Initialize memory regions table */ 103b40ce02aSNathan Whitehorn mr = bootinfo_mr(); 104b40ce02aSNathan Whitehorn for (i = 0; i < bootinfo->bi_mem_reg_no; i++, mr++) { 105b40ce02aSNathan Whitehorn if (i == MEM_REGIONS) 106b40ce02aSNathan Whitehorn break; 107b40ce02aSNathan Whitehorn if (mr->mem_base < 1048576) { 108b40ce02aSNathan Whitehorn avail_regions[i].mr_start = 1048576; 109b40ce02aSNathan Whitehorn avail_regions[i].mr_size = mr->mem_size - 110b40ce02aSNathan Whitehorn (1048576 - mr->mem_base); 111b40ce02aSNathan Whitehorn } else { 112b40ce02aSNathan Whitehorn avail_regions[i].mr_start = mr->mem_base; 113b40ce02aSNathan Whitehorn avail_regions[i].mr_size = mr->mem_size; 114b40ce02aSNathan Whitehorn } 115b40ce02aSNathan Whitehorn } 116b40ce02aSNathan Whitehorn *availsz = i; 117b40ce02aSNathan Whitehorn *avail = avail_regions; 118b40ce02aSNathan Whitehorn 119b40ce02aSNathan Whitehorn /* On the bare metal platform phys == avail memory */ 120b40ce02aSNathan Whitehorn *physsz = *availsz; 121b40ce02aSNathan Whitehorn *phys = *avail; 122b40ce02aSNathan Whitehorn } 123b40ce02aSNathan Whitehorn 124b40ce02aSNathan Whitehorn static u_long 125b40ce02aSNathan Whitehorn bare_timebase_freq(platform_t plat, struct cpuref *cpuref) 126b40ce02aSNathan Whitehorn { 127b40ce02aSNathan Whitehorn u_long ticks = -1; 128b40ce02aSNathan Whitehorn 129b40ce02aSNathan Whitehorn /* 130b40ce02aSNathan Whitehorn * Time Base and Decrementer are updated every 8 CCB bus clocks. 131b40ce02aSNathan Whitehorn * HID0[SEL_TBCLK] = 0 132b40ce02aSNathan Whitehorn */ 133b40ce02aSNathan Whitehorn ticks = bootinfo->bi_bus_clk / 8; 134b40ce02aSNathan Whitehorn if (ticks <= 0) 135b40ce02aSNathan Whitehorn panic("Unable to determine timebase frequency!"); 136b40ce02aSNathan Whitehorn 137b40ce02aSNathan Whitehorn return (ticks); 138b40ce02aSNathan Whitehorn } 139b40ce02aSNathan Whitehorn 140b40ce02aSNathan Whitehorn static int 141b40ce02aSNathan Whitehorn bare_smp_first_cpu(platform_t plat, struct cpuref *cpuref) 142b40ce02aSNathan Whitehorn { 143b40ce02aSNathan Whitehorn 144b40ce02aSNathan Whitehorn cpu = 0; 145b40ce02aSNathan Whitehorn cpuref->cr_cpuid = cpu; 146b40ce02aSNathan Whitehorn cpuref->cr_hwref = cpuref->cr_cpuid; 147b40ce02aSNathan Whitehorn if (bootverbose) 148b40ce02aSNathan Whitehorn printf("powerpc_smp_first_cpu: cpuid %d\n", cpuref->cr_cpuid); 149b40ce02aSNathan Whitehorn cpu++; 150b40ce02aSNathan Whitehorn 151b40ce02aSNathan Whitehorn return (0); 152b40ce02aSNathan Whitehorn } 153b40ce02aSNathan Whitehorn 154b40ce02aSNathan Whitehorn static int 155b40ce02aSNathan Whitehorn bare_smp_next_cpu(platform_t plat, struct cpuref *cpuref) 156b40ce02aSNathan Whitehorn { 157b40ce02aSNathan Whitehorn 158b40ce02aSNathan Whitehorn if (cpu >= MAXCPU) 159b40ce02aSNathan Whitehorn return (ENOENT); 160b40ce02aSNathan Whitehorn 161b40ce02aSNathan Whitehorn cpuref->cr_cpuid = cpu++; 162b40ce02aSNathan Whitehorn cpuref->cr_hwref = cpuref->cr_cpuid; 163b40ce02aSNathan Whitehorn if (bootverbose) 164b40ce02aSNathan Whitehorn printf("powerpc_smp_next_cpu: cpuid %d\n", cpuref->cr_cpuid); 165b40ce02aSNathan Whitehorn 166b40ce02aSNathan Whitehorn return (0); 167b40ce02aSNathan Whitehorn } 168b40ce02aSNathan Whitehorn 169b40ce02aSNathan Whitehorn static int 170b40ce02aSNathan Whitehorn bare_smp_get_bsp(platform_t plat, struct cpuref *cpuref) 171b40ce02aSNathan Whitehorn { 172b40ce02aSNathan Whitehorn 173b40ce02aSNathan Whitehorn cpuref->cr_cpuid = mfspr(SPR_PIR); 174b40ce02aSNathan Whitehorn cpuref->cr_hwref = cpuref->cr_cpuid; 175b40ce02aSNathan Whitehorn 176b40ce02aSNathan Whitehorn return (0); 177b40ce02aSNathan Whitehorn } 178b40ce02aSNathan Whitehorn 179b40ce02aSNathan Whitehorn static int 180b40ce02aSNathan Whitehorn bare_smp_start_cpu(platform_t plat, struct pcpu *pc) 181b40ce02aSNathan Whitehorn { 182b40ce02aSNathan Whitehorn 183b40ce02aSNathan Whitehorn /* No SMP support */ 184b40ce02aSNathan Whitehorn return (ENXIO); 185b40ce02aSNathan Whitehorn } 186