1 /*- 2 * Copyright (C) 2006-2012 Semihalf 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 19 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 20 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 21 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 22 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 23 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 /*- 26 * Copyright (C) 2001 Benno Rice 27 * All rights reserved. 28 * 29 * Redistribution and use in source and binary forms, with or without 30 * modification, are permitted provided that the following conditions 31 * are met: 32 * 1. Redistributions of source code must retain the above copyright 33 * notice, this list of conditions and the following disclaimer. 34 * 2. Redistributions in binary form must reproduce the above copyright 35 * notice, this list of conditions and the following disclaimer in the 36 * documentation and/or other materials provided with the distribution. 37 * 38 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 39 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 40 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 41 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 43 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 44 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 45 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 46 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 47 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 48 * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $ 49 */ 50 /*- 51 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 52 * Copyright (C) 1995, 1996 TooLs GmbH. 53 * All rights reserved. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 3. All advertising materials mentioning features or use of this software 64 * must display the following acknowledgement: 65 * This product includes software developed by TooLs GmbH. 66 * 4. The name of TooLs GmbH may not be used to endorse or promote products 67 * derived from this software without specific prior written permission. 68 * 69 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 70 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 71 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 72 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 73 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 74 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 75 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 76 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 77 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 78 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 79 */ 80 81 #include <sys/cdefs.h> 82 __FBSDID("$FreeBSD$"); 83 84 #include "opt_compat.h" 85 #include "opt_ddb.h" 86 #include "opt_hwpmc_hooks.h" 87 #include "opt_kstack_pages.h" 88 #include "opt_platform.h" 89 90 #include <sys/cdefs.h> 91 #include <sys/types.h> 92 #include <sys/param.h> 93 #include <sys/proc.h> 94 #include <sys/systm.h> 95 #include <sys/time.h> 96 #include <sys/bio.h> 97 #include <sys/buf.h> 98 #include <sys/bus.h> 99 #include <sys/cons.h> 100 #include <sys/cpu.h> 101 #include <sys/kdb.h> 102 #include <sys/kernel.h> 103 #include <sys/lock.h> 104 #include <sys/mutex.h> 105 #include <sys/rwlock.h> 106 #include <sys/sysctl.h> 107 #include <sys/exec.h> 108 #include <sys/ktr.h> 109 #include <sys/syscallsubr.h> 110 #include <sys/sysproto.h> 111 #include <sys/signalvar.h> 112 #include <sys/sysent.h> 113 #include <sys/imgact.h> 114 #include <sys/msgbuf.h> 115 #include <sys/ptrace.h> 116 117 #include <vm/vm.h> 118 #include <vm/pmap.h> 119 #include <vm/vm_page.h> 120 #include <vm/vm_object.h> 121 #include <vm/vm_pager.h> 122 123 #include <machine/cpu.h> 124 #include <machine/kdb.h> 125 #include <machine/reg.h> 126 #include <machine/vmparam.h> 127 #include <machine/spr.h> 128 #include <machine/hid.h> 129 #include <machine/psl.h> 130 #include <machine/trap.h> 131 #include <machine/md_var.h> 132 #include <machine/mmuvar.h> 133 #include <machine/sigframe.h> 134 #include <machine/machdep.h> 135 #include <machine/metadata.h> 136 #include <machine/platform.h> 137 138 #include <sys/linker.h> 139 #include <sys/reboot.h> 140 141 #include <contrib/libfdt/libfdt.h> 142 #include <dev/fdt/fdt_common.h> 143 #include <dev/ofw/openfirm.h> 144 145 #ifdef MPC85XX 146 #include <powerpc/mpc85xx/mpc85xx.h> 147 #endif 148 149 #ifdef DDB 150 #include <ddb/ddb.h> 151 #endif 152 153 #ifdef DEBUG 154 #define debugf(fmt, args...) printf(fmt, ##args) 155 #else 156 #define debugf(fmt, args...) 157 #endif 158 159 extern unsigned char kernel_text[]; 160 extern unsigned char _etext[]; 161 extern unsigned char _edata[]; 162 extern unsigned char __bss_start[]; 163 extern unsigned char __sbss_start[]; 164 extern unsigned char __sbss_end[]; 165 extern unsigned char _end[]; 166 extern vm_offset_t __endkernel; 167 168 /* 169 * Bootinfo is passed to us by legacy loaders. Save the address of the 170 * structure to handle backward compatibility. 171 */ 172 uint32_t *bootinfo; 173 174 void print_kernel_section_addr(void); 175 void print_kenv(void); 176 uintptr_t booke_init(uint32_t, uint32_t); 177 void ivor_setup(void); 178 179 extern void *interrupt_vector_base; 180 extern void *int_critical_input; 181 extern void *int_machine_check; 182 extern void *int_data_storage; 183 extern void *int_instr_storage; 184 extern void *int_external_input; 185 extern void *int_alignment; 186 extern void *int_program; 187 extern void *int_syscall; 188 extern void *int_decrementer; 189 extern void *int_fixed_interval_timer; 190 extern void *int_watchdog; 191 extern void *int_data_tlb_error; 192 extern void *int_inst_tlb_error; 193 extern void *int_debug; 194 #ifdef HWPMC_HOOKS 195 extern void *int_performance_counter; 196 #endif 197 198 #define SET_TRAP(ivor, handler) \ 199 KASSERT(((uintptr_t)(&handler) & ~0xffffUL) == \ 200 ((uintptr_t)(&interrupt_vector_base) & ~0xffffUL), \ 201 ("Handler " #handler " too far from interrupt vector base")); \ 202 mtspr(ivor, (uintptr_t)(&handler) & 0xffffUL); 203 204 uintptr_t powerpc_init(vm_offset_t fdt, vm_offset_t, vm_offset_t, void *mdp); 205 void booke_cpu_init(void); 206 207 void 208 booke_cpu_init(void) 209 { 210 211 pmap_mmu_install(MMU_TYPE_BOOKE, BUS_PROBE_GENERIC); 212 } 213 214 void 215 ivor_setup(void) 216 { 217 218 mtspr(SPR_IVPR, ((uintptr_t)&interrupt_vector_base) & 0xffff0000); 219 220 SET_TRAP(SPR_IVOR0, int_critical_input); 221 SET_TRAP(SPR_IVOR1, int_machine_check); 222 SET_TRAP(SPR_IVOR2, int_data_storage); 223 SET_TRAP(SPR_IVOR3, int_instr_storage); 224 SET_TRAP(SPR_IVOR4, int_external_input); 225 SET_TRAP(SPR_IVOR5, int_alignment); 226 SET_TRAP(SPR_IVOR6, int_program); 227 SET_TRAP(SPR_IVOR8, int_syscall); 228 SET_TRAP(SPR_IVOR10, int_decrementer); 229 SET_TRAP(SPR_IVOR11, int_fixed_interval_timer); 230 SET_TRAP(SPR_IVOR12, int_watchdog); 231 SET_TRAP(SPR_IVOR13, int_data_tlb_error); 232 SET_TRAP(SPR_IVOR14, int_inst_tlb_error); 233 SET_TRAP(SPR_IVOR15, int_debug); 234 #ifdef HWPMC_HOOKS 235 SET_TRAP(SPR_IVOR35, int_performance_counter); 236 #endif 237 } 238 239 static int 240 booke_check_for_fdt(uint32_t arg1, vm_offset_t *dtbp) 241 { 242 void *ptr; 243 244 if (arg1 % 8 != 0) 245 return (-1); 246 247 ptr = (void *)pmap_early_io_map(arg1, PAGE_SIZE); 248 if (fdt_check_header(ptr) != 0) 249 return (-1); 250 251 *dtbp = (vm_offset_t)ptr; 252 253 return (0); 254 } 255 256 uintptr_t 257 booke_init(uint32_t arg1, uint32_t arg2) 258 { 259 uintptr_t ret; 260 void *mdp; 261 vm_offset_t dtbp, end; 262 263 end = (uintptr_t)_end; 264 dtbp = (vm_offset_t)NULL; 265 266 /* Set up TLB initially */ 267 bootinfo = NULL; 268 bzero(__sbss_start, __sbss_end - __sbss_start); 269 bzero(__bss_start, _end - __bss_start); 270 tlb1_init(); 271 272 /* 273 * Handle the various ways we can get loaded and started: 274 * - FreeBSD's loader passes the pointer to the metadata 275 * in arg1, with arg2 undefined. arg1 has a value that's 276 * relative to the kernel's link address (i.e. larger 277 * than 0xc0000000). 278 * - Juniper's loader passes the metadata pointer in arg2 279 * and sets arg1 to zero. This is to signal that the 280 * loader maps the kernel and starts it at its link 281 * address (unlike the FreeBSD loader). 282 * - U-Boot passes the standard argc and argv parameters 283 * in arg1 and arg2 (resp). arg1 is between 1 and some 284 * relatively small number, such as 64K. arg2 is the 285 * physical address of the argv vector. 286 * - ePAPR loaders pass an FDT blob in r3 (arg1) and the magic hex 287 * string 0x45504150 ('ePAP') in r6 (which has been lost by now). 288 * r4 (arg2) is supposed to be set to zero, but is not always. 289 */ 290 291 if (arg1 == 0) /* Juniper loader */ 292 mdp = (void *)arg2; 293 else if (booke_check_for_fdt(arg1, &dtbp) == 0) { /* ePAPR */ 294 end = roundup(end, 8); 295 memmove((void *)end, (void *)dtbp, fdt_totalsize((void *)dtbp)); 296 dtbp = end; 297 end += fdt_totalsize((void *)dtbp); 298 __endkernel = end; 299 mdp = NULL; 300 } else if (arg1 > (uintptr_t)kernel_text) /* FreeBSD loader */ 301 mdp = (void *)arg1; 302 else /* U-Boot */ 303 mdp = NULL; 304 305 /* Reset TLB1 to get rid of temporary mappings */ 306 tlb1_init(); 307 308 ret = powerpc_init(dtbp, 0, 0, mdp); 309 310 /* Enable L1 caches */ 311 booke_enable_l1_cache(); 312 313 return (ret); 314 } 315 316 #define RES_GRANULE 32 317 extern uint32_t tlb0_miss_locks[]; 318 319 /* Initialise a struct pcpu. */ 320 void 321 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz) 322 { 323 324 pcpu->pc_tid_next = TID_MIN; 325 326 #ifdef SMP 327 uint32_t *ptr; 328 int words_per_gran = RES_GRANULE / sizeof(uint32_t); 329 330 ptr = &tlb0_miss_locks[cpuid * words_per_gran]; 331 pcpu->pc_booke_tlb_lock = ptr; 332 *ptr = TLB_UNLOCKED; 333 *(ptr + 1) = 0; /* recurse counter */ 334 #endif 335 } 336 337 /* Shutdown the CPU as much as possible. */ 338 void 339 cpu_halt(void) 340 { 341 342 mtmsr(mfmsr() & ~(PSL_CE | PSL_EE | PSL_ME | PSL_DE)); 343 while (1) 344 ; 345 } 346 347 int 348 ptrace_single_step(struct thread *td) 349 { 350 struct trapframe *tf; 351 352 tf = td->td_frame; 353 tf->srr1 |= PSL_DE; 354 tf->cpu.booke.dbcr0 |= (DBCR0_IDM | DBCR0_IC); 355 return (0); 356 } 357 358 int 359 ptrace_clear_single_step(struct thread *td) 360 { 361 struct trapframe *tf; 362 363 tf = td->td_frame; 364 tf->srr1 &= ~PSL_DE; 365 tf->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC); 366 return (0); 367 } 368 369 void 370 kdb_cpu_clear_singlestep(void) 371 { 372 register_t r; 373 374 r = mfspr(SPR_DBCR0); 375 mtspr(SPR_DBCR0, r & ~DBCR0_IC); 376 kdb_frame->srr1 &= ~PSL_DE; 377 } 378 379 void 380 kdb_cpu_set_singlestep(void) 381 { 382 register_t r; 383 384 r = mfspr(SPR_DBCR0); 385 mtspr(SPR_DBCR0, r | DBCR0_IC | DBCR0_IDM); 386 kdb_frame->srr1 |= PSL_DE; 387 } 388 389