1 /*- 2 * Copyright (C) 2006-2012 Semihalf 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 19 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 20 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 21 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 22 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 23 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 /*- 26 * Copyright (C) 2001 Benno Rice 27 * All rights reserved. 28 * 29 * Redistribution and use in source and binary forms, with or without 30 * modification, are permitted provided that the following conditions 31 * are met: 32 * 1. Redistributions of source code must retain the above copyright 33 * notice, this list of conditions and the following disclaimer. 34 * 2. Redistributions in binary form must reproduce the above copyright 35 * notice, this list of conditions and the following disclaimer in the 36 * documentation and/or other materials provided with the distribution. 37 * 38 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 39 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 40 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 41 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 43 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 44 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 45 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 46 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 47 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 48 * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $ 49 */ 50 /*- 51 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 52 * Copyright (C) 1995, 1996 TooLs GmbH. 53 * All rights reserved. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 3. All advertising materials mentioning features or use of this software 64 * must display the following acknowledgement: 65 * This product includes software developed by TooLs GmbH. 66 * 4. The name of TooLs GmbH may not be used to endorse or promote products 67 * derived from this software without specific prior written permission. 68 * 69 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 70 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 71 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 72 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 73 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 74 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 75 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 76 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 77 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 78 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 79 */ 80 81 #include <sys/cdefs.h> 82 __FBSDID("$FreeBSD$"); 83 84 #include "opt_compat.h" 85 #include "opt_ddb.h" 86 #include "opt_hwpmc_hooks.h" 87 #include "opt_kstack_pages.h" 88 #include "opt_platform.h" 89 90 #include <sys/cdefs.h> 91 #include <sys/types.h> 92 #include <sys/param.h> 93 #include <sys/proc.h> 94 #include <sys/systm.h> 95 #include <sys/time.h> 96 #include <sys/bio.h> 97 #include <sys/buf.h> 98 #include <sys/bus.h> 99 #include <sys/cons.h> 100 #include <sys/cpu.h> 101 #include <sys/kdb.h> 102 #include <sys/kernel.h> 103 #include <sys/lock.h> 104 #include <sys/mutex.h> 105 #include <sys/rwlock.h> 106 #include <sys/sysctl.h> 107 #include <sys/exec.h> 108 #include <sys/ktr.h> 109 #include <sys/syscallsubr.h> 110 #include <sys/sysproto.h> 111 #include <sys/signalvar.h> 112 #include <sys/sysent.h> 113 #include <sys/imgact.h> 114 #include <sys/msgbuf.h> 115 #include <sys/ptrace.h> 116 117 #include <vm/vm.h> 118 #include <vm/pmap.h> 119 #include <vm/vm_page.h> 120 #include <vm/vm_object.h> 121 #include <vm/vm_pager.h> 122 123 #include <machine/cpu.h> 124 #include <machine/kdb.h> 125 #include <machine/reg.h> 126 #include <machine/vmparam.h> 127 #include <machine/spr.h> 128 #include <machine/hid.h> 129 #include <machine/psl.h> 130 #include <machine/trap.h> 131 #include <machine/md_var.h> 132 #include <machine/mmuvar.h> 133 #include <machine/sigframe.h> 134 #include <machine/machdep.h> 135 #include <machine/metadata.h> 136 #include <machine/platform.h> 137 138 #include <sys/linker.h> 139 #include <sys/reboot.h> 140 141 #include <contrib/libfdt/libfdt.h> 142 #include <dev/fdt/fdt_common.h> 143 #include <dev/ofw/openfirm.h> 144 145 #ifdef DDB 146 #include <ddb/ddb.h> 147 #endif 148 149 #ifdef DEBUG 150 #define debugf(fmt, args...) printf(fmt, ##args) 151 #else 152 #define debugf(fmt, args...) 153 #endif 154 155 extern unsigned char _etext[]; 156 extern unsigned char _edata[]; 157 extern unsigned char __bss_start[]; 158 extern unsigned char __sbss_start[]; 159 extern unsigned char __sbss_end[]; 160 extern unsigned char _end[]; 161 extern vm_offset_t __endkernel; 162 163 /* 164 * Bootinfo is passed to us by legacy loaders. Save the address of the 165 * structure to handle backward compatibility. 166 */ 167 uint32_t *bootinfo; 168 169 void print_kernel_section_addr(void); 170 void print_kenv(void); 171 uintptr_t booke_init(u_long, u_long); 172 void ivor_setup(void); 173 174 extern void *interrupt_vector_base; 175 extern void *int_critical_input; 176 extern void *int_machine_check; 177 extern void *int_data_storage; 178 extern void *int_instr_storage; 179 extern void *int_external_input; 180 extern void *int_alignment; 181 extern void *int_fpu; 182 extern void *int_program; 183 extern void *int_syscall; 184 extern void *int_decrementer; 185 extern void *int_fixed_interval_timer; 186 extern void *int_watchdog; 187 extern void *int_data_tlb_error; 188 extern void *int_inst_tlb_error; 189 extern void *int_debug; 190 extern void *int_vec; 191 extern void *int_vecast; 192 #ifdef HWPMC_HOOKS 193 extern void *int_performance_counter; 194 #endif 195 196 #define SET_TRAP(ivor, handler) \ 197 KASSERT(((uintptr_t)(&handler) & ~0xffffUL) == \ 198 ((uintptr_t)(&interrupt_vector_base) & ~0xffffUL), \ 199 ("Handler " #handler " too far from interrupt vector base")); \ 200 mtspr(ivor, (uintptr_t)(&handler) & 0xffffUL); 201 202 uintptr_t powerpc_init(vm_offset_t fdt, vm_offset_t, vm_offset_t, void *mdp); 203 void booke_cpu_init(void); 204 205 void 206 booke_cpu_init(void) 207 { 208 209 cpu_features |= PPC_FEATURE_BOOKE; 210 211 pmap_mmu_install(MMU_TYPE_BOOKE, BUS_PROBE_GENERIC); 212 } 213 214 void 215 ivor_setup(void) 216 { 217 218 mtspr(SPR_IVPR, ((uintptr_t)&interrupt_vector_base) & 0xffff0000); 219 220 SET_TRAP(SPR_IVOR0, int_critical_input); 221 SET_TRAP(SPR_IVOR1, int_machine_check); 222 SET_TRAP(SPR_IVOR2, int_data_storage); 223 SET_TRAP(SPR_IVOR3, int_instr_storage); 224 SET_TRAP(SPR_IVOR4, int_external_input); 225 SET_TRAP(SPR_IVOR5, int_alignment); 226 SET_TRAP(SPR_IVOR6, int_program); 227 SET_TRAP(SPR_IVOR8, int_syscall); 228 SET_TRAP(SPR_IVOR10, int_decrementer); 229 SET_TRAP(SPR_IVOR11, int_fixed_interval_timer); 230 SET_TRAP(SPR_IVOR12, int_watchdog); 231 SET_TRAP(SPR_IVOR13, int_data_tlb_error); 232 SET_TRAP(SPR_IVOR14, int_inst_tlb_error); 233 SET_TRAP(SPR_IVOR15, int_debug); 234 #ifdef HWPMC_HOOKS 235 SET_TRAP(SPR_IVOR35, int_performance_counter); 236 #endif 237 switch ((mfpvr() >> 16) & 0xffff) { 238 case FSL_E6500: 239 SET_TRAP(SPR_IVOR32, int_vec); 240 SET_TRAP(SPR_IVOR33, int_vecast); 241 /* FALLTHROUGH */ 242 case FSL_E500mc: 243 case FSL_E5500: 244 SET_TRAP(SPR_IVOR7, int_fpu); 245 } 246 } 247 248 static int 249 booke_check_for_fdt(uint32_t arg1, vm_offset_t *dtbp) 250 { 251 void *ptr; 252 int fdt_size; 253 254 if (arg1 % 8 != 0) 255 return (-1); 256 257 ptr = (void *)pmap_early_io_map(arg1, PAGE_SIZE); 258 if (fdt_check_header(ptr) != 0) 259 return (-1); 260 261 /* 262 * Read FDT total size from the header of FDT. 263 * This for sure hits within first page which is 264 * already mapped. 265 */ 266 fdt_size = fdt_totalsize((void *)ptr); 267 268 /* 269 * Ok, arg1 points to FDT, so we need to map it in. 270 * First, unmap this page and then map FDT again with full size 271 */ 272 pmap_early_io_unmap((vm_offset_t)ptr, PAGE_SIZE); 273 ptr = (void *)pmap_early_io_map(arg1, fdt_size); 274 *dtbp = (vm_offset_t)ptr; 275 276 return (0); 277 } 278 279 uintptr_t 280 booke_init(u_long arg1, u_long arg2) 281 { 282 uintptr_t ret; 283 void *mdp; 284 vm_offset_t dtbp, end; 285 286 end = (uintptr_t)_end; 287 dtbp = (vm_offset_t)NULL; 288 289 /* Set up TLB initially */ 290 bootinfo = NULL; 291 bzero(__sbss_start, __sbss_end - __sbss_start); 292 bzero(__bss_start, _end - __bss_start); 293 tlb1_init(); 294 295 /* 296 * Handle the various ways we can get loaded and started: 297 * - FreeBSD's loader passes the pointer to the metadata 298 * in arg1, with arg2 undefined. arg1 has a value that's 299 * relative to the kernel's link address (i.e. larger 300 * than 0xc0000000). 301 * - Juniper's loader passes the metadata pointer in arg2 302 * and sets arg1 to zero. This is to signal that the 303 * loader maps the kernel and starts it at its link 304 * address (unlike the FreeBSD loader). 305 * - U-Boot passes the standard argc and argv parameters 306 * in arg1 and arg2 (resp). arg1 is between 1 and some 307 * relatively small number, such as 64K. arg2 is the 308 * physical address of the argv vector. 309 * - ePAPR loaders pass an FDT blob in r3 (arg1) and the magic hex 310 * string 0x45504150 ('EPAP') in r6 (which has been lost by now). 311 * r4 (arg2) is supposed to be set to zero, but is not always. 312 */ 313 314 if (arg1 == 0) /* Juniper loader */ 315 mdp = (void *)arg2; 316 else if (booke_check_for_fdt(arg1, &dtbp) == 0) { /* ePAPR */ 317 end = roundup(end, 8); 318 memmove((void *)end, (void *)dtbp, fdt_totalsize((void *)dtbp)); 319 dtbp = end; 320 end += fdt_totalsize((void *)dtbp); 321 __endkernel = end; 322 mdp = NULL; 323 } else if (arg1 > (uintptr_t)btext) /* FreeBSD loader */ 324 mdp = (void *)arg1; 325 else /* U-Boot */ 326 mdp = NULL; 327 328 /* Default to 32 byte cache line size. */ 329 switch ((mfpvr()) >> 16) { 330 case FSL_E500mc: 331 case FSL_E5500: 332 case FSL_E6500: 333 cacheline_size = 64; 334 break; 335 } 336 337 ret = powerpc_init(dtbp, 0, 0, mdp); 338 339 /* Enable caches */ 340 booke_enable_l1_cache(); 341 booke_enable_l2_cache(); 342 343 booke_enable_bpred(); 344 345 return (ret); 346 } 347 348 #define RES_GRANULE 32 349 extern uint32_t tlb0_miss_locks[]; 350 351 /* Initialise a struct pcpu. */ 352 void 353 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz) 354 { 355 356 pcpu->pc_tid_next = TID_MIN; 357 358 #ifdef SMP 359 uint32_t *ptr; 360 int words_per_gran = RES_GRANULE / sizeof(uint32_t); 361 362 ptr = &tlb0_miss_locks[cpuid * words_per_gran]; 363 pcpu->pc_booke_tlb_lock = ptr; 364 *ptr = TLB_UNLOCKED; 365 *(ptr + 1) = 0; /* recurse counter */ 366 #endif 367 } 368 369 /* Shutdown the CPU as much as possible. */ 370 void 371 cpu_halt(void) 372 { 373 374 mtmsr(mfmsr() & ~(PSL_CE | PSL_EE | PSL_ME | PSL_DE)); 375 while (1) 376 ; 377 } 378 379 int 380 ptrace_single_step(struct thread *td) 381 { 382 struct trapframe *tf; 383 384 tf = td->td_frame; 385 tf->srr1 |= PSL_DE; 386 tf->cpu.booke.dbcr0 |= (DBCR0_IDM | DBCR0_IC); 387 return (0); 388 } 389 390 int 391 ptrace_clear_single_step(struct thread *td) 392 { 393 struct trapframe *tf; 394 395 tf = td->td_frame; 396 tf->srr1 &= ~PSL_DE; 397 tf->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC); 398 return (0); 399 } 400 401 void 402 kdb_cpu_clear_singlestep(void) 403 { 404 register_t r; 405 406 r = mfspr(SPR_DBCR0); 407 mtspr(SPR_DBCR0, r & ~DBCR0_IC); 408 kdb_frame->srr1 &= ~PSL_DE; 409 } 410 411 void 412 kdb_cpu_set_singlestep(void) 413 { 414 register_t r; 415 416 r = mfspr(SPR_DBCR0); 417 mtspr(SPR_DBCR0, r | DBCR0_IC | DBCR0_IDM); 418 kdb_frame->srr1 |= PSL_DE; 419 } 420 421