1 /* 2 * Copyright (c) 2001 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Matt Thomas <matt@3am-software.com> of Allegro Networks, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the NetBSD 19 * Foundation, Inc. and its contributors. 20 * 4. Neither the name of The NetBSD Foundation nor the names of its 21 * contributors may be used to endorse or promote products derived 22 * from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 /* 37 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 38 * Copyright (C) 1995, 1996 TooLs GmbH. 39 * All rights reserved. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed by TooLs GmbH. 52 * 4. The name of TooLs GmbH may not be used to endorse or promote products 53 * derived from this software without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 56 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 57 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 58 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 60 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 61 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 62 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 63 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 64 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 65 * 66 * $NetBSD: pmap.c,v 1.28 2000/03/26 20:42:36 kleink Exp $ 67 */ 68 /* 69 * Copyright (C) 2001 Benno Rice. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 81 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 82 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 83 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 84 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 85 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 86 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 87 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 88 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 89 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 90 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 91 */ 92 93 #ifndef lint 94 static const char rcsid[] = 95 "$FreeBSD$"; 96 #endif /* not lint */ 97 98 /* 99 * Manages physical address maps. 100 * 101 * In addition to hardware address maps, this module is called upon to 102 * provide software-use-only maps which may or may not be stored in the 103 * same form as hardware maps. These pseudo-maps are used to store 104 * intermediate results from copy operations to and from address spaces. 105 * 106 * Since the information managed by this module is also stored by the 107 * logical address mapping module, this module may throw away valid virtual 108 * to physical mappings at almost any time. However, invalidations of 109 * mappings must be done as requested. 110 * 111 * In order to cope with hardware architectures which make virtual to 112 * physical map invalidates expensive, this module may delay invalidate 113 * reduced protection operations until such time as they are actually 114 * necessary. This module is given full information as to which processors 115 * are currently using which maps, and to when physical maps must be made 116 * correct. 117 */ 118 119 #include <sys/param.h> 120 #include <sys/kernel.h> 121 #include <sys/ktr.h> 122 #include <sys/lock.h> 123 #include <sys/msgbuf.h> 124 #include <sys/mutex.h> 125 #include <sys/proc.h> 126 #include <sys/sysctl.h> 127 #include <sys/systm.h> 128 #include <sys/vmmeter.h> 129 130 #include <dev/ofw/openfirm.h> 131 132 #include <vm/vm.h> 133 #include <vm/vm_param.h> 134 #include <vm/vm_kern.h> 135 #include <vm/vm_page.h> 136 #include <vm/vm_map.h> 137 #include <vm/vm_object.h> 138 #include <vm/vm_extern.h> 139 #include <vm/vm_pageout.h> 140 #include <vm/vm_pager.h> 141 #include <vm/uma.h> 142 143 #include <machine/powerpc.h> 144 #include <machine/bat.h> 145 #include <machine/frame.h> 146 #include <machine/md_var.h> 147 #include <machine/psl.h> 148 #include <machine/pte.h> 149 #include <machine/sr.h> 150 151 #define PMAP_DEBUG 152 153 #define TODO panic("%s: not implemented", __func__); 154 155 #define PMAP_LOCK(pm) 156 #define PMAP_UNLOCK(pm) 157 158 #define TLBIE(va) __asm __volatile("tlbie %0" :: "r"(va)) 159 #define TLBSYNC() __asm __volatile("tlbsync"); 160 #define SYNC() __asm __volatile("sync"); 161 #define EIEIO() __asm __volatile("eieio"); 162 163 #define VSID_MAKE(sr, hash) ((sr) | (((hash) & 0xfffff) << 4)) 164 #define VSID_TO_SR(vsid) ((vsid) & 0xf) 165 #define VSID_TO_HASH(vsid) (((vsid) >> 4) & 0xfffff) 166 167 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 168 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 169 #define PVO_WIRED 0x0010 /* PVO entry is wired */ 170 #define PVO_MANAGED 0x0020 /* PVO entry is managed */ 171 #define PVO_EXECUTABLE 0x0040 /* PVO entry is executable */ 172 #define PVO_BOOTSTRAP 0x0080 /* PVO entry allocated during 173 bootstrap */ 174 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 175 #define PVO_ISEXECUTABLE(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 176 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 177 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 178 #define PVO_PTEGIDX_CLR(pvo) \ 179 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 180 #define PVO_PTEGIDX_SET(pvo, i) \ 181 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 182 183 #define PMAP_PVO_CHECK(pvo) 184 185 struct ofw_map { 186 vm_offset_t om_va; 187 vm_size_t om_len; 188 vm_offset_t om_pa; 189 u_int om_mode; 190 }; 191 192 int pmap_bootstrapped = 0; 193 194 /* 195 * Virtual and physical address of message buffer. 196 */ 197 struct msgbuf *msgbufp; 198 vm_offset_t msgbuf_phys; 199 200 /* 201 * Physical addresses of first and last available physical page. 202 */ 203 vm_offset_t avail_start; 204 vm_offset_t avail_end; 205 206 /* 207 * Map of physical memory regions. 208 */ 209 vm_offset_t phys_avail[128]; 210 u_int phys_avail_count; 211 static struct mem_region *regions; 212 static struct mem_region *pregions; 213 int regions_sz, pregions_sz; 214 static struct ofw_map *translations; 215 216 /* 217 * First and last available kernel virtual addresses. 218 */ 219 vm_offset_t virtual_avail; 220 vm_offset_t virtual_end; 221 vm_offset_t kernel_vm_end; 222 223 /* 224 * Kernel pmap. 225 */ 226 struct pmap kernel_pmap_store; 227 extern struct pmap ofw_pmap; 228 229 /* 230 * PTEG data. 231 */ 232 static struct pteg *pmap_pteg_table; 233 u_int pmap_pteg_count; 234 u_int pmap_pteg_mask; 235 236 /* 237 * PVO data. 238 */ 239 struct pvo_head *pmap_pvo_table; /* pvo entries by pteg index */ 240 struct pvo_head pmap_pvo_kunmanaged = 241 LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 242 struct pvo_head pmap_pvo_unmanaged = 243 LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 244 245 uma_zone_t pmap_upvo_zone; /* zone for pvo entries for unmanaged pages */ 246 uma_zone_t pmap_mpvo_zone; /* zone for pvo entries for managed pages */ 247 struct vm_object pmap_upvo_zone_obj; 248 struct vm_object pmap_mpvo_zone_obj; 249 static vm_object_t pmap_pvo_obj; 250 static u_int pmap_pvo_count; 251 252 #define BPVO_POOL_SIZE 32768 253 static struct pvo_entry *pmap_bpvo_pool; 254 static int pmap_bpvo_pool_index = 0; 255 256 #define VSID_NBPW (sizeof(u_int32_t) * 8) 257 static u_int pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 258 259 static boolean_t pmap_initialized = FALSE; 260 261 /* 262 * Statistics. 263 */ 264 u_int pmap_pte_valid = 0; 265 u_int pmap_pte_overflow = 0; 266 u_int pmap_pte_replacements = 0; 267 u_int pmap_pvo_entries = 0; 268 u_int pmap_pvo_enter_calls = 0; 269 u_int pmap_pvo_remove_calls = 0; 270 u_int pmap_pte_spills = 0; 271 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_valid, CTLFLAG_RD, &pmap_pte_valid, 272 0, ""); 273 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_overflow, CTLFLAG_RD, 274 &pmap_pte_overflow, 0, ""); 275 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_replacements, CTLFLAG_RD, 276 &pmap_pte_replacements, 0, ""); 277 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_entries, CTLFLAG_RD, &pmap_pvo_entries, 278 0, ""); 279 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_enter_calls, CTLFLAG_RD, 280 &pmap_pvo_enter_calls, 0, ""); 281 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_remove_calls, CTLFLAG_RD, 282 &pmap_pvo_remove_calls, 0, ""); 283 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_spills, CTLFLAG_RD, 284 &pmap_pte_spills, 0, ""); 285 286 struct pvo_entry *pmap_pvo_zeropage; 287 288 vm_offset_t pmap_rkva_start = VM_MIN_KERNEL_ADDRESS; 289 u_int pmap_rkva_count = 4; 290 291 /* 292 * Allocate physical memory for use in pmap_bootstrap. 293 */ 294 static vm_offset_t pmap_bootstrap_alloc(vm_size_t, u_int); 295 296 /* 297 * PTE calls. 298 */ 299 static int pmap_pte_insert(u_int, struct pte *); 300 301 /* 302 * PVO calls. 303 */ 304 static int pmap_pvo_enter(pmap_t, uma_zone_t, struct pvo_head *, 305 vm_offset_t, vm_offset_t, u_int, int); 306 static void pmap_pvo_remove(struct pvo_entry *, int); 307 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vm_offset_t, int *); 308 static struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 309 310 /* 311 * Utility routines. 312 */ 313 static void * pmap_pvo_allocf(uma_zone_t, int, u_int8_t *, int); 314 static struct pvo_entry *pmap_rkva_alloc(void); 315 static void pmap_pa_map(struct pvo_entry *, vm_offset_t, 316 struct pte *, int *); 317 static void pmap_pa_unmap(struct pvo_entry *, struct pte *, int *); 318 static void pmap_syncicache(vm_offset_t, vm_size_t); 319 static boolean_t pmap_query_bit(vm_page_t, int); 320 static boolean_t pmap_clear_bit(vm_page_t, int); 321 static void tlbia(void); 322 323 static __inline int 324 va_to_sr(u_int *sr, vm_offset_t va) 325 { 326 return (sr[(uintptr_t)va >> ADDR_SR_SHFT]); 327 } 328 329 static __inline u_int 330 va_to_pteg(u_int sr, vm_offset_t addr) 331 { 332 u_int hash; 333 334 hash = (sr & SR_VSID_MASK) ^ (((u_int)addr & ADDR_PIDX) >> 335 ADDR_PIDX_SHFT); 336 return (hash & pmap_pteg_mask); 337 } 338 339 static __inline struct pvo_head * 340 pa_to_pvoh(vm_offset_t pa, vm_page_t *pg_p) 341 { 342 struct vm_page *pg; 343 344 pg = PHYS_TO_VM_PAGE(pa); 345 346 if (pg_p != NULL) 347 *pg_p = pg; 348 349 if (pg == NULL) 350 return (&pmap_pvo_unmanaged); 351 352 return (&pg->md.mdpg_pvoh); 353 } 354 355 static __inline struct pvo_head * 356 vm_page_to_pvoh(vm_page_t m) 357 { 358 359 return (&m->md.mdpg_pvoh); 360 } 361 362 static __inline void 363 pmap_attr_clear(vm_page_t m, int ptebit) 364 { 365 366 m->md.mdpg_attrs &= ~ptebit; 367 } 368 369 static __inline int 370 pmap_attr_fetch(vm_page_t m) 371 { 372 373 return (m->md.mdpg_attrs); 374 } 375 376 static __inline void 377 pmap_attr_save(vm_page_t m, int ptebit) 378 { 379 380 m->md.mdpg_attrs |= ptebit; 381 } 382 383 static __inline int 384 pmap_pte_compare(const struct pte *pt, const struct pte *pvo_pt) 385 { 386 if (pt->pte_hi == pvo_pt->pte_hi) 387 return (1); 388 389 return (0); 390 } 391 392 static __inline int 393 pmap_pte_match(struct pte *pt, u_int sr, vm_offset_t va, int which) 394 { 395 return (pt->pte_hi & ~PTE_VALID) == 396 (((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 397 ((va >> ADDR_API_SHFT) & PTE_API) | which); 398 } 399 400 static __inline void 401 pmap_pte_create(struct pte *pt, u_int sr, vm_offset_t va, u_int pte_lo) 402 { 403 /* 404 * Construct a PTE. Default to IMB initially. Valid bit only gets 405 * set when the real pte is set in memory. 406 * 407 * Note: Don't set the valid bit for correct operation of tlb update. 408 */ 409 pt->pte_hi = ((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 410 (((va & ADDR_PIDX) >> ADDR_API_SHFT) & PTE_API); 411 pt->pte_lo = pte_lo; 412 } 413 414 static __inline void 415 pmap_pte_synch(struct pte *pt, struct pte *pvo_pt) 416 { 417 418 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF | PTE_CHG); 419 } 420 421 static __inline void 422 pmap_pte_clear(struct pte *pt, vm_offset_t va, int ptebit) 423 { 424 425 /* 426 * As shown in Section 7.6.3.2.3 427 */ 428 pt->pte_lo &= ~ptebit; 429 TLBIE(va); 430 EIEIO(); 431 TLBSYNC(); 432 SYNC(); 433 } 434 435 static __inline void 436 pmap_pte_set(struct pte *pt, struct pte *pvo_pt) 437 { 438 439 pvo_pt->pte_hi |= PTE_VALID; 440 441 /* 442 * Update the PTE as defined in section 7.6.3.1. 443 * Note that the REF/CHG bits are from pvo_pt and thus should havce 444 * been saved so this routine can restore them (if desired). 445 */ 446 pt->pte_lo = pvo_pt->pte_lo; 447 EIEIO(); 448 pt->pte_hi = pvo_pt->pte_hi; 449 SYNC(); 450 pmap_pte_valid++; 451 } 452 453 static __inline void 454 pmap_pte_unset(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 455 { 456 457 pvo_pt->pte_hi &= ~PTE_VALID; 458 459 /* 460 * Force the reg & chg bits back into the PTEs. 461 */ 462 SYNC(); 463 464 /* 465 * Invalidate the pte. 466 */ 467 pt->pte_hi &= ~PTE_VALID; 468 469 SYNC(); 470 TLBIE(va); 471 EIEIO(); 472 TLBSYNC(); 473 SYNC(); 474 475 /* 476 * Save the reg & chg bits. 477 */ 478 pmap_pte_synch(pt, pvo_pt); 479 pmap_pte_valid--; 480 } 481 482 static __inline void 483 pmap_pte_change(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 484 { 485 486 /* 487 * Invalidate the PTE 488 */ 489 pmap_pte_unset(pt, pvo_pt, va); 490 pmap_pte_set(pt, pvo_pt); 491 } 492 493 /* 494 * Quick sort callout for comparing memory regions. 495 */ 496 static int mr_cmp(const void *a, const void *b); 497 static int om_cmp(const void *a, const void *b); 498 499 static int 500 mr_cmp(const void *a, const void *b) 501 { 502 const struct mem_region *regiona; 503 const struct mem_region *regionb; 504 505 regiona = a; 506 regionb = b; 507 if (regiona->mr_start < regionb->mr_start) 508 return (-1); 509 else if (regiona->mr_start > regionb->mr_start) 510 return (1); 511 else 512 return (0); 513 } 514 515 static int 516 om_cmp(const void *a, const void *b) 517 { 518 const struct ofw_map *mapa; 519 const struct ofw_map *mapb; 520 521 mapa = a; 522 mapb = b; 523 if (mapa->om_pa < mapb->om_pa) 524 return (-1); 525 else if (mapa->om_pa > mapb->om_pa) 526 return (1); 527 else 528 return (0); 529 } 530 531 void 532 pmap_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) 533 { 534 ihandle_t mmui; 535 phandle_t chosen, mmu; 536 int sz; 537 int i, j; 538 int ofw_mappings; 539 vm_size_t size, physsz; 540 vm_offset_t pa, va, off; 541 u_int batl, batu; 542 543 /* 544 * Set up BAT0 to map the lowest 256 MB area 545 */ 546 battable[0x0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 547 battable[0x0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 548 549 /* 550 * Map PCI memory space. 551 */ 552 battable[0x8].batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); 553 battable[0x8].batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 554 555 battable[0x9].batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW); 556 battable[0x9].batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs); 557 558 battable[0xa].batl = BATL(0xa0000000, BAT_I|BAT_G, BAT_PP_RW); 559 battable[0xa].batu = BATU(0xa0000000, BAT_BL_256M, BAT_Vs); 560 561 battable[0xb].batl = BATL(0xb0000000, BAT_I|BAT_G, BAT_PP_RW); 562 battable[0xb].batu = BATU(0xb0000000, BAT_BL_256M, BAT_Vs); 563 564 /* 565 * Map obio devices. 566 */ 567 battable[0xf].batl = BATL(0xf0000000, BAT_I|BAT_G, BAT_PP_RW); 568 battable[0xf].batu = BATU(0xf0000000, BAT_BL_256M, BAT_Vs); 569 570 /* 571 * Use an IBAT and a DBAT to map the bottom segment of memory 572 * where we are. 573 */ 574 batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 575 batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 576 __asm ("mtibatu 0,%0; mtibatl 0,%1; mtdbatu 0,%0; mtdbatl 0,%1" 577 :: "r"(batu), "r"(batl)); 578 579 #if 0 580 /* map frame buffer */ 581 batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs); 582 batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW); 583 __asm ("mtdbatu 1,%0; mtdbatl 1,%1" 584 :: "r"(batu), "r"(batl)); 585 #endif 586 587 #if 1 588 /* map pci space */ 589 batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 590 batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); 591 __asm ("mtdbatu 1,%0; mtdbatl 1,%1" 592 :: "r"(batu), "r"(batl)); 593 #endif 594 595 /* 596 * Set the start and end of kva. 597 */ 598 virtual_avail = VM_MIN_KERNEL_ADDRESS; 599 virtual_end = VM_MAX_KERNEL_ADDRESS; 600 601 mem_regions(&pregions, &pregions_sz, ®ions, ®ions_sz); 602 CTR0(KTR_PMAP, "pmap_bootstrap: physical memory"); 603 604 qsort(pregions, pregions_sz, sizeof(*pregions), mr_cmp); 605 for (i = 0; i < pregions_sz; i++) { 606 vm_offset_t pa; 607 vm_offset_t end; 608 609 CTR3(KTR_PMAP, "physregion: %#x - %#x (%#x)", 610 pregions[i].mr_start, 611 pregions[i].mr_start + pregions[i].mr_size, 612 pregions[i].mr_size); 613 /* 614 * Install entries into the BAT table to allow all 615 * of physmem to be convered by on-demand BAT entries. 616 * The loop will sometimes set the same battable element 617 * twice, but that's fine since they won't be used for 618 * a while yet. 619 */ 620 pa = pregions[i].mr_start & 0xf0000000; 621 end = pregions[i].mr_start + pregions[i].mr_size; 622 do { 623 u_int n = pa >> ADDR_SR_SHFT; 624 625 battable[n].batl = BATL(pa, BAT_M, BAT_PP_RW); 626 battable[n].batu = BATU(pa, BAT_BL_256M, BAT_Vs); 627 pa += SEGMENT_LENGTH; 628 } while (pa < end); 629 } 630 631 if (sizeof(phys_avail)/sizeof(phys_avail[0]) < regions_sz) 632 panic("pmap_bootstrap: phys_avail too small"); 633 qsort(regions, regions_sz, sizeof(*regions), mr_cmp); 634 phys_avail_count = 0; 635 physsz = 0; 636 for (i = 0, j = 0; i < regions_sz; i++, j += 2) { 637 CTR3(KTR_PMAP, "region: %#x - %#x (%#x)", regions[i].mr_start, 638 regions[i].mr_start + regions[i].mr_size, 639 regions[i].mr_size); 640 phys_avail[j] = regions[i].mr_start; 641 phys_avail[j + 1] = regions[i].mr_start + regions[i].mr_size; 642 phys_avail_count++; 643 physsz += regions[i].mr_size; 644 } 645 physmem = btoc(physsz); 646 647 /* 648 * Allocate PTEG table. 649 */ 650 #ifdef PTEGCOUNT 651 pmap_pteg_count = PTEGCOUNT; 652 #else 653 pmap_pteg_count = 0x1000; 654 655 while (pmap_pteg_count < physmem) 656 pmap_pteg_count <<= 1; 657 658 pmap_pteg_count >>= 1; 659 #endif /* PTEGCOUNT */ 660 661 size = pmap_pteg_count * sizeof(struct pteg); 662 CTR2(KTR_PMAP, "pmap_bootstrap: %d PTEGs, %d bytes", pmap_pteg_count, 663 size); 664 pmap_pteg_table = (struct pteg *)pmap_bootstrap_alloc(size, size); 665 CTR1(KTR_PMAP, "pmap_bootstrap: PTEG table at %p", pmap_pteg_table); 666 bzero((void *)pmap_pteg_table, pmap_pteg_count * sizeof(struct pteg)); 667 pmap_pteg_mask = pmap_pteg_count - 1; 668 669 /* 670 * Allocate pv/overflow lists. 671 */ 672 size = sizeof(struct pvo_head) * pmap_pteg_count; 673 pmap_pvo_table = (struct pvo_head *)pmap_bootstrap_alloc(size, 674 PAGE_SIZE); 675 CTR1(KTR_PMAP, "pmap_bootstrap: PVO table at %p", pmap_pvo_table); 676 for (i = 0; i < pmap_pteg_count; i++) 677 LIST_INIT(&pmap_pvo_table[i]); 678 679 /* 680 * Allocate the message buffer. 681 */ 682 msgbuf_phys = pmap_bootstrap_alloc(MSGBUF_SIZE, 0); 683 684 /* 685 * Initialise the unmanaged pvo pool. 686 */ 687 pmap_bpvo_pool = (struct pvo_entry *)pmap_bootstrap_alloc( 688 BPVO_POOL_SIZE*sizeof(struct pvo_entry), 0); 689 pmap_bpvo_pool_index = 0; 690 691 /* 692 * Make sure kernel vsid is allocated as well as VSID 0. 693 */ 694 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS - 1)) / VSID_NBPW] 695 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 696 pmap_vsid_bitmap[0] |= 1; 697 698 /* 699 * Set up the OpenFirmware pmap and add it's mappings. 700 */ 701 pmap_pinit(&ofw_pmap); 702 ofw_pmap.pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 703 if ((chosen = OF_finddevice("/chosen")) == -1) 704 panic("pmap_bootstrap: can't find /chosen"); 705 OF_getprop(chosen, "mmu", &mmui, 4); 706 if ((mmu = OF_instance_to_package(mmui)) == -1) 707 panic("pmap_bootstrap: can't get mmu package"); 708 if ((sz = OF_getproplen(mmu, "translations")) == -1) 709 panic("pmap_bootstrap: can't get ofw translation count"); 710 translations = NULL; 711 for (i = 0; phys_avail[i + 2] != 0; i += 2) { 712 if (phys_avail[i + 1] >= sz) 713 translations = (struct ofw_map *)phys_avail[i]; 714 } 715 if (translations == NULL) 716 panic("pmap_bootstrap: no space to copy translations"); 717 bzero(translations, sz); 718 if (OF_getprop(mmu, "translations", translations, sz) == -1) 719 panic("pmap_bootstrap: can't get ofw translations"); 720 CTR0(KTR_PMAP, "pmap_bootstrap: translations"); 721 sz /= sizeof(*translations); 722 qsort(translations, sz, sizeof (*translations), om_cmp); 723 for (i = 0, ofw_mappings = 0; i < sz; i++) { 724 CTR3(KTR_PMAP, "translation: pa=%#x va=%#x len=%#x", 725 translations[i].om_pa, translations[i].om_va, 726 translations[i].om_len); 727 728 /* 729 * If the mapping is 1:1, let the RAM and device on-demand 730 * BAT tables take care of the translation. 731 */ 732 if (translations[i].om_va == translations[i].om_pa) 733 continue; 734 735 /* Enter the pages */ 736 for (off = 0; off < translations[i].om_len; off += PAGE_SIZE) { 737 struct vm_page m; 738 739 m.phys_addr = translations[i].om_pa + off; 740 pmap_enter(&ofw_pmap, translations[i].om_va + off, &m, 741 VM_PROT_ALL, 1); 742 ofw_mappings++; 743 } 744 } 745 #ifdef SMP 746 TLBSYNC(); 747 #endif 748 749 /* 750 * Initialize the kernel pmap (which is statically allocated). 751 */ 752 for (i = 0; i < 16; i++) { 753 kernel_pmap->pm_sr[i] = EMPTY_SEGMENT; 754 } 755 kernel_pmap->pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 756 kernel_pmap->pm_active = ~0; 757 758 /* 759 * Allocate a kernel stack with a guard page for thread0 and map it 760 * into the kernel page map. 761 */ 762 pa = pmap_bootstrap_alloc(KSTACK_PAGES * PAGE_SIZE, 0); 763 kstack0_phys = pa; 764 kstack0 = virtual_avail + (KSTACK_GUARD_PAGES * PAGE_SIZE); 765 CTR2(KTR_PMAP, "pmap_bootstrap: kstack0 at %#x (%#x)", kstack0_phys, 766 kstack0); 767 virtual_avail += (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE; 768 for (i = 0; i < KSTACK_PAGES; i++) { 769 pa = kstack0_phys + i * PAGE_SIZE; 770 va = kstack0 + i * PAGE_SIZE; 771 pmap_kenter(va, pa); 772 TLBIE(va); 773 } 774 775 /* 776 * Calculate the first and last available physical addresses. 777 */ 778 avail_start = phys_avail[0]; 779 for (i = 0; phys_avail[i + 2] != 0; i += 2) 780 ; 781 avail_end = phys_avail[i + 1]; 782 Maxmem = powerpc_btop(avail_end); 783 784 /* 785 * Allocate virtual address space for the message buffer. 786 */ 787 msgbufp = (struct msgbuf *)virtual_avail; 788 virtual_avail += round_page(MSGBUF_SIZE); 789 790 /* 791 * Initialize hardware. 792 */ 793 for (i = 0; i < 16; i++) { 794 mtsrin(i << ADDR_SR_SHFT, EMPTY_SEGMENT); 795 } 796 __asm __volatile ("mtsr %0,%1" 797 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 798 __asm __volatile ("sync; mtsdr1 %0; isync" 799 :: "r"((u_int)pmap_pteg_table | (pmap_pteg_mask >> 10))); 800 tlbia(); 801 802 pmap_bootstrapped++; 803 } 804 805 /* 806 * Activate a user pmap. The pmap must be activated before it's address 807 * space can be accessed in any way. 808 */ 809 void 810 pmap_activate(struct thread *td) 811 { 812 pmap_t pm, pmr; 813 814 /* 815 * Load all the data we need up front to encourage the compiler to 816 * not issue any loads while we have interrupts disabled below. 817 */ 818 pm = &td->td_proc->p_vmspace->vm_pmap; 819 820 if ((pmr = (pmap_t)pmap_kextract((vm_offset_t)pm)) == NULL) 821 pmr = pm; 822 823 pm->pm_active |= PCPU_GET(cpumask); 824 PCPU_SET(curpmap, pmr); 825 } 826 827 void 828 pmap_deactivate(struct thread *td) 829 { 830 pmap_t pm; 831 832 pm = &td->td_proc->p_vmspace->vm_pmap; 833 pm->pm_active &= ~(PCPU_GET(cpumask)); 834 PCPU_SET(curpmap, NULL); 835 } 836 837 vm_offset_t 838 pmap_addr_hint(vm_object_t object, vm_offset_t va, vm_size_t size) 839 { 840 841 return (va); 842 } 843 844 void 845 pmap_change_wiring(pmap_t pm, vm_offset_t va, boolean_t wired) 846 { 847 struct pvo_entry *pvo; 848 849 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 850 851 if (pvo != NULL) { 852 if (wired) { 853 if ((pvo->pvo_vaddr & PVO_WIRED) == 0) 854 pm->pm_stats.wired_count++; 855 pvo->pvo_vaddr |= PVO_WIRED; 856 } else { 857 if ((pvo->pvo_vaddr & PVO_WIRED) != 0) 858 pm->pm_stats.wired_count--; 859 pvo->pvo_vaddr &= ~PVO_WIRED; 860 } 861 } 862 } 863 864 void 865 pmap_clear_modify(vm_page_t m) 866 { 867 868 if (m->flags * PG_FICTITIOUS) 869 return; 870 pmap_clear_bit(m, PTE_CHG); 871 } 872 873 void 874 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, 875 vm_size_t len, vm_offset_t src_addr) 876 { 877 878 /* 879 * This is not needed as it's mainly an optimisation. 880 * It may want to be implemented later though. 881 */ 882 } 883 884 void 885 pmap_copy_page(vm_page_t msrc, vm_page_t mdst) 886 { 887 vm_offset_t dst; 888 vm_offset_t src; 889 890 dst = VM_PAGE_TO_PHYS(mdst); 891 src = VM_PAGE_TO_PHYS(msrc); 892 893 kcopy((void *)src, (void *)dst, PAGE_SIZE); 894 } 895 896 /* 897 * Zero a page of physical memory by temporarily mapping it into the tlb. 898 */ 899 void 900 pmap_zero_page(vm_page_t m) 901 { 902 vm_offset_t pa = VM_PAGE_TO_PHYS(m); 903 caddr_t va; 904 int i; 905 906 if (pa < SEGMENT_LENGTH) { 907 va = (caddr_t) pa; 908 } else if (pmap_initialized) { 909 if (pmap_pvo_zeropage == NULL) 910 pmap_pvo_zeropage = pmap_rkva_alloc(); 911 pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 912 va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 913 } else { 914 panic("pmap_zero_page: can't zero pa %#x", pa); 915 } 916 917 bzero(va, PAGE_SIZE); 918 919 #if 0 920 for (i = PAGE_SIZE / CACHELINESIZE; i > 0; i--) { 921 __asm __volatile("dcbz 0,%0" :: "r"(va)); 922 va += CACHELINESIZE; 923 } 924 #endif 925 926 if (pa >= SEGMENT_LENGTH) 927 pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 928 } 929 930 void 931 pmap_zero_page_area(vm_page_t m, int off, int size) 932 { 933 vm_offset_t pa = VM_PAGE_TO_PHYS(m); 934 caddr_t va; 935 int i; 936 937 if (pa < SEGMENT_LENGTH) { 938 va = (caddr_t) pa; 939 } else if (pmap_initialized) { 940 if (pmap_pvo_zeropage == NULL) 941 pmap_pvo_zeropage = pmap_rkva_alloc(); 942 pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 943 va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 944 } else { 945 panic("pmap_zero_page: can't zero pa %#x", pa); 946 } 947 948 bzero(va + off, size); 949 950 #if 0 951 for (i = size / CACHELINESIZE; i > 0; i--) { 952 __asm __volatile("dcbz 0,%0" :: "r"(va)); 953 va += CACHELINESIZE; 954 } 955 #endif 956 957 if (pa >= SEGMENT_LENGTH) 958 pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 959 } 960 961 void 962 pmap_zero_page_idle(vm_page_t m) 963 { 964 965 /* XXX this is called outside of Giant, is pmap_zero_page safe? */ 966 /* XXX maybe have a dedicated mapping for this to avoid the problem? */ 967 mtx_lock(&Giant); 968 pmap_zero_page(m); 969 mtx_unlock(&Giant); 970 } 971 972 /* 973 * Map the given physical page at the specified virtual address in the 974 * target pmap with the protection requested. If specified the page 975 * will be wired down. 976 */ 977 void 978 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 979 boolean_t wired) 980 { 981 struct pvo_head *pvo_head; 982 uma_zone_t zone; 983 vm_page_t pg; 984 u_int pte_lo, pvo_flags, was_exec, i; 985 int error; 986 987 if (!pmap_initialized) { 988 pvo_head = &pmap_pvo_kunmanaged; 989 zone = pmap_upvo_zone; 990 pvo_flags = 0; 991 pg = NULL; 992 was_exec = PTE_EXEC; 993 } else { 994 pvo_head = pa_to_pvoh(VM_PAGE_TO_PHYS(m), &pg); 995 zone = pmap_mpvo_zone; 996 pvo_flags = PVO_MANAGED; 997 was_exec = 0; 998 } 999 1000 /* 1001 * If this is a managed page, and it's the first reference to the page, 1002 * clear the execness of the page. Otherwise fetch the execness. 1003 */ 1004 if (pg != NULL) { 1005 if (LIST_EMPTY(pvo_head)) { 1006 pmap_attr_clear(pg, PTE_EXEC); 1007 } else { 1008 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 1009 } 1010 } 1011 1012 1013 /* 1014 * Assume the page is cache inhibited and access is guarded unless 1015 * it's in our available memory array. 1016 */ 1017 pte_lo = PTE_I | PTE_G; 1018 for (i = 0; i < pregions_sz; i++) { 1019 if ((VM_PAGE_TO_PHYS(m) >= pregions[i].mr_start) && 1020 (VM_PAGE_TO_PHYS(m) < 1021 (pregions[i].mr_start + pregions[i].mr_size))) { 1022 pte_lo &= ~(PTE_I | PTE_G); 1023 break; 1024 } 1025 } 1026 1027 if (prot & VM_PROT_WRITE) 1028 pte_lo |= PTE_BW; 1029 else 1030 pte_lo |= PTE_BR; 1031 1032 pvo_flags |= (prot & VM_PROT_EXECUTE); 1033 1034 if (wired) 1035 pvo_flags |= PVO_WIRED; 1036 1037 error = pmap_pvo_enter(pmap, zone, pvo_head, va, VM_PAGE_TO_PHYS(m), 1038 pte_lo, pvo_flags); 1039 1040 /* 1041 * Flush the real page from the instruction cache if this page is 1042 * mapped executable and cacheable and was not previously mapped (or 1043 * was not mapped executable). 1044 */ 1045 if (error == 0 && (pvo_flags & PVO_EXECUTABLE) && 1046 (pte_lo & PTE_I) == 0 && was_exec == 0) { 1047 /* 1048 * Flush the real memory from the cache. 1049 */ 1050 pmap_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE); 1051 if (pg != NULL) 1052 pmap_attr_save(pg, PTE_EXEC); 1053 } 1054 1055 /* XXX syncicache always until problems are sorted */ 1056 pmap_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE); 1057 } 1058 1059 vm_offset_t 1060 pmap_extract(pmap_t pm, vm_offset_t va) 1061 { 1062 struct pvo_entry *pvo; 1063 1064 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 1065 1066 if (pvo != NULL) { 1067 return ((pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF)); 1068 } 1069 1070 return (0); 1071 } 1072 1073 /* 1074 * Grow the number of kernel page table entries. Unneeded. 1075 */ 1076 void 1077 pmap_growkernel(vm_offset_t addr) 1078 { 1079 } 1080 1081 void 1082 pmap_init(vm_offset_t phys_start, vm_offset_t phys_end) 1083 { 1084 1085 CTR0(KTR_PMAP, "pmap_init"); 1086 1087 pmap_pvo_obj = vm_object_allocate(OBJT_PHYS, 16); 1088 pmap_pvo_count = 0; 1089 pmap_upvo_zone = uma_zcreate("UPVO entry", sizeof (struct pvo_entry), 1090 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM); 1091 uma_zone_set_allocf(pmap_upvo_zone, pmap_pvo_allocf); 1092 pmap_mpvo_zone = uma_zcreate("MPVO entry", sizeof(struct pvo_entry), 1093 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM); 1094 uma_zone_set_allocf(pmap_mpvo_zone, pmap_pvo_allocf); 1095 pmap_initialized = TRUE; 1096 } 1097 1098 void 1099 pmap_init2(void) 1100 { 1101 1102 CTR0(KTR_PMAP, "pmap_init2"); 1103 } 1104 1105 boolean_t 1106 pmap_is_modified(vm_page_t m) 1107 { 1108 1109 if (m->flags & PG_FICTITIOUS) 1110 return (FALSE); 1111 1112 return (pmap_query_bit(m, PTE_CHG)); 1113 } 1114 1115 void 1116 pmap_clear_reference(vm_page_t m) 1117 { 1118 TODO; 1119 } 1120 1121 /* 1122 * pmap_ts_referenced: 1123 * 1124 * Return a count of reference bits for a page, clearing those bits. 1125 * It is not necessary for every reference bit to be cleared, but it 1126 * is necessary that 0 only be returned when there are truly no 1127 * reference bits set. 1128 * 1129 * XXX: The exact number of bits to check and clear is a matter that 1130 * should be tested and standardized at some point in the future for 1131 * optimal aging of shared pages. 1132 */ 1133 1134 int 1135 pmap_ts_referenced(vm_page_t m) 1136 { 1137 TODO; 1138 return (0); 1139 } 1140 1141 /* 1142 * Map a wired page into kernel virtual address space. 1143 */ 1144 void 1145 pmap_kenter(vm_offset_t va, vm_offset_t pa) 1146 { 1147 u_int pte_lo; 1148 int error; 1149 int i; 1150 1151 #if 0 1152 if (va < VM_MIN_KERNEL_ADDRESS) 1153 panic("pmap_kenter: attempt to enter non-kernel address %#x", 1154 va); 1155 #endif 1156 1157 pte_lo = PTE_I | PTE_G; 1158 for (i = 0; i < pregions_sz; i++) { 1159 if ((pa >= pregions[i].mr_start) && 1160 (pa < (pregions[i].mr_start + pregions[i].mr_size))) { 1161 pte_lo &= ~(PTE_I | PTE_G); 1162 break; 1163 } 1164 } 1165 1166 error = pmap_pvo_enter(kernel_pmap, pmap_upvo_zone, 1167 &pmap_pvo_kunmanaged, va, pa, pte_lo, PVO_WIRED); 1168 1169 if (error != 0 && error != ENOENT) 1170 panic("pmap_kenter: failed to enter va %#x pa %#x: %d", va, 1171 pa, error); 1172 1173 /* 1174 * Flush the real memory from the instruction cache. 1175 */ 1176 if ((pte_lo & (PTE_I | PTE_G)) == 0) { 1177 pmap_syncicache(pa, PAGE_SIZE); 1178 } 1179 } 1180 1181 /* 1182 * Extract the physical page address associated with the given kernel virtual 1183 * address. 1184 */ 1185 vm_offset_t 1186 pmap_kextract(vm_offset_t va) 1187 { 1188 struct pvo_entry *pvo; 1189 1190 pvo = pmap_pvo_find_va(kernel_pmap, va & ~ADDR_POFF, NULL); 1191 if (pvo == NULL) { 1192 return (0); 1193 } 1194 1195 return ((pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF)); 1196 } 1197 1198 /* 1199 * Remove a wired page from kernel virtual address space. 1200 */ 1201 void 1202 pmap_kremove(vm_offset_t va) 1203 { 1204 1205 pmap_remove(kernel_pmap, va, va + PAGE_SIZE); 1206 } 1207 1208 /* 1209 * Map a range of physical addresses into kernel virtual address space. 1210 * 1211 * The value passed in *virt is a suggested virtual address for the mapping. 1212 * Architectures which can support a direct-mapped physical to virtual region 1213 * can return the appropriate address within that region, leaving '*virt' 1214 * unchanged. We cannot and therefore do not; *virt is updated with the 1215 * first usable address after the mapped region. 1216 */ 1217 vm_offset_t 1218 pmap_map(vm_offset_t *virt, vm_offset_t pa_start, vm_offset_t pa_end, int prot) 1219 { 1220 vm_offset_t sva, va; 1221 1222 sva = *virt; 1223 va = sva; 1224 for (; pa_start < pa_end; pa_start += PAGE_SIZE, va += PAGE_SIZE) 1225 pmap_kenter(va, pa_start); 1226 *virt = va; 1227 return (sva); 1228 } 1229 1230 int 1231 pmap_mincore(pmap_t pmap, vm_offset_t addr) 1232 { 1233 TODO; 1234 return (0); 1235 } 1236 1237 void 1238 pmap_object_init_pt(pmap_t pm, vm_offset_t addr, vm_object_t object, 1239 vm_pindex_t pindex, vm_size_t size, int limit) 1240 { 1241 1242 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1243 ("pmap_remove_pages: non current pmap")); 1244 /* XXX */ 1245 } 1246 1247 /* 1248 * Lower the permission for all mappings to a given page. 1249 */ 1250 void 1251 pmap_page_protect(vm_page_t m, vm_prot_t prot) 1252 { 1253 struct pvo_head *pvo_head; 1254 struct pvo_entry *pvo, *next_pvo; 1255 struct pte *pt; 1256 1257 /* 1258 * Since the routine only downgrades protection, if the 1259 * maximal protection is desired, there isn't any change 1260 * to be made. 1261 */ 1262 if ((prot & (VM_PROT_READ|VM_PROT_WRITE)) == 1263 (VM_PROT_READ|VM_PROT_WRITE)) 1264 return; 1265 1266 pvo_head = vm_page_to_pvoh(m); 1267 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 1268 next_pvo = LIST_NEXT(pvo, pvo_vlink); 1269 PMAP_PVO_CHECK(pvo); /* sanity check */ 1270 1271 /* 1272 * Downgrading to no mapping at all, we just remove the entry. 1273 */ 1274 if ((prot & VM_PROT_READ) == 0) { 1275 pmap_pvo_remove(pvo, -1); 1276 continue; 1277 } 1278 1279 /* 1280 * If EXEC permission is being revoked, just clear the flag 1281 * in the PVO. 1282 */ 1283 if ((prot & VM_PROT_EXECUTE) == 0) 1284 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1285 1286 /* 1287 * If this entry is already RO, don't diddle with the page 1288 * table. 1289 */ 1290 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 1291 PMAP_PVO_CHECK(pvo); 1292 continue; 1293 } 1294 1295 /* 1296 * Grab the PTE before we diddle the bits so pvo_to_pte can 1297 * verify the pte contents are as expected. 1298 */ 1299 pt = pmap_pvo_to_pte(pvo, -1); 1300 pvo->pvo_pte.pte_lo &= ~PTE_PP; 1301 pvo->pvo_pte.pte_lo |= PTE_BR; 1302 if (pt != NULL) 1303 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1304 PMAP_PVO_CHECK(pvo); /* sanity check */ 1305 } 1306 } 1307 1308 /* 1309 * Returns true if the pmap's pv is one of the first 1310 * 16 pvs linked to from this page. This count may 1311 * be changed upwards or downwards in the future; it 1312 * is only necessary that true be returned for a small 1313 * subset of pmaps for proper page aging. 1314 */ 1315 boolean_t 1316 pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 1317 { 1318 TODO; 1319 return (0); 1320 } 1321 1322 static u_int pmap_vsidcontext; 1323 1324 void 1325 pmap_pinit(pmap_t pmap) 1326 { 1327 int i, mask; 1328 u_int entropy; 1329 1330 entropy = 0; 1331 __asm __volatile("mftb %0" : "=r"(entropy)); 1332 1333 /* 1334 * Allocate some segment registers for this pmap. 1335 */ 1336 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1337 u_int hash, n; 1338 1339 /* 1340 * Create a new value by mutiplying by a prime and adding in 1341 * entropy from the timebase register. This is to make the 1342 * VSID more random so that the PT hash function collides 1343 * less often. (Note that the prime casues gcc to do shifts 1344 * instead of a multiply.) 1345 */ 1346 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1347 hash = pmap_vsidcontext & (NPMAPS - 1); 1348 if (hash == 0) /* 0 is special, avoid it */ 1349 continue; 1350 n = hash >> 5; 1351 mask = 1 << (hash & (VSID_NBPW - 1)); 1352 hash = (pmap_vsidcontext & 0xfffff); 1353 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1354 /* anything free in this bucket? */ 1355 if (pmap_vsid_bitmap[n] == 0xffffffff) { 1356 entropy = (pmap_vsidcontext >> 20); 1357 continue; 1358 } 1359 i = ffs(~pmap_vsid_bitmap[i]) - 1; 1360 mask = 1 << i; 1361 hash &= 0xfffff & ~(VSID_NBPW - 1); 1362 hash |= i; 1363 } 1364 pmap_vsid_bitmap[n] |= mask; 1365 for (i = 0; i < 16; i++) 1366 pmap->pm_sr[i] = VSID_MAKE(i, hash); 1367 return; 1368 } 1369 1370 panic("pmap_pinit: out of segments"); 1371 } 1372 1373 /* 1374 * Initialize the pmap associated with process 0. 1375 */ 1376 void 1377 pmap_pinit0(pmap_t pm) 1378 { 1379 1380 pmap_pinit(pm); 1381 bzero(&pm->pm_stats, sizeof(pm->pm_stats)); 1382 } 1383 1384 void 1385 pmap_pinit2(pmap_t pmap) 1386 { 1387 /* XXX: Remove this stub when no longer called */ 1388 } 1389 1390 void 1391 pmap_prefault(pmap_t pm, vm_offset_t va, vm_map_entry_t entry) 1392 { 1393 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1394 ("pmap_prefault: non current pmap")); 1395 /* XXX */ 1396 } 1397 1398 /* 1399 * Set the physical protection on the specified range of this map as requested. 1400 */ 1401 void 1402 pmap_protect(pmap_t pm, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 1403 { 1404 struct pvo_entry *pvo; 1405 struct pte *pt; 1406 int pteidx; 1407 1408 CTR4(KTR_PMAP, "pmap_protect: pm=%p sva=%#x eva=%#x prot=%#x", pm, sva, 1409 eva, prot); 1410 1411 1412 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1413 ("pmap_protect: non current pmap")); 1414 1415 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 1416 pmap_remove(pm, sva, eva); 1417 return; 1418 } 1419 1420 for (; sva < eva; sva += PAGE_SIZE) { 1421 pvo = pmap_pvo_find_va(pm, sva, &pteidx); 1422 if (pvo == NULL) 1423 continue; 1424 1425 if ((prot & VM_PROT_EXECUTE) == 0) 1426 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1427 1428 /* 1429 * Grab the PTE pointer before we diddle with the cached PTE 1430 * copy. 1431 */ 1432 pt = pmap_pvo_to_pte(pvo, pteidx); 1433 /* 1434 * Change the protection of the page. 1435 */ 1436 pvo->pvo_pte.pte_lo &= ~PTE_PP; 1437 pvo->pvo_pte.pte_lo |= PTE_BR; 1438 1439 /* 1440 * If the PVO is in the page table, update that pte as well. 1441 */ 1442 if (pt != NULL) 1443 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1444 } 1445 } 1446 1447 vm_offset_t 1448 pmap_phys_address(int ppn) 1449 { 1450 TODO; 1451 return (0); 1452 } 1453 1454 /* 1455 * Map a list of wired pages into kernel virtual address space. This is 1456 * intended for temporary mappings which do not need page modification or 1457 * references recorded. Existing mappings in the region are overwritten. 1458 */ 1459 void 1460 pmap_qenter(vm_offset_t va, vm_page_t *m, int count) 1461 { 1462 int i; 1463 1464 for (i = 0; i < count; i++, va += PAGE_SIZE) 1465 pmap_kenter(va, VM_PAGE_TO_PHYS(m[i])); 1466 } 1467 1468 /* 1469 * Remove page mappings from kernel virtual address space. Intended for 1470 * temporary mappings entered by pmap_qenter. 1471 */ 1472 void 1473 pmap_qremove(vm_offset_t va, int count) 1474 { 1475 int i; 1476 1477 for (i = 0; i < count; i++, va += PAGE_SIZE) 1478 pmap_kremove(va); 1479 } 1480 1481 void 1482 pmap_release(pmap_t pmap) 1483 { 1484 int idx, mask; 1485 1486 /* 1487 * Free segment register's VSID 1488 */ 1489 if (pmap->pm_sr[0] == 0) 1490 panic("pmap_release"); 1491 1492 idx = VSID_TO_HASH(pmap->pm_sr[0]) & (NPMAPS-1); 1493 mask = 1 << (idx % VSID_NBPW); 1494 idx /= VSID_NBPW; 1495 pmap_vsid_bitmap[idx] &= ~mask; 1496 } 1497 1498 /* 1499 * Remove the given range of addresses from the specified map. 1500 */ 1501 void 1502 pmap_remove(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 1503 { 1504 struct pvo_entry *pvo; 1505 int pteidx; 1506 1507 for (; sva < eva; sva += PAGE_SIZE) { 1508 pvo = pmap_pvo_find_va(pm, sva, &pteidx); 1509 if (pvo != NULL) { 1510 pmap_pvo_remove(pvo, pteidx); 1511 } 1512 } 1513 } 1514 1515 /* 1516 * Remove all pages from specified address space, this aids process exit 1517 * speeds. This is much faster than pmap_remove in the case of running down 1518 * an entire address space. Only works for the current pmap. 1519 */ 1520 void 1521 pmap_remove_pages(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 1522 { 1523 1524 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1525 ("pmap_remove_pages: non current pmap")); 1526 pmap_remove(pm, sva, eva); 1527 } 1528 1529 #ifndef KSTACK_MAX_PAGES 1530 #define KSTACK_MAX_PAGES 32 1531 #endif 1532 1533 /* 1534 * Create the kernel stack and pcb for a new thread. 1535 * This routine directly affects the fork perf for a process and 1536 * create performance for a thread. 1537 */ 1538 void 1539 pmap_new_thread(struct thread *td, int pages) 1540 { 1541 vm_page_t ma[KSTACK_MAX_PAGES]; 1542 vm_object_t ksobj; 1543 vm_offset_t ks; 1544 vm_page_t m; 1545 u_int i; 1546 1547 /* Bounds check */ 1548 if (pages <= 1) 1549 pages = KSTACK_PAGES; 1550 else if (pages > KSTACK_MAX_PAGES) 1551 pages = KSTACK_MAX_PAGES; 1552 1553 /* 1554 * Allocate object for the kstack. 1555 */ 1556 ksobj = vm_object_allocate(OBJT_DEFAULT, pages); 1557 td->td_kstack_obj = ksobj; 1558 1559 /* 1560 * Get a kernel virtual address for the kstack for this thread. 1561 */ 1562 ks = kmem_alloc_nofault(kernel_map, 1563 (pages + KSTACK_GUARD_PAGES) * PAGE_SIZE); 1564 if (ks == 0) 1565 panic("pmap_new_thread: kstack allocation failed"); 1566 TLBIE(ks); 1567 ks += KSTACK_GUARD_PAGES * PAGE_SIZE; 1568 td->td_kstack = ks; 1569 1570 /* 1571 * Knowing the number of pages allocated is useful when you 1572 * want to deallocate them. 1573 */ 1574 td->td_kstack_pages = pages; 1575 1576 for (i = 0; i < pages; i++) { 1577 /* 1578 * Get a kernel stack page. 1579 */ 1580 m = vm_page_grab(ksobj, i, 1581 VM_ALLOC_NORMAL | VM_ALLOC_RETRY | VM_ALLOC_WIRED); 1582 ma[i] = m; 1583 1584 vm_page_wakeup(m); 1585 vm_page_flag_clear(m, PG_ZERO); 1586 m->valid = VM_PAGE_BITS_ALL; 1587 } 1588 1589 /* 1590 * Enter the page into the kernel address space 1591 */ 1592 pmap_qenter(ks, ma, pages); 1593 } 1594 1595 void 1596 pmap_dispose_thread(struct thread *td) 1597 { 1598 vm_object_t ksobj; 1599 vm_offset_t ks; 1600 vm_page_t m; 1601 int i; 1602 int pages; 1603 1604 pages = td->td_kstack_pages; 1605 ksobj = td->td_kstack_obj; 1606 ks = td->td_kstack; 1607 for (i = 0; i < pages ; i++) { 1608 m = vm_page_lookup(ksobj, i); 1609 if (m == NULL) 1610 panic("pmap_dispose_thread: kstack already missing?"); 1611 vm_page_lock_queues(); 1612 vm_page_busy(m); 1613 vm_page_unwire(m, 0); 1614 vm_page_free(m); 1615 vm_page_unlock_queues(); 1616 } 1617 pmap_qremove(ks, pages); 1618 kmem_free(kernel_map, ks - (KSTACK_GUARD_PAGES * PAGE_SIZE), 1619 (pages + KSTACK_GUARD_PAGES) * PAGE_SIZE); 1620 vm_object_deallocate(ksobj); 1621 } 1622 1623 void 1624 pmap_new_altkstack(struct thread *td, int pages) 1625 { 1626 /* shuffle the original stack */ 1627 td->td_altkstack_obj = td->td_kstack_obj; 1628 td->td_altkstack = td->td_kstack; 1629 td->td_altkstack_pages = td->td_kstack_pages; 1630 1631 pmap_new_thread(td, pages); 1632 } 1633 1634 void 1635 pmap_dispose_altkstack(struct thread *td) 1636 { 1637 pmap_dispose_thread(td); 1638 1639 /* restore the original kstack */ 1640 td->td_kstack = td->td_altkstack; 1641 td->td_kstack_obj = td->td_altkstack_obj; 1642 td->td_kstack_pages = td->td_altkstack_pages; 1643 td->td_altkstack = 0; 1644 td->td_altkstack_obj = NULL; 1645 td->td_altkstack_pages = 0; 1646 } 1647 1648 void 1649 pmap_swapin_thread(struct thread *td) 1650 { 1651 vm_page_t ma[KSTACK_MAX_PAGES]; 1652 vm_object_t ksobj; 1653 vm_offset_t ks; 1654 vm_page_t m; 1655 int rv; 1656 int i; 1657 int pages; 1658 1659 pages = td->td_kstack_pages; 1660 ksobj = td->td_kstack_obj; 1661 ks = td->td_kstack; 1662 for (i = 0; i < pages; i++) { 1663 m = vm_page_grab(ksobj, i, VM_ALLOC_NORMAL | VM_ALLOC_RETRY); 1664 if (m->valid != VM_PAGE_BITS_ALL) { 1665 rv = vm_pager_get_pages(ksobj, &m, 1, 0); 1666 if (rv != VM_PAGER_OK) 1667 panic("pmap_swapin_thread: cannot get kstack"); 1668 m = vm_page_lookup(ksobj, i); 1669 m->valid = VM_PAGE_BITS_ALL; 1670 } 1671 ma[i] = m; 1672 vm_page_lock_queues(); 1673 vm_page_wire(m); 1674 vm_page_wakeup(m); 1675 vm_page_unlock_queues(); 1676 } 1677 pmap_qenter(ks, ma, pages); 1678 } 1679 1680 1681 void 1682 pmap_swapout_thread(struct thread *td) 1683 { 1684 vm_object_t ksobj; 1685 vm_offset_t ks; 1686 vm_page_t m; 1687 int i; 1688 int pages; 1689 1690 pages = td->td_kstack_pages; 1691 ksobj = td->td_kstack_obj; 1692 ks = (vm_offset_t)td->td_kstack; 1693 for (i = 0; i < pages; i++) { 1694 m = vm_page_lookup(ksobj, i); 1695 if (m == NULL) 1696 panic("pmap_swapout_thread: kstack already missing?"); 1697 vm_page_lock_queues(); 1698 vm_page_dirty(m); 1699 vm_page_unwire(m, 0); 1700 vm_page_unlock_queues(); 1701 } 1702 pmap_qremove(ks, pages); 1703 } 1704 1705 /* 1706 * Allocate a physical page of memory directly from the phys_avail map. 1707 * Can only be called from pmap_bootstrap before avail start and end are 1708 * calculated. 1709 */ 1710 static vm_offset_t 1711 pmap_bootstrap_alloc(vm_size_t size, u_int align) 1712 { 1713 vm_offset_t s, e; 1714 int i, j; 1715 1716 size = round_page(size); 1717 for (i = 0; phys_avail[i + 1] != 0; i += 2) { 1718 if (align != 0) 1719 s = (phys_avail[i] + align - 1) & ~(align - 1); 1720 else 1721 s = phys_avail[i]; 1722 e = s + size; 1723 1724 if (s < phys_avail[i] || e > phys_avail[i + 1]) 1725 continue; 1726 1727 if (s == phys_avail[i]) { 1728 phys_avail[i] += size; 1729 } else if (e == phys_avail[i + 1]) { 1730 phys_avail[i + 1] -= size; 1731 } else { 1732 for (j = phys_avail_count * 2; j > i; j -= 2) { 1733 phys_avail[j] = phys_avail[j - 2]; 1734 phys_avail[j + 1] = phys_avail[j - 1]; 1735 } 1736 1737 phys_avail[i + 3] = phys_avail[i + 1]; 1738 phys_avail[i + 1] = s; 1739 phys_avail[i + 2] = e; 1740 phys_avail_count++; 1741 } 1742 1743 return (s); 1744 } 1745 panic("pmap_bootstrap_alloc: could not allocate memory"); 1746 } 1747 1748 /* 1749 * Return an unmapped pvo for a kernel virtual address. 1750 * Used by pmap functions that operate on physical pages. 1751 */ 1752 static struct pvo_entry * 1753 pmap_rkva_alloc(void) 1754 { 1755 struct pvo_entry *pvo; 1756 struct pte *pt; 1757 vm_offset_t kva; 1758 int pteidx; 1759 1760 if (pmap_rkva_count == 0) 1761 panic("pmap_rkva_alloc: no more reserved KVAs"); 1762 1763 kva = pmap_rkva_start + (PAGE_SIZE * --pmap_rkva_count); 1764 pmap_kenter(kva, 0); 1765 1766 pvo = pmap_pvo_find_va(kernel_pmap, kva, &pteidx); 1767 1768 if (pvo == NULL) 1769 panic("pmap_kva_alloc: pmap_pvo_find_va failed"); 1770 1771 pt = pmap_pvo_to_pte(pvo, pteidx); 1772 1773 if (pt == NULL) 1774 panic("pmap_kva_alloc: pmap_pvo_to_pte failed"); 1775 1776 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1777 PVO_PTEGIDX_CLR(pvo); 1778 1779 pmap_pte_overflow++; 1780 1781 return (pvo); 1782 } 1783 1784 static void 1785 pmap_pa_map(struct pvo_entry *pvo, vm_offset_t pa, struct pte *saved_pt, 1786 int *depth_p) 1787 { 1788 struct pte *pt; 1789 1790 /* 1791 * If this pvo already has a valid pte, we need to save it so it can 1792 * be restored later. We then just reload the new PTE over the old 1793 * slot. 1794 */ 1795 if (saved_pt != NULL) { 1796 pt = pmap_pvo_to_pte(pvo, -1); 1797 1798 if (pt != NULL) { 1799 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1800 PVO_PTEGIDX_CLR(pvo); 1801 pmap_pte_overflow++; 1802 } 1803 1804 *saved_pt = pvo->pvo_pte; 1805 1806 pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 1807 } 1808 1809 pvo->pvo_pte.pte_lo |= pa; 1810 1811 if (!pmap_pte_spill(pvo->pvo_vaddr)) 1812 panic("pmap_pa_map: could not spill pvo %p", pvo); 1813 1814 if (depth_p != NULL) 1815 (*depth_p)++; 1816 } 1817 1818 static void 1819 pmap_pa_unmap(struct pvo_entry *pvo, struct pte *saved_pt, int *depth_p) 1820 { 1821 struct pte *pt; 1822 1823 pt = pmap_pvo_to_pte(pvo, -1); 1824 1825 if (pt != NULL) { 1826 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1827 PVO_PTEGIDX_CLR(pvo); 1828 pmap_pte_overflow++; 1829 } 1830 1831 pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 1832 1833 /* 1834 * If there is a saved PTE and it's valid, restore it and return. 1835 */ 1836 if (saved_pt != NULL && (saved_pt->pte_lo & PTE_RPGN) != 0) { 1837 if (depth_p != NULL && --(*depth_p) == 0) 1838 panic("pmap_pa_unmap: restoring but depth == 0"); 1839 1840 pvo->pvo_pte = *saved_pt; 1841 1842 if (!pmap_pte_spill(pvo->pvo_vaddr)) 1843 panic("pmap_pa_unmap: could not spill pvo %p", pvo); 1844 } 1845 } 1846 1847 static void 1848 pmap_syncicache(vm_offset_t pa, vm_size_t len) 1849 { 1850 __syncicache((void *)pa, len); 1851 } 1852 1853 static void 1854 tlbia(void) 1855 { 1856 caddr_t i; 1857 1858 SYNC(); 1859 for (i = 0; i < (caddr_t)0x00040000; i += 0x00001000) { 1860 TLBIE(i); 1861 EIEIO(); 1862 } 1863 TLBSYNC(); 1864 SYNC(); 1865 } 1866 1867 static int 1868 pmap_pvo_enter(pmap_t pm, uma_zone_t zone, struct pvo_head *pvo_head, 1869 vm_offset_t va, vm_offset_t pa, u_int pte_lo, int flags) 1870 { 1871 struct pvo_entry *pvo; 1872 u_int sr; 1873 int first; 1874 u_int ptegidx; 1875 int i; 1876 int bootstrap; 1877 1878 pmap_pvo_enter_calls++; 1879 first = 0; 1880 1881 bootstrap = 0; 1882 1883 /* 1884 * Compute the PTE Group index. 1885 */ 1886 va &= ~ADDR_POFF; 1887 sr = va_to_sr(pm->pm_sr, va); 1888 ptegidx = va_to_pteg(sr, va); 1889 1890 /* 1891 * Remove any existing mapping for this page. Reuse the pvo entry if 1892 * there is a mapping. 1893 */ 1894 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1895 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1896 if ((pvo->pvo_pte.pte_lo & PTE_RPGN) == pa && 1897 (pvo->pvo_pte.pte_lo & PTE_PP) == 1898 (pte_lo & PTE_PP)) { 1899 return (0); 1900 } 1901 pmap_pvo_remove(pvo, -1); 1902 break; 1903 } 1904 } 1905 1906 /* 1907 * If we aren't overwriting a mapping, try to allocate. 1908 */ 1909 if (pmap_initialized) { 1910 pvo = uma_zalloc(zone, M_NOWAIT); 1911 } else { 1912 if (pmap_bpvo_pool_index >= BPVO_POOL_SIZE) { 1913 panic("pmap_enter: bpvo pool exhausted, %d, %d, %d", 1914 pmap_bpvo_pool_index, BPVO_POOL_SIZE, 1915 BPVO_POOL_SIZE * sizeof(struct pvo_entry)); 1916 } 1917 pvo = &pmap_bpvo_pool[pmap_bpvo_pool_index]; 1918 pmap_bpvo_pool_index++; 1919 bootstrap = 1; 1920 } 1921 1922 if (pvo == NULL) { 1923 return (ENOMEM); 1924 } 1925 1926 pmap_pvo_entries++; 1927 pvo->pvo_vaddr = va; 1928 pvo->pvo_pmap = pm; 1929 LIST_INSERT_HEAD(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1930 pvo->pvo_vaddr &= ~ADDR_POFF; 1931 if (flags & VM_PROT_EXECUTE) 1932 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1933 if (flags & PVO_WIRED) 1934 pvo->pvo_vaddr |= PVO_WIRED; 1935 if (pvo_head != &pmap_pvo_kunmanaged) 1936 pvo->pvo_vaddr |= PVO_MANAGED; 1937 if (bootstrap) 1938 pvo->pvo_vaddr |= PVO_BOOTSTRAP; 1939 pmap_pte_create(&pvo->pvo_pte, sr, va, pa | pte_lo); 1940 1941 /* 1942 * Remember if the list was empty and therefore will be the first 1943 * item. 1944 */ 1945 if (LIST_FIRST(pvo_head) == NULL) 1946 first = 1; 1947 1948 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1949 if (pvo->pvo_pte.pte_lo & PVO_WIRED) 1950 pvo->pvo_pmap->pm_stats.wired_count++; 1951 pvo->pvo_pmap->pm_stats.resident_count++; 1952 1953 /* 1954 * We hope this succeeds but it isn't required. 1955 */ 1956 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1957 if (i >= 0) { 1958 PVO_PTEGIDX_SET(pvo, i); 1959 } else { 1960 panic("pmap_pvo_enter: overflow"); 1961 pmap_pte_overflow++; 1962 } 1963 1964 return (first ? ENOENT : 0); 1965 } 1966 1967 static void 1968 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx) 1969 { 1970 struct pte *pt; 1971 1972 /* 1973 * If there is an active pte entry, we need to deactivate it (and 1974 * save the ref & cfg bits). 1975 */ 1976 pt = pmap_pvo_to_pte(pvo, pteidx); 1977 if (pt != NULL) { 1978 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1979 PVO_PTEGIDX_CLR(pvo); 1980 } else { 1981 pmap_pte_overflow--; 1982 } 1983 1984 /* 1985 * Update our statistics. 1986 */ 1987 pvo->pvo_pmap->pm_stats.resident_count--; 1988 if (pvo->pvo_pte.pte_lo & PVO_WIRED) 1989 pvo->pvo_pmap->pm_stats.wired_count--; 1990 1991 /* 1992 * Save the REF/CHG bits into their cache if the page is managed. 1993 */ 1994 if (pvo->pvo_vaddr & PVO_MANAGED) { 1995 struct vm_page *pg; 1996 1997 pg = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte_lo & PTE_RPGN); 1998 if (pg != NULL) { 1999 pmap_attr_save(pg, pvo->pvo_pte.pte_lo & 2000 (PTE_REF | PTE_CHG)); 2001 } 2002 } 2003 2004 /* 2005 * Remove this PVO from the PV list. 2006 */ 2007 LIST_REMOVE(pvo, pvo_vlink); 2008 2009 /* 2010 * Remove this from the overflow list and return it to the pool 2011 * if we aren't going to reuse it. 2012 */ 2013 LIST_REMOVE(pvo, pvo_olink); 2014 if (!(pvo->pvo_vaddr & PVO_BOOTSTRAP)) 2015 uma_zfree(pvo->pvo_vaddr & PVO_MANAGED ? pmap_mpvo_zone : 2016 pmap_upvo_zone, pvo); 2017 pmap_pvo_entries--; 2018 pmap_pvo_remove_calls++; 2019 } 2020 2021 static __inline int 2022 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 2023 { 2024 int pteidx; 2025 2026 /* 2027 * We can find the actual pte entry without searching by grabbing 2028 * the PTEG index from 3 unused bits in pte_lo[11:9] and by 2029 * noticing the HID bit. 2030 */ 2031 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 2032 if (pvo->pvo_pte.pte_hi & PTE_HID) 2033 pteidx ^= pmap_pteg_mask * 8; 2034 2035 return (pteidx); 2036 } 2037 2038 static struct pvo_entry * 2039 pmap_pvo_find_va(pmap_t pm, vm_offset_t va, int *pteidx_p) 2040 { 2041 struct pvo_entry *pvo; 2042 int ptegidx; 2043 u_int sr; 2044 2045 va &= ~ADDR_POFF; 2046 sr = va_to_sr(pm->pm_sr, va); 2047 ptegidx = va_to_pteg(sr, va); 2048 2049 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2050 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 2051 if (pteidx_p) 2052 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 2053 return (pvo); 2054 } 2055 } 2056 2057 return (NULL); 2058 } 2059 2060 static struct pte * 2061 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 2062 { 2063 struct pte *pt; 2064 2065 /* 2066 * If we haven't been supplied the ptegidx, calculate it. 2067 */ 2068 if (pteidx == -1) { 2069 int ptegidx; 2070 u_int sr; 2071 2072 sr = va_to_sr(pvo->pvo_pmap->pm_sr, pvo->pvo_vaddr); 2073 ptegidx = va_to_pteg(sr, pvo->pvo_vaddr); 2074 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 2075 } 2076 2077 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 2078 2079 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 2080 panic("pmap_pvo_to_pte: pvo %p has valid pte in pvo but no " 2081 "valid pte index", pvo); 2082 } 2083 2084 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 2085 panic("pmap_pvo_to_pte: pvo %p has valid pte index in pvo " 2086 "pvo but no valid pte", pvo); 2087 } 2088 2089 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 2090 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 2091 panic("pmap_pvo_to_pte: pvo %p has valid pte in " 2092 "pmap_pteg_table %p but invalid in pvo", pvo, pt); 2093 } 2094 2095 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) 2096 != 0) { 2097 panic("pmap_pvo_to_pte: pvo %p pte does not match " 2098 "pte %p in pmap_pteg_table", pvo, pt); 2099 } 2100 2101 return (pt); 2102 } 2103 2104 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 2105 panic("pmap_pvo_to_pte: pvo %p has invalid pte %p in " 2106 "pmap_pteg_table but valid in pvo", pvo, pt); 2107 } 2108 2109 return (NULL); 2110 } 2111 2112 static void * 2113 pmap_pvo_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 2114 { 2115 vm_page_t m; 2116 2117 if (bytes != PAGE_SIZE) 2118 panic("pmap_pvo_allocf: benno was shortsighted. hit him."); 2119 2120 *flags = UMA_SLAB_PRIV; 2121 m = vm_page_alloc(pmap_pvo_obj, pmap_pvo_count, VM_ALLOC_SYSTEM); 2122 if (m == NULL) 2123 return (NULL); 2124 pmap_pvo_count++; 2125 return ((void *)VM_PAGE_TO_PHYS(m)); 2126 } 2127 2128 /* 2129 * XXX: THIS STUFF SHOULD BE IN pte.c? 2130 */ 2131 int 2132 pmap_pte_spill(vm_offset_t addr) 2133 { 2134 struct pvo_entry *source_pvo, *victim_pvo; 2135 struct pvo_entry *pvo; 2136 int ptegidx, i, j; 2137 u_int sr; 2138 struct pteg *pteg; 2139 struct pte *pt; 2140 2141 pmap_pte_spills++; 2142 2143 sr = mfsrin(addr); 2144 ptegidx = va_to_pteg(sr, addr); 2145 2146 /* 2147 * Have to substitute some entry. Use the primary hash for this. 2148 * Use low bits of timebase as random generator. 2149 */ 2150 pteg = &pmap_pteg_table[ptegidx]; 2151 __asm __volatile("mftb %0" : "=r"(i)); 2152 i &= 7; 2153 pt = &pteg->pt[i]; 2154 2155 source_pvo = NULL; 2156 victim_pvo = NULL; 2157 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2158 /* 2159 * We need to find a pvo entry for this address. 2160 */ 2161 PMAP_PVO_CHECK(pvo); 2162 if (source_pvo == NULL && 2163 pmap_pte_match(&pvo->pvo_pte, sr, addr, 2164 pvo->pvo_pte.pte_hi & PTE_HID)) { 2165 /* 2166 * Now found an entry to be spilled into the pteg. 2167 * The PTE is now valid, so we know it's active. 2168 */ 2169 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 2170 2171 if (j >= 0) { 2172 PVO_PTEGIDX_SET(pvo, j); 2173 pmap_pte_overflow--; 2174 PMAP_PVO_CHECK(pvo); 2175 return (1); 2176 } 2177 2178 source_pvo = pvo; 2179 2180 if (victim_pvo != NULL) 2181 break; 2182 } 2183 2184 /* 2185 * We also need the pvo entry of the victim we are replacing 2186 * so save the R & C bits of the PTE. 2187 */ 2188 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 2189 pmap_pte_compare(pt, &pvo->pvo_pte)) { 2190 victim_pvo = pvo; 2191 if (source_pvo != NULL) 2192 break; 2193 } 2194 } 2195 2196 if (source_pvo == NULL) 2197 return (0); 2198 2199 if (victim_pvo == NULL) { 2200 if ((pt->pte_hi & PTE_HID) == 0) 2201 panic("pmap_pte_spill: victim p-pte (%p) has no pvo" 2202 "entry", pt); 2203 2204 /* 2205 * If this is a secondary PTE, we need to search it's primary 2206 * pvo bucket for the matching PVO. 2207 */ 2208 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx ^ pmap_pteg_mask], 2209 pvo_olink) { 2210 PMAP_PVO_CHECK(pvo); 2211 /* 2212 * We also need the pvo entry of the victim we are 2213 * replacing so save the R & C bits of the PTE. 2214 */ 2215 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 2216 victim_pvo = pvo; 2217 break; 2218 } 2219 } 2220 2221 if (victim_pvo == NULL) 2222 panic("pmap_pte_spill: victim s-pte (%p) has no pvo" 2223 "entry", pt); 2224 } 2225 2226 /* 2227 * We are invalidating the TLB entry for the EA we are replacing even 2228 * though it's valid. If we don't, we lose any ref/chg bit changes 2229 * contained in the TLB entry. 2230 */ 2231 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 2232 2233 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 2234 pmap_pte_set(pt, &source_pvo->pvo_pte); 2235 2236 PVO_PTEGIDX_CLR(victim_pvo); 2237 PVO_PTEGIDX_SET(source_pvo, i); 2238 pmap_pte_replacements++; 2239 2240 PMAP_PVO_CHECK(victim_pvo); 2241 PMAP_PVO_CHECK(source_pvo); 2242 2243 return (1); 2244 } 2245 2246 static int 2247 pmap_pte_insert(u_int ptegidx, struct pte *pvo_pt) 2248 { 2249 struct pte *pt; 2250 int i; 2251 2252 /* 2253 * First try primary hash. 2254 */ 2255 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 2256 if ((pt->pte_hi & PTE_VALID) == 0) { 2257 pvo_pt->pte_hi &= ~PTE_HID; 2258 pmap_pte_set(pt, pvo_pt); 2259 return (i); 2260 } 2261 } 2262 2263 /* 2264 * Now try secondary hash. 2265 */ 2266 ptegidx ^= pmap_pteg_mask; 2267 ptegidx++; 2268 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 2269 if ((pt->pte_hi & PTE_VALID) == 0) { 2270 pvo_pt->pte_hi |= PTE_HID; 2271 pmap_pte_set(pt, pvo_pt); 2272 return (i); 2273 } 2274 } 2275 2276 panic("pmap_pte_insert: overflow"); 2277 return (-1); 2278 } 2279 2280 static boolean_t 2281 pmap_query_bit(vm_page_t m, int ptebit) 2282 { 2283 struct pvo_entry *pvo; 2284 struct pte *pt; 2285 2286 if (pmap_attr_fetch(m) & ptebit) 2287 return (TRUE); 2288 2289 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2290 PMAP_PVO_CHECK(pvo); /* sanity check */ 2291 2292 /* 2293 * See if we saved the bit off. If so, cache it and return 2294 * success. 2295 */ 2296 if (pvo->pvo_pte.pte_lo & ptebit) { 2297 pmap_attr_save(m, ptebit); 2298 PMAP_PVO_CHECK(pvo); /* sanity check */ 2299 return (TRUE); 2300 } 2301 } 2302 2303 /* 2304 * No luck, now go through the hard part of looking at the PTEs 2305 * themselves. Sync so that any pending REF/CHG bits are flushed to 2306 * the PTEs. 2307 */ 2308 SYNC(); 2309 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2310 PMAP_PVO_CHECK(pvo); /* sanity check */ 2311 2312 /* 2313 * See if this pvo has a valid PTE. if so, fetch the 2314 * REF/CHG bits from the valid PTE. If the appropriate 2315 * ptebit is set, cache it and return success. 2316 */ 2317 pt = pmap_pvo_to_pte(pvo, -1); 2318 if (pt != NULL) { 2319 pmap_pte_synch(pt, &pvo->pvo_pte); 2320 if (pvo->pvo_pte.pte_lo & ptebit) { 2321 pmap_attr_save(m, ptebit); 2322 PMAP_PVO_CHECK(pvo); /* sanity check */ 2323 return (TRUE); 2324 } 2325 } 2326 } 2327 2328 return (TRUE); 2329 } 2330 2331 static boolean_t 2332 pmap_clear_bit(vm_page_t m, int ptebit) 2333 { 2334 struct pvo_entry *pvo; 2335 struct pte *pt; 2336 int rv; 2337 2338 /* 2339 * Clear the cached value. 2340 */ 2341 rv = pmap_attr_fetch(m); 2342 pmap_attr_clear(m, ptebit); 2343 2344 /* 2345 * Sync so that any pending REF/CHG bits are flushed to the PTEs (so 2346 * we can reset the right ones). note that since the pvo entries and 2347 * list heads are accessed via BAT0 and are never placed in the page 2348 * table, we don't have to worry about further accesses setting the 2349 * REF/CHG bits. 2350 */ 2351 SYNC(); 2352 2353 /* 2354 * For each pvo entry, clear the pvo's ptebit. If this pvo has a 2355 * valid pte clear the ptebit from the valid pte. 2356 */ 2357 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2358 PMAP_PVO_CHECK(pvo); /* sanity check */ 2359 pt = pmap_pvo_to_pte(pvo, -1); 2360 if (pt != NULL) { 2361 pmap_pte_synch(pt, &pvo->pvo_pte); 2362 if (pvo->pvo_pte.pte_lo & ptebit) 2363 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2364 } 2365 rv |= pvo->pvo_pte.pte_lo; 2366 pvo->pvo_pte.pte_lo &= ~ptebit; 2367 PMAP_PVO_CHECK(pvo); /* sanity check */ 2368 } 2369 2370 return ((rv & ptebit) != 0); 2371 } 2372 2373 /* 2374 * Return true if the physical range is encompassed by the battable[idx] 2375 */ 2376 static int 2377 pmap_bat_mapped(int idx, vm_offset_t pa, vm_size_t size) 2378 { 2379 u_int prot; 2380 u_int32_t start; 2381 u_int32_t end; 2382 u_int32_t bat_ble; 2383 2384 /* 2385 * Return immediately if not a valid mapping 2386 */ 2387 if (!battable[idx].batu & BAT_Vs) 2388 return (EINVAL); 2389 2390 /* 2391 * The BAT entry must be cache-inhibited, guarded, and r/w 2392 * so it can function as an i/o page 2393 */ 2394 prot = battable[idx].batl & (BAT_I|BAT_G|BAT_PP_RW); 2395 if (prot != (BAT_I|BAT_G|BAT_PP_RW)) 2396 return (EPERM); 2397 2398 /* 2399 * The address should be within the BAT range. Assume that the 2400 * start address in the BAT has the correct alignment (thus 2401 * not requiring masking) 2402 */ 2403 start = battable[idx].batl & BAT_PBS; 2404 bat_ble = (battable[idx].batu & ~(BAT_EBS)) | 0x03; 2405 end = start | (bat_ble << 15) | 0x7fff; 2406 2407 if ((pa < start) || ((pa + size) > end)) 2408 return (ERANGE); 2409 2410 return (0); 2411 } 2412 2413 2414 /* 2415 * Map a set of physical memory pages into the kernel virtual 2416 * address space. Return a pointer to where it is mapped. This 2417 * routine is intended to be used for mapping device memory, 2418 * NOT real memory. 2419 */ 2420 void * 2421 pmap_mapdev(vm_offset_t pa, vm_size_t size) 2422 { 2423 vm_offset_t va, tmpva, ppa, offset; 2424 int i; 2425 2426 ppa = trunc_page(pa); 2427 offset = pa & PAGE_MASK; 2428 size = roundup(offset + size, PAGE_SIZE); 2429 2430 GIANT_REQUIRED; 2431 2432 /* 2433 * If the physical address lies within a valid BAT table entry, 2434 * return the 1:1 mapping. This currently doesn't work 2435 * for regions that overlap 256M BAT segments. 2436 */ 2437 for (i = 0; i < 16; i++) { 2438 if (pmap_bat_mapped(i, pa, size) == 0) 2439 return ((void *) pa); 2440 } 2441 2442 va = kmem_alloc_pageable(kernel_map, size); 2443 if (!va) 2444 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 2445 2446 for (tmpva = va; size > 0;) { 2447 pmap_kenter(tmpva, ppa); 2448 TLBIE(tmpva); /* XXX or should it be invalidate-all ? */ 2449 size -= PAGE_SIZE; 2450 tmpva += PAGE_SIZE; 2451 ppa += PAGE_SIZE; 2452 } 2453 2454 return ((void *)(va + offset)); 2455 } 2456 2457 void 2458 pmap_unmapdev(vm_offset_t va, vm_size_t size) 2459 { 2460 vm_offset_t base, offset; 2461 2462 /* 2463 * If this is outside kernel virtual space, then it's a 2464 * battable entry and doesn't require unmapping 2465 */ 2466 if ((va >= VM_MIN_KERNEL_ADDRESS) && (va <= VM_MAX_KERNEL_ADDRESS)) { 2467 base = trunc_page(va); 2468 offset = va & PAGE_MASK; 2469 size = roundup(offset + size, PAGE_SIZE); 2470 kmem_free(kernel_map, base, size); 2471 } 2472 } 2473