1 /* 2 * Copyright (c) 2001 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Matt Thomas <matt@3am-software.com> of Allegro Networks, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the NetBSD 19 * Foundation, Inc. and its contributors. 20 * 4. Neither the name of The NetBSD Foundation nor the names of its 21 * contributors may be used to endorse or promote products derived 22 * from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 /* 37 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 38 * Copyright (C) 1995, 1996 TooLs GmbH. 39 * All rights reserved. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed by TooLs GmbH. 52 * 4. The name of TooLs GmbH may not be used to endorse or promote products 53 * derived from this software without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 56 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 57 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 58 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 60 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 61 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 62 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 63 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 64 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 65 * 66 * $NetBSD: pmap.c,v 1.28 2000/03/26 20:42:36 kleink Exp $ 67 */ 68 /* 69 * Copyright (C) 2001 Benno Rice. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 81 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 82 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 83 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 84 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 85 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 86 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 87 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 88 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 89 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 90 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 91 */ 92 93 #ifndef lint 94 static const char rcsid[] = 95 "$FreeBSD$"; 96 #endif /* not lint */ 97 98 /* 99 * Manages physical address maps. 100 * 101 * In addition to hardware address maps, this module is called upon to 102 * provide software-use-only maps which may or may not be stored in the 103 * same form as hardware maps. These pseudo-maps are used to store 104 * intermediate results from copy operations to and from address spaces. 105 * 106 * Since the information managed by this module is also stored by the 107 * logical address mapping module, this module may throw away valid virtual 108 * to physical mappings at almost any time. However, invalidations of 109 * mappings must be done as requested. 110 * 111 * In order to cope with hardware architectures which make virtual to 112 * physical map invalidates expensive, this module may delay invalidate 113 * reduced protection operations until such time as they are actually 114 * necessary. This module is given full information as to which processors 115 * are currently using which maps, and to when physical maps must be made 116 * correct. 117 */ 118 119 #include <sys/param.h> 120 #include <sys/kernel.h> 121 #include <sys/ktr.h> 122 #include <sys/lock.h> 123 #include <sys/msgbuf.h> 124 #include <sys/mutex.h> 125 #include <sys/proc.h> 126 #include <sys/sysctl.h> 127 #include <sys/systm.h> 128 #include <sys/vmmeter.h> 129 130 #include <dev/ofw/openfirm.h> 131 132 #include <vm/vm.h> 133 #include <vm/vm_param.h> 134 #include <vm/vm_kern.h> 135 #include <vm/vm_page.h> 136 #include <vm/vm_map.h> 137 #include <vm/vm_object.h> 138 #include <vm/vm_extern.h> 139 #include <vm/vm_pageout.h> 140 #include <vm/vm_pager.h> 141 #include <vm/uma.h> 142 143 #include <machine/powerpc.h> 144 #include <machine/bat.h> 145 #include <machine/frame.h> 146 #include <machine/md_var.h> 147 #include <machine/psl.h> 148 #include <machine/pte.h> 149 #include <machine/sr.h> 150 151 #define PMAP_DEBUG 152 153 #define TODO panic("%s: not implemented", __func__); 154 155 #define PMAP_LOCK(pm) 156 #define PMAP_UNLOCK(pm) 157 158 #define TLBIE(va) __asm __volatile("tlbie %0" :: "r"(va)) 159 #define TLBSYNC() __asm __volatile("tlbsync"); 160 #define SYNC() __asm __volatile("sync"); 161 #define EIEIO() __asm __volatile("eieio"); 162 163 #define VSID_MAKE(sr, hash) ((sr) | (((hash) & 0xfffff) << 4)) 164 #define VSID_TO_SR(vsid) ((vsid) & 0xf) 165 #define VSID_TO_HASH(vsid) (((vsid) >> 4) & 0xfffff) 166 167 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 168 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 169 #define PVO_WIRED 0x0010 /* PVO entry is wired */ 170 #define PVO_MANAGED 0x0020 /* PVO entry is managed */ 171 #define PVO_EXECUTABLE 0x0040 /* PVO entry is executable */ 172 #define PVO_BOOTSTRAP 0x0080 /* PVO entry allocated during 173 bootstrap */ 174 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 175 #define PVO_ISEXECUTABLE(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 176 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 177 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 178 #define PVO_PTEGIDX_CLR(pvo) \ 179 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 180 #define PVO_PTEGIDX_SET(pvo, i) \ 181 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 182 183 #define PMAP_PVO_CHECK(pvo) 184 185 struct ofw_map { 186 vm_offset_t om_va; 187 vm_size_t om_len; 188 vm_offset_t om_pa; 189 u_int om_mode; 190 }; 191 192 int pmap_bootstrapped = 0; 193 194 /* 195 * Virtual and physical address of message buffer. 196 */ 197 struct msgbuf *msgbufp; 198 vm_offset_t msgbuf_phys; 199 200 /* 201 * Physical addresses of first and last available physical page. 202 */ 203 vm_offset_t avail_start; 204 vm_offset_t avail_end; 205 206 /* 207 * Map of physical memory regions. 208 */ 209 vm_offset_t phys_avail[128]; 210 u_int phys_avail_count; 211 static struct mem_region *regions; 212 static struct mem_region *pregions; 213 int regions_sz, pregions_sz; 214 static struct ofw_map translations[128]; 215 static int translations_size; 216 217 /* 218 * First and last available kernel virtual addresses. 219 */ 220 vm_offset_t virtual_avail; 221 vm_offset_t virtual_end; 222 vm_offset_t kernel_vm_end; 223 224 /* 225 * Kernel pmap. 226 */ 227 struct pmap kernel_pmap_store; 228 extern struct pmap ofw_pmap; 229 230 /* 231 * PTEG data. 232 */ 233 static struct pteg *pmap_pteg_table; 234 u_int pmap_pteg_count; 235 u_int pmap_pteg_mask; 236 237 /* 238 * PVO data. 239 */ 240 struct pvo_head *pmap_pvo_table; /* pvo entries by pteg index */ 241 struct pvo_head pmap_pvo_kunmanaged = 242 LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 243 struct pvo_head pmap_pvo_unmanaged = 244 LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 245 246 uma_zone_t pmap_upvo_zone; /* zone for pvo entries for unmanaged pages */ 247 uma_zone_t pmap_mpvo_zone; /* zone for pvo entries for managed pages */ 248 struct vm_object pmap_upvo_zone_obj; 249 struct vm_object pmap_mpvo_zone_obj; 250 static vm_object_t pmap_pvo_obj; 251 static u_int pmap_pvo_count; 252 253 #define PMAP_PVO_SIZE 1024 254 static struct pvo_entry *pmap_bpvo_pool; 255 static int pmap_bpvo_pool_index; 256 static int pmap_bpvo_pool_count; 257 258 #define VSID_NBPW (sizeof(u_int32_t) * 8) 259 static u_int pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 260 261 static boolean_t pmap_initialized = FALSE; 262 263 /* 264 * Statistics. 265 */ 266 u_int pmap_pte_valid = 0; 267 u_int pmap_pte_overflow = 0; 268 u_int pmap_pte_replacements = 0; 269 u_int pmap_pvo_entries = 0; 270 u_int pmap_pvo_enter_calls = 0; 271 u_int pmap_pvo_remove_calls = 0; 272 u_int pmap_pte_spills = 0; 273 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_valid, CTLFLAG_RD, &pmap_pte_valid, 274 0, ""); 275 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_overflow, CTLFLAG_RD, 276 &pmap_pte_overflow, 0, ""); 277 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_replacements, CTLFLAG_RD, 278 &pmap_pte_replacements, 0, ""); 279 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_entries, CTLFLAG_RD, &pmap_pvo_entries, 280 0, ""); 281 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_enter_calls, CTLFLAG_RD, 282 &pmap_pvo_enter_calls, 0, ""); 283 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_remove_calls, CTLFLAG_RD, 284 &pmap_pvo_remove_calls, 0, ""); 285 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_spills, CTLFLAG_RD, 286 &pmap_pte_spills, 0, ""); 287 288 struct pvo_entry *pmap_pvo_zeropage; 289 290 vm_offset_t pmap_rkva_start = VM_MIN_KERNEL_ADDRESS; 291 u_int pmap_rkva_count = 4; 292 293 /* 294 * Allocate physical memory for use in pmap_bootstrap. 295 */ 296 static vm_offset_t pmap_bootstrap_alloc(vm_size_t, u_int); 297 298 /* 299 * PTE calls. 300 */ 301 static int pmap_pte_insert(u_int, struct pte *); 302 303 /* 304 * PVO calls. 305 */ 306 static int pmap_pvo_enter(pmap_t, uma_zone_t, struct pvo_head *, 307 vm_offset_t, vm_offset_t, u_int, int); 308 static void pmap_pvo_remove(struct pvo_entry *, int); 309 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vm_offset_t, int *); 310 static struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 311 312 /* 313 * Utility routines. 314 */ 315 static void * pmap_pvo_allocf(uma_zone_t, int, u_int8_t *, int); 316 static struct pvo_entry *pmap_rkva_alloc(void); 317 static void pmap_pa_map(struct pvo_entry *, vm_offset_t, 318 struct pte *, int *); 319 static void pmap_pa_unmap(struct pvo_entry *, struct pte *, int *); 320 static void pmap_syncicache(vm_offset_t, vm_size_t); 321 static boolean_t pmap_query_bit(vm_page_t, int); 322 static boolean_t pmap_clear_bit(vm_page_t, int); 323 static void tlbia(void); 324 325 static __inline int 326 va_to_sr(u_int *sr, vm_offset_t va) 327 { 328 return (sr[(uintptr_t)va >> ADDR_SR_SHFT]); 329 } 330 331 static __inline u_int 332 va_to_pteg(u_int sr, vm_offset_t addr) 333 { 334 u_int hash; 335 336 hash = (sr & SR_VSID_MASK) ^ (((u_int)addr & ADDR_PIDX) >> 337 ADDR_PIDX_SHFT); 338 return (hash & pmap_pteg_mask); 339 } 340 341 static __inline struct pvo_head * 342 pa_to_pvoh(vm_offset_t pa, vm_page_t *pg_p) 343 { 344 struct vm_page *pg; 345 346 pg = PHYS_TO_VM_PAGE(pa); 347 348 if (pg_p != NULL) 349 *pg_p = pg; 350 351 if (pg == NULL) 352 return (&pmap_pvo_unmanaged); 353 354 return (&pg->md.mdpg_pvoh); 355 } 356 357 static __inline struct pvo_head * 358 vm_page_to_pvoh(vm_page_t m) 359 { 360 361 return (&m->md.mdpg_pvoh); 362 } 363 364 static __inline void 365 pmap_attr_clear(vm_page_t m, int ptebit) 366 { 367 368 m->md.mdpg_attrs &= ~ptebit; 369 } 370 371 static __inline int 372 pmap_attr_fetch(vm_page_t m) 373 { 374 375 return (m->md.mdpg_attrs); 376 } 377 378 static __inline void 379 pmap_attr_save(vm_page_t m, int ptebit) 380 { 381 382 m->md.mdpg_attrs |= ptebit; 383 } 384 385 static __inline int 386 pmap_pte_compare(const struct pte *pt, const struct pte *pvo_pt) 387 { 388 if (pt->pte_hi == pvo_pt->pte_hi) 389 return (1); 390 391 return (0); 392 } 393 394 static __inline int 395 pmap_pte_match(struct pte *pt, u_int sr, vm_offset_t va, int which) 396 { 397 return (pt->pte_hi & ~PTE_VALID) == 398 (((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 399 ((va >> ADDR_API_SHFT) & PTE_API) | which); 400 } 401 402 static __inline void 403 pmap_pte_create(struct pte *pt, u_int sr, vm_offset_t va, u_int pte_lo) 404 { 405 /* 406 * Construct a PTE. Default to IMB initially. Valid bit only gets 407 * set when the real pte is set in memory. 408 * 409 * Note: Don't set the valid bit for correct operation of tlb update. 410 */ 411 pt->pte_hi = ((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 412 (((va & ADDR_PIDX) >> ADDR_API_SHFT) & PTE_API); 413 pt->pte_lo = pte_lo; 414 } 415 416 static __inline void 417 pmap_pte_synch(struct pte *pt, struct pte *pvo_pt) 418 { 419 420 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF | PTE_CHG); 421 } 422 423 static __inline void 424 pmap_pte_clear(struct pte *pt, vm_offset_t va, int ptebit) 425 { 426 427 /* 428 * As shown in Section 7.6.3.2.3 429 */ 430 pt->pte_lo &= ~ptebit; 431 TLBIE(va); 432 EIEIO(); 433 TLBSYNC(); 434 SYNC(); 435 } 436 437 static __inline void 438 pmap_pte_set(struct pte *pt, struct pte *pvo_pt) 439 { 440 441 pvo_pt->pte_hi |= PTE_VALID; 442 443 /* 444 * Update the PTE as defined in section 7.6.3.1. 445 * Note that the REF/CHG bits are from pvo_pt and thus should havce 446 * been saved so this routine can restore them (if desired). 447 */ 448 pt->pte_lo = pvo_pt->pte_lo; 449 EIEIO(); 450 pt->pte_hi = pvo_pt->pte_hi; 451 SYNC(); 452 pmap_pte_valid++; 453 } 454 455 static __inline void 456 pmap_pte_unset(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 457 { 458 459 pvo_pt->pte_hi &= ~PTE_VALID; 460 461 /* 462 * Force the reg & chg bits back into the PTEs. 463 */ 464 SYNC(); 465 466 /* 467 * Invalidate the pte. 468 */ 469 pt->pte_hi &= ~PTE_VALID; 470 471 SYNC(); 472 TLBIE(va); 473 EIEIO(); 474 TLBSYNC(); 475 SYNC(); 476 477 /* 478 * Save the reg & chg bits. 479 */ 480 pmap_pte_synch(pt, pvo_pt); 481 pmap_pte_valid--; 482 } 483 484 static __inline void 485 pmap_pte_change(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 486 { 487 488 /* 489 * Invalidate the PTE 490 */ 491 pmap_pte_unset(pt, pvo_pt, va); 492 pmap_pte_set(pt, pvo_pt); 493 } 494 495 /* 496 * Quick sort callout for comparing memory regions. 497 */ 498 static int mr_cmp(const void *a, const void *b); 499 static int om_cmp(const void *a, const void *b); 500 501 static int 502 mr_cmp(const void *a, const void *b) 503 { 504 const struct mem_region *regiona; 505 const struct mem_region *regionb; 506 507 regiona = a; 508 regionb = b; 509 if (regiona->mr_start < regionb->mr_start) 510 return (-1); 511 else if (regiona->mr_start > regionb->mr_start) 512 return (1); 513 else 514 return (0); 515 } 516 517 static int 518 om_cmp(const void *a, const void *b) 519 { 520 const struct ofw_map *mapa; 521 const struct ofw_map *mapb; 522 523 mapa = a; 524 mapb = b; 525 if (mapa->om_pa < mapb->om_pa) 526 return (-1); 527 else if (mapa->om_pa > mapb->om_pa) 528 return (1); 529 else 530 return (0); 531 } 532 533 void 534 pmap_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) 535 { 536 ihandle_t mmui; 537 phandle_t chosen, mmu; 538 int sz; 539 int i, j; 540 vm_size_t size, physsz; 541 vm_offset_t pa, va, off; 542 u_int batl, batu; 543 544 /* 545 * Use an IBAT and a DBAT to map the bottom segment of memory 546 * where we are. 547 */ 548 batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 549 batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 550 __asm ("mtibatu 0,%0; mtibatl 0,%1; mtdbatu 0,%0; mtdbatl 0,%1" 551 :: "r"(batu), "r"(batl)); 552 #if 0 553 batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 554 batl = BATL(0x80000000, BAT_M, BAT_PP_RW); 555 __asm ("mtibatu 1,%0; mtibatl 1,%1; mtdbatu 1,%0; mtdbatl 1,%1" 556 :: "r"(batu), "r"(batl)); 557 #endif 558 559 /* 560 * Set the start and end of kva. 561 */ 562 virtual_avail = VM_MIN_KERNEL_ADDRESS; 563 virtual_end = VM_MAX_KERNEL_ADDRESS; 564 565 mem_regions(&pregions, &pregions_sz, ®ions, ®ions_sz); 566 CTR0(KTR_PMAP, "pmap_bootstrap: physical memory"); 567 568 qsort(pregions, pregions_sz, sizeof(*pregions), mr_cmp); 569 for (i = 0; i < pregions_sz; i++) { 570 CTR3(KTR_PMAP, "physregion: %#x - %#x (%#x)", 571 pregions[i].mr_start, 572 pregions[i].mr_start + pregions[i].mr_size, 573 pregions[i].mr_size); 574 } 575 576 if (sizeof(phys_avail)/sizeof(phys_avail[0]) < regions_sz) 577 panic("pmap_bootstrap: phys_avail too small"); 578 qsort(regions, regions_sz, sizeof(*regions), mr_cmp); 579 phys_avail_count = 0; 580 physsz = 0; 581 for (i = 0, j = 0; i < regions_sz; i++, j += 2) { 582 CTR3(KTR_PMAP, "region: %#x - %#x (%#x)", regions[i].mr_start, 583 regions[i].mr_start + regions[i].mr_size, 584 regions[i].mr_size); 585 phys_avail[j] = regions[i].mr_start; 586 phys_avail[j + 1] = regions[i].mr_start + regions[i].mr_size; 587 phys_avail_count++; 588 physsz += regions[i].mr_size; 589 } 590 physmem = btoc(physsz); 591 592 /* 593 * Allocate PTEG table. 594 */ 595 #ifdef PTEGCOUNT 596 pmap_pteg_count = PTEGCOUNT; 597 #else 598 pmap_pteg_count = 0x1000; 599 600 while (pmap_pteg_count < physmem) 601 pmap_pteg_count <<= 1; 602 603 pmap_pteg_count >>= 1; 604 #endif /* PTEGCOUNT */ 605 606 size = pmap_pteg_count * sizeof(struct pteg); 607 CTR2(KTR_PMAP, "pmap_bootstrap: %d PTEGs, %d bytes", pmap_pteg_count, 608 size); 609 pmap_pteg_table = (struct pteg *)pmap_bootstrap_alloc(size, size); 610 CTR1(KTR_PMAP, "pmap_bootstrap: PTEG table at %p", pmap_pteg_table); 611 bzero((void *)pmap_pteg_table, pmap_pteg_count * sizeof(struct pteg)); 612 pmap_pteg_mask = pmap_pteg_count - 1; 613 614 /* 615 * Allocate pv/overflow lists. 616 */ 617 size = sizeof(struct pvo_head) * pmap_pteg_count; 618 pmap_pvo_table = (struct pvo_head *)pmap_bootstrap_alloc(size, 619 PAGE_SIZE); 620 CTR1(KTR_PMAP, "pmap_bootstrap: PVO table at %p", pmap_pvo_table); 621 for (i = 0; i < pmap_pteg_count; i++) 622 LIST_INIT(&pmap_pvo_table[i]); 623 624 /* 625 * Allocate the message buffer. 626 */ 627 msgbuf_phys = pmap_bootstrap_alloc(MSGBUF_SIZE, 0); 628 629 /* 630 * Initialise the unmanaged pvo pool. 631 */ 632 pmap_bpvo_pool = (struct pvo_entry *)pmap_bootstrap_alloc(PAGE_SIZE, 0); 633 pmap_bpvo_pool_index = 0; 634 pmap_bpvo_pool_count = (int)PAGE_SIZE / sizeof(struct pvo_entry); 635 636 /* 637 * Make sure kernel vsid is allocated as well as VSID 0. 638 */ 639 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS - 1)) / VSID_NBPW] 640 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 641 pmap_vsid_bitmap[0] |= 1; 642 643 /* 644 * Set up the OpenFirmware pmap and add it's mappings. 645 */ 646 pmap_pinit(&ofw_pmap); 647 ofw_pmap.pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 648 if ((chosen = OF_finddevice("/chosen")) == -1) 649 panic("pmap_bootstrap: can't find /chosen"); 650 OF_getprop(chosen, "mmu", &mmui, 4); 651 if ((mmu = OF_instance_to_package(mmui)) == -1) 652 panic("pmap_bootstrap: can't get mmu package"); 653 if ((sz = OF_getproplen(mmu, "translations")) == -1) 654 panic("pmap_bootstrap: can't get ofw translation count"); 655 if (sizeof(translations) < sz) 656 panic("pmap_bootstrap: translations too small"); 657 bzero(translations, sz); 658 if (OF_getprop(mmu, "translations", translations, sz) == -1) 659 panic("pmap_bootstrap: can't get ofw translations"); 660 CTR0(KTR_PMAP, "pmap_bootstrap: translations"); 661 sz /= sizeof(*translations); 662 qsort(translations, sz, sizeof (*translations), om_cmp); 663 for (i = 0; i < sz; i++) { 664 CTR3(KTR_PMAP, "translation: pa=%#x va=%#x len=%#x", 665 translations[i].om_pa, translations[i].om_va, 666 translations[i].om_len); 667 668 /* Drop stuff below something? */ 669 670 /* Enter the pages? */ 671 for (off = 0; off < translations[i].om_len; off += PAGE_SIZE) { 672 struct vm_page m; 673 674 m.phys_addr = translations[i].om_pa + off; 675 pmap_enter(&ofw_pmap, translations[i].om_va + off, &m, 676 VM_PROT_ALL, 1); 677 } 678 } 679 #ifdef SMP 680 TLBSYNC(); 681 #endif 682 683 /* 684 * Initialize the kernel pmap (which is statically allocated). 685 */ 686 for (i = 0; i < 16; i++) { 687 kernel_pmap->pm_sr[i] = EMPTY_SEGMENT; 688 } 689 kernel_pmap->pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 690 kernel_pmap->pm_active = ~0; 691 692 /* 693 * Allocate a kernel stack with a guard page for thread0 and map it 694 * into the kernel page map. 695 */ 696 pa = pmap_bootstrap_alloc(KSTACK_PAGES * PAGE_SIZE, 0); 697 kstack0_phys = pa; 698 kstack0 = virtual_avail + (KSTACK_GUARD_PAGES * PAGE_SIZE); 699 CTR2(KTR_PMAP, "pmap_bootstrap: kstack0 at %#x (%#x)", kstack0_phys, 700 kstack0); 701 virtual_avail += (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE; 702 for (i = 0; i < KSTACK_PAGES; i++) { 703 pa = kstack0_phys + i * PAGE_SIZE; 704 va = kstack0 + i * PAGE_SIZE; 705 pmap_kenter(va, pa); 706 TLBIE(va); 707 } 708 709 /* 710 * Calculate the first and last available physical addresses. 711 */ 712 avail_start = phys_avail[0]; 713 for (i = 0; phys_avail[i + 2] != 0; i += 2) 714 ; 715 avail_end = phys_avail[i + 1]; 716 Maxmem = powerpc_btop(avail_end); 717 718 /* 719 * Allocate virtual address space for the message buffer. 720 */ 721 msgbufp = (struct msgbuf *)virtual_avail; 722 virtual_avail += round_page(MSGBUF_SIZE); 723 724 /* 725 * Initialize hardware. 726 */ 727 for (i = 0; i < 16; i++) { 728 mtsrin(i << ADDR_SR_SHFT, EMPTY_SEGMENT); 729 } 730 __asm __volatile ("mtsr %0,%1" 731 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 732 __asm __volatile ("sync; mtsdr1 %0; isync" 733 :: "r"((u_int)pmap_pteg_table | (pmap_pteg_mask >> 10))); 734 tlbia(); 735 736 pmap_bootstrapped++; 737 } 738 739 /* 740 * Activate a user pmap. The pmap must be activated before it's address 741 * space can be accessed in any way. 742 */ 743 void 744 pmap_activate(struct thread *td) 745 { 746 pmap_t pm, pmr; 747 748 /* 749 * Load all the data we need up front to encourasge the compiler to 750 * not issue any loads while we have interrupts disabled below. 751 */ 752 pm = &td->td_proc->p_vmspace->vm_pmap; 753 754 KASSERT(pm->pm_active == 0, ("pmap_activate: pmap already active?")); 755 756 if ((pmr = (pmap_t)pmap_kextract((vm_offset_t)pm)) == NULL) 757 pmr = pm; 758 759 pm->pm_active |= PCPU_GET(cpumask); 760 PCPU_SET(curpmap, pmr); 761 } 762 763 void 764 pmap_deactivate(struct thread *td) 765 { 766 pmap_t pm; 767 768 pm = &td->td_proc->p_vmspace->vm_pmap; 769 pm->pm_active &= ~(PCPU_GET(cpumask)); 770 PCPU_SET(curpmap, NULL); 771 } 772 773 vm_offset_t 774 pmap_addr_hint(vm_object_t object, vm_offset_t va, vm_size_t size) 775 { 776 777 return (va); 778 } 779 780 void 781 pmap_change_wiring(pmap_t pm, vm_offset_t va, boolean_t wired) 782 { 783 struct pvo_entry *pvo; 784 785 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 786 787 if (pvo != NULL) { 788 if (wired) { 789 if ((pvo->pvo_vaddr & PVO_WIRED) == 0) 790 pm->pm_stats.wired_count++; 791 pvo->pvo_vaddr |= PVO_WIRED; 792 } else { 793 if ((pvo->pvo_vaddr & PVO_WIRED) != 0) 794 pm->pm_stats.wired_count--; 795 pvo->pvo_vaddr &= ~PVO_WIRED; 796 } 797 } 798 } 799 800 void 801 pmap_clear_modify(vm_page_t m) 802 { 803 804 if (m->flags * PG_FICTITIOUS) 805 return; 806 pmap_clear_bit(m, PTE_CHG); 807 } 808 809 void 810 pmap_collect(void) 811 { 812 TODO; 813 } 814 815 void 816 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, 817 vm_size_t len, vm_offset_t src_addr) 818 { 819 820 /* 821 * This is not needed as it's mainly an optimisation. 822 * It may want to be implemented later though. 823 */ 824 } 825 826 void 827 pmap_copy_page(vm_page_t msrc, vm_page_t mdst) 828 { 829 vm_offset_t dst; 830 vm_offset_t src; 831 832 dst = VM_PAGE_TO_PHYS(mdst); 833 src = VM_PAGE_TO_PHYS(msrc); 834 835 kcopy((void *)src, (void *)dst, PAGE_SIZE); 836 } 837 838 /* 839 * Zero a page of physical memory by temporarily mapping it into the tlb. 840 */ 841 void 842 pmap_zero_page(vm_page_t m) 843 { 844 vm_offset_t pa = VM_PAGE_TO_PHYS(m); 845 caddr_t va; 846 int i; 847 848 if (pa < SEGMENT_LENGTH) { 849 va = (caddr_t) pa; 850 } else if (pmap_initialized) { 851 if (pmap_pvo_zeropage == NULL) 852 pmap_pvo_zeropage = pmap_rkva_alloc(); 853 pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 854 va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 855 } else { 856 panic("pmap_zero_page: can't zero pa %#x", pa); 857 } 858 859 bzero(va, PAGE_SIZE); 860 861 for (i = PAGE_SIZE / CACHELINESIZE; i > 0; i--) { 862 __asm __volatile("dcbz 0,%0" :: "r"(va)); 863 va += CACHELINESIZE; 864 } 865 866 if (pa >= SEGMENT_LENGTH) 867 pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 868 } 869 870 void 871 pmap_zero_page_area(vm_page_t m, int off, int size) 872 { 873 TODO; 874 } 875 876 /* 877 * Map the given physical page at the specified virtual address in the 878 * target pmap with the protection requested. If specified the page 879 * will be wired down. 880 */ 881 void 882 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 883 boolean_t wired) 884 { 885 struct pvo_head *pvo_head; 886 uma_zone_t zone; 887 vm_page_t pg; 888 u_int pte_lo, pvo_flags, was_exec, i; 889 int error; 890 891 if (!pmap_initialized) { 892 pvo_head = &pmap_pvo_kunmanaged; 893 zone = pmap_upvo_zone; 894 pvo_flags = 0; 895 pg = NULL; 896 was_exec = PTE_EXEC; 897 } else { 898 pvo_head = pa_to_pvoh(VM_PAGE_TO_PHYS(m), &pg); 899 zone = pmap_mpvo_zone; 900 pvo_flags = PVO_MANAGED; 901 was_exec = 0; 902 } 903 904 /* 905 * If this is a managed page, and it's the first reference to the page, 906 * clear the execness of the page. Otherwise fetch the execness. 907 */ 908 if (pg != NULL) { 909 if (LIST_EMPTY(pvo_head)) { 910 pmap_attr_clear(pg, PTE_EXEC); 911 } else { 912 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 913 } 914 } 915 916 917 /* 918 * Assume the page is cache inhibited and access is guarded unless 919 * it's in our available memory array. 920 */ 921 pte_lo = PTE_I | PTE_G; 922 for (i = 0; i < pregions_sz; i++) { 923 if ((VM_PAGE_TO_PHYS(m) >= pregions[i].mr_start) && 924 (VM_PAGE_TO_PHYS(m) < 925 (pregions[i].mr_start + pregions[i].mr_size))) { 926 pte_lo &= ~(PTE_I | PTE_G); 927 break; 928 } 929 } 930 931 if (prot & VM_PROT_WRITE) 932 pte_lo |= PTE_BW; 933 else 934 pte_lo |= PTE_BR; 935 936 pvo_flags |= (prot & VM_PROT_EXECUTE); 937 938 if (wired) 939 pvo_flags |= PVO_WIRED; 940 941 error = pmap_pvo_enter(pmap, zone, pvo_head, va, VM_PAGE_TO_PHYS(m), 942 pte_lo, pvo_flags); 943 944 /* 945 * Flush the real page from the instruction cache if this page is 946 * mapped executable and cacheable and was not previously mapped (or 947 * was not mapped executable). 948 */ 949 if (error == 0 && (pvo_flags & PVO_EXECUTABLE) && 950 (pte_lo & PTE_I) == 0 && was_exec == 0) { 951 /* 952 * Flush the real memory from the cache. 953 */ 954 pmap_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE); 955 if (pg != NULL) 956 pmap_attr_save(pg, PTE_EXEC); 957 } 958 } 959 960 vm_offset_t 961 pmap_extract(pmap_t pm, vm_offset_t va) 962 { 963 struct pvo_entry *pvo; 964 965 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 966 967 if (pvo != NULL) { 968 return ((pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF)); 969 } 970 971 return (0); 972 } 973 974 /* 975 * Grow the number of kernel page table entries. Unneeded. 976 */ 977 void 978 pmap_growkernel(vm_offset_t addr) 979 { 980 } 981 982 void 983 pmap_init(vm_offset_t phys_start, vm_offset_t phys_end) 984 { 985 986 CTR0(KTR_PMAP, "pmap_init"); 987 } 988 989 void 990 pmap_init2(void) 991 { 992 993 CTR0(KTR_PMAP, "pmap_init2"); 994 995 pmap_pvo_obj = vm_object_allocate(OBJT_PHYS, 16); 996 pmap_pvo_count = 0; 997 pmap_upvo_zone = uma_zcreate("UPVO entry", sizeof (struct pvo_entry), 998 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, 0); 999 uma_zone_set_allocf(pmap_upvo_zone, pmap_pvo_allocf); 1000 pmap_mpvo_zone = uma_zcreate("MPVO entry", sizeof(struct pvo_entry), 1001 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, 0); 1002 uma_zone_set_allocf(pmap_mpvo_zone, pmap_pvo_allocf); 1003 pmap_initialized = TRUE; 1004 } 1005 1006 boolean_t 1007 pmap_is_modified(vm_page_t m) 1008 { 1009 1010 if (m->flags & PG_FICTITIOUS) 1011 return (FALSE); 1012 1013 return (pmap_query_bit(m, PTE_CHG)); 1014 } 1015 1016 void 1017 pmap_clear_reference(vm_page_t m) 1018 { 1019 TODO; 1020 } 1021 1022 /* 1023 * pmap_ts_referenced: 1024 * 1025 * Return a count of reference bits for a page, clearing those bits. 1026 * It is not necessary for every reference bit to be cleared, but it 1027 * is necessary that 0 only be returned when there are truly no 1028 * reference bits set. 1029 * 1030 * XXX: The exact number of bits to check and clear is a matter that 1031 * should be tested and standardized at some point in the future for 1032 * optimal aging of shared pages. 1033 */ 1034 1035 int 1036 pmap_ts_referenced(vm_page_t m) 1037 { 1038 TODO; 1039 return (0); 1040 } 1041 1042 /* 1043 * Map a wired page into kernel virtual address space. 1044 */ 1045 void 1046 pmap_kenter(vm_offset_t va, vm_offset_t pa) 1047 { 1048 u_int pte_lo; 1049 int error; 1050 int i; 1051 1052 #if 0 1053 if (va < VM_MIN_KERNEL_ADDRESS) 1054 panic("pmap_kenter: attempt to enter non-kernel address %#x", 1055 va); 1056 #endif 1057 1058 pte_lo = PTE_I | PTE_G | PTE_BW; 1059 for (i = 0; phys_avail[i + 2] != 0; i += 2) { 1060 if (pa >= phys_avail[i] && pa < phys_avail[i + 1]) { 1061 pte_lo &= ~(PTE_I | PTE_G); 1062 break; 1063 } 1064 } 1065 1066 error = pmap_pvo_enter(kernel_pmap, pmap_upvo_zone, 1067 &pmap_pvo_kunmanaged, va, pa, pte_lo, PVO_WIRED); 1068 1069 if (error != 0 && error != ENOENT) 1070 panic("pmap_kenter: failed to enter va %#x pa %#x: %d", va, 1071 pa, error); 1072 1073 /* 1074 * Flush the real memory from the instruction cache. 1075 */ 1076 if ((pte_lo & (PTE_I | PTE_G)) == 0) { 1077 pmap_syncicache(pa, PAGE_SIZE); 1078 } 1079 } 1080 1081 /* 1082 * Extract the physical page address associated with the given kernel virtual 1083 * address. 1084 */ 1085 vm_offset_t 1086 pmap_kextract(vm_offset_t va) 1087 { 1088 struct pvo_entry *pvo; 1089 1090 pvo = pmap_pvo_find_va(kernel_pmap, va & ~ADDR_POFF, NULL); 1091 if (pvo == NULL) { 1092 return (0); 1093 } 1094 1095 return ((pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF)); 1096 } 1097 1098 /* 1099 * Remove a wired page from kernel virtual address space. 1100 */ 1101 void 1102 pmap_kremove(vm_offset_t va) 1103 { 1104 1105 pmap_remove(kernel_pmap, va, roundup(va, PAGE_SIZE)); 1106 } 1107 1108 /* 1109 * Map a range of physical addresses into kernel virtual address space. 1110 * 1111 * The value passed in *virt is a suggested virtual address for the mapping. 1112 * Architectures which can support a direct-mapped physical to virtual region 1113 * can return the appropriate address within that region, leaving '*virt' 1114 * unchanged. We cannot and therefore do not; *virt is updated with the 1115 * first usable address after the mapped region. 1116 */ 1117 vm_offset_t 1118 pmap_map(vm_offset_t *virt, vm_offset_t pa_start, vm_offset_t pa_end, int prot) 1119 { 1120 vm_offset_t sva, va; 1121 1122 sva = *virt; 1123 va = sva; 1124 for (; pa_start < pa_end; pa_start += PAGE_SIZE, va += PAGE_SIZE) 1125 pmap_kenter(va, pa_start); 1126 *virt = va; 1127 return (sva); 1128 } 1129 1130 int 1131 pmap_mincore(pmap_t pmap, vm_offset_t addr) 1132 { 1133 TODO; 1134 return (0); 1135 } 1136 1137 /* 1138 * Create the uarea for a new process. 1139 * This routine directly affects the fork perf for a process. 1140 */ 1141 void 1142 pmap_new_proc(struct proc *p) 1143 { 1144 vm_object_t upobj; 1145 vm_offset_t up; 1146 vm_page_t m; 1147 u_int i; 1148 1149 /* 1150 * Allocate the object for the upages. 1151 */ 1152 upobj = p->p_upages_obj; 1153 if (upobj == NULL) { 1154 upobj = vm_object_allocate(OBJT_DEFAULT, UAREA_PAGES); 1155 p->p_upages_obj = upobj; 1156 } 1157 1158 /* 1159 * Get a kernel virtual address for the uarea for this process. 1160 */ 1161 up = (vm_offset_t)p->p_uarea; 1162 if (up == 0) { 1163 up = kmem_alloc_nofault(kernel_map, UAREA_PAGES * PAGE_SIZE); 1164 if (up == 0) 1165 panic("pmap_new_proc: upage allocation failed"); 1166 p->p_uarea = (struct user *)up; 1167 } 1168 1169 for (i = 0; i < UAREA_PAGES; i++) { 1170 /* 1171 * Get a uarea page. 1172 */ 1173 m = vm_page_grab(upobj, i, VM_ALLOC_NORMAL | VM_ALLOC_RETRY); 1174 1175 /* 1176 * Wire the page. 1177 */ 1178 m->wire_count++; 1179 1180 /* 1181 * Enter the page into the kernel address space. 1182 */ 1183 pmap_kenter(up + i * PAGE_SIZE, VM_PAGE_TO_PHYS(m)); 1184 1185 vm_page_wakeup(m); 1186 vm_page_flag_clear(m, PG_ZERO); 1187 vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE); 1188 m->valid = VM_PAGE_BITS_ALL; 1189 } 1190 } 1191 1192 void 1193 pmap_object_init_pt(pmap_t pm, vm_offset_t addr, vm_object_t object, 1194 vm_pindex_t pindex, vm_size_t size, int limit) 1195 { 1196 1197 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1198 ("pmap_remove_pages: non current pmap")); 1199 /* XXX */ 1200 } 1201 1202 /* 1203 * Lower the permission for all mappings to a given page. 1204 */ 1205 void 1206 pmap_page_protect(vm_page_t m, vm_prot_t prot) 1207 { 1208 struct pvo_head *pvo_head; 1209 struct pvo_entry *pvo, *next_pvo; 1210 struct pte *pt; 1211 1212 /* 1213 * Since the routine only downgrades protection, if the 1214 * maximal protection is desired, there isn't any change 1215 * to be made. 1216 */ 1217 if ((prot & (VM_PROT_READ|VM_PROT_WRITE)) == 1218 (VM_PROT_READ|VM_PROT_WRITE)) 1219 return; 1220 1221 pvo_head = vm_page_to_pvoh(m); 1222 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 1223 next_pvo = LIST_NEXT(pvo, pvo_vlink); 1224 PMAP_PVO_CHECK(pvo); /* sanity check */ 1225 1226 /* 1227 * Downgrading to no mapping at all, we just remove the entry. 1228 */ 1229 if ((prot & VM_PROT_READ) == 0) { 1230 pmap_pvo_remove(pvo, -1); 1231 continue; 1232 } 1233 1234 /* 1235 * If EXEC permission is being revoked, just clear the flag 1236 * in the PVO. 1237 */ 1238 if ((prot & VM_PROT_EXECUTE) == 0) 1239 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1240 1241 /* 1242 * If this entry is already RO, don't diddle with the page 1243 * table. 1244 */ 1245 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 1246 PMAP_PVO_CHECK(pvo); 1247 continue; 1248 } 1249 1250 /* 1251 * Grab the PTE before we diddle the bits so pvo_to_pte can 1252 * verify the pte contents are as expected. 1253 */ 1254 pt = pmap_pvo_to_pte(pvo, -1); 1255 pvo->pvo_pte.pte_lo &= ~PTE_PP; 1256 pvo->pvo_pte.pte_lo |= PTE_BR; 1257 if (pt != NULL) 1258 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1259 PMAP_PVO_CHECK(pvo); /* sanity check */ 1260 } 1261 } 1262 1263 /* 1264 * Make the specified page pageable (or not). Unneeded. 1265 */ 1266 void 1267 pmap_pageable(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, 1268 boolean_t pageable) 1269 { 1270 } 1271 1272 /* 1273 * Returns true if the pmap's pv is one of the first 1274 * 16 pvs linked to from this page. This count may 1275 * be changed upwards or downwards in the future; it 1276 * is only necessary that true be returned for a small 1277 * subset of pmaps for proper page aging. 1278 */ 1279 boolean_t 1280 pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 1281 { 1282 TODO; 1283 return (0); 1284 } 1285 1286 static u_int pmap_vsidcontext; 1287 1288 void 1289 pmap_pinit(pmap_t pmap) 1290 { 1291 int i, mask; 1292 u_int entropy; 1293 1294 entropy = 0; 1295 __asm __volatile("mftb %0" : "=r"(entropy)); 1296 1297 /* 1298 * Allocate some segment registers for this pmap. 1299 */ 1300 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1301 u_int hash, n; 1302 1303 /* 1304 * Create a new value by mutiplying by a prime and adding in 1305 * entropy from the timebase register. This is to make the 1306 * VSID more random so that the PT hash function collides 1307 * less often. (Note that the prime casues gcc to do shifts 1308 * instead of a multiply.) 1309 */ 1310 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1311 hash = pmap_vsidcontext & (NPMAPS - 1); 1312 if (hash == 0) /* 0 is special, avoid it */ 1313 continue; 1314 n = hash >> 5; 1315 mask = 1 << (hash & (VSID_NBPW - 1)); 1316 hash = (pmap_vsidcontext & 0xfffff); 1317 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1318 /* anything free in this bucket? */ 1319 if (pmap_vsid_bitmap[n] == 0xffffffff) { 1320 entropy = (pmap_vsidcontext >> 20); 1321 continue; 1322 } 1323 i = ffs(~pmap_vsid_bitmap[i]) - 1; 1324 mask = 1 << i; 1325 hash &= 0xfffff & ~(VSID_NBPW - 1); 1326 hash |= i; 1327 } 1328 pmap_vsid_bitmap[n] |= mask; 1329 for (i = 0; i < 16; i++) 1330 pmap->pm_sr[i] = VSID_MAKE(i, hash); 1331 return; 1332 } 1333 1334 panic("pmap_pinit: out of segments"); 1335 } 1336 1337 /* 1338 * Initialize the pmap associated with process 0. 1339 */ 1340 void 1341 pmap_pinit0(pmap_t pm) 1342 { 1343 1344 pmap_pinit(pm); 1345 bzero(&pm->pm_stats, sizeof(pm->pm_stats)); 1346 } 1347 1348 void 1349 pmap_pinit2(pmap_t pmap) 1350 { 1351 /* XXX: Remove this stub when no longer called */ 1352 } 1353 1354 void 1355 pmap_prefault(pmap_t pm, vm_offset_t va, vm_map_entry_t entry) 1356 { 1357 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1358 ("pmap_prefault: non current pmap")); 1359 /* XXX */ 1360 } 1361 1362 /* 1363 * Set the physical protection on the specified range of this map as requested. 1364 */ 1365 void 1366 pmap_protect(pmap_t pm, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 1367 { 1368 struct pvo_entry *pvo; 1369 struct pte *pt; 1370 int pteidx; 1371 1372 CTR4(KTR_PMAP, "pmap_protect: pm=%p sva=%#x eva=%#x prot=%#x", pm, sva, 1373 eva, prot); 1374 1375 1376 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1377 ("pmap_protect: non current pmap")); 1378 1379 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 1380 pmap_remove(pm, sva, eva); 1381 return; 1382 } 1383 1384 for (; sva < eva; sva += PAGE_SIZE) { 1385 pvo = pmap_pvo_find_va(pm, sva, &pteidx); 1386 if (pvo == NULL) 1387 continue; 1388 1389 if ((prot & VM_PROT_EXECUTE) == 0) 1390 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1391 1392 /* 1393 * Grab the PTE pointer before we diddle with the cached PTE 1394 * copy. 1395 */ 1396 pt = pmap_pvo_to_pte(pvo, pteidx); 1397 /* 1398 * Change the protection of the page. 1399 */ 1400 pvo->pvo_pte.pte_lo &= ~PTE_PP; 1401 pvo->pvo_pte.pte_lo |= PTE_BR; 1402 1403 /* 1404 * If the PVO is in the page table, update that pte as well. 1405 */ 1406 if (pt != NULL) 1407 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1408 } 1409 } 1410 1411 vm_offset_t 1412 pmap_phys_address(int ppn) 1413 { 1414 TODO; 1415 return (0); 1416 } 1417 1418 /* 1419 * Map a list of wired pages into kernel virtual address space. This is 1420 * intended for temporary mappings which do not need page modification or 1421 * references recorded. Existing mappings in the region are overwritten. 1422 */ 1423 void 1424 pmap_qenter(vm_offset_t va, vm_page_t *m, int count) 1425 { 1426 int i; 1427 1428 for (i = 0; i < count; i++, va += PAGE_SIZE) 1429 pmap_kenter(va, VM_PAGE_TO_PHYS(m[i])); 1430 } 1431 1432 /* 1433 * Remove page mappings from kernel virtual address space. Intended for 1434 * temporary mappings entered by pmap_qenter. 1435 */ 1436 void 1437 pmap_qremove(vm_offset_t va, int count) 1438 { 1439 int i; 1440 1441 for (i = 0; i < count; i++, va += PAGE_SIZE) 1442 pmap_kremove(va); 1443 } 1444 1445 void 1446 pmap_release(pmap_t pmap) 1447 { 1448 TODO; 1449 } 1450 1451 /* 1452 * Remove the given range of addresses from the specified map. 1453 */ 1454 void 1455 pmap_remove(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 1456 { 1457 struct pvo_entry *pvo; 1458 int pteidx; 1459 1460 for (; sva < eva; sva += PAGE_SIZE) { 1461 pvo = pmap_pvo_find_va(pm, sva, &pteidx); 1462 if (pvo != NULL) { 1463 pmap_pvo_remove(pvo, pteidx); 1464 } 1465 } 1466 } 1467 1468 /* 1469 * Remove all pages from specified address space, this aids process exit 1470 * speeds. This is much faster than pmap_remove in the case of running down 1471 * an entire address space. Only works for the current pmap. 1472 */ 1473 void 1474 pmap_remove_pages(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 1475 { 1476 1477 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1478 ("pmap_remove_pages: non current pmap")); 1479 pmap_remove(pm, sva, eva); 1480 } 1481 1482 void 1483 pmap_swapin_proc(struct proc *p) 1484 { 1485 TODO; 1486 } 1487 1488 void 1489 pmap_swapout_proc(struct proc *p) 1490 { 1491 TODO; 1492 } 1493 1494 /* 1495 * Create the kernel stack and pcb for a new thread. 1496 * This routine directly affects the fork perf for a process and 1497 * create performance for a thread. 1498 */ 1499 void 1500 pmap_new_thread(struct thread *td) 1501 { 1502 vm_object_t ksobj; 1503 vm_offset_t ks; 1504 vm_page_t m; 1505 u_int i; 1506 1507 /* 1508 * Allocate object for the kstack. 1509 */ 1510 ksobj = td->td_kstack_obj; 1511 if (ksobj == NULL) { 1512 ksobj = vm_object_allocate(OBJT_DEFAULT, KSTACK_PAGES); 1513 td->td_kstack_obj = ksobj; 1514 } 1515 1516 /* 1517 * Get a kernel virtual address for the kstack for this thread. 1518 */ 1519 ks = td->td_kstack; 1520 if (ks == 0) { 1521 ks = kmem_alloc_nofault(kernel_map, 1522 (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE); 1523 if (ks == 0) 1524 panic("pmap_new_thread: kstack allocation failed"); 1525 TLBIE(ks); 1526 ks += KSTACK_GUARD_PAGES * PAGE_SIZE; 1527 td->td_kstack = ks; 1528 } 1529 1530 for (i = 0; i < KSTACK_PAGES; i++) { 1531 /* 1532 * Get a kernel stack page. 1533 */ 1534 m = vm_page_grab(ksobj, i, VM_ALLOC_NORMAL | VM_ALLOC_RETRY); 1535 1536 /* 1537 * Wire the page. 1538 */ 1539 m->wire_count++; 1540 1541 /* 1542 * Enter the page into the kernel address space. 1543 */ 1544 pmap_kenter(ks + i * PAGE_SIZE, VM_PAGE_TO_PHYS(m)); 1545 1546 vm_page_wakeup(m); 1547 vm_page_flag_clear(m, PG_ZERO); 1548 vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE); 1549 m->valid = VM_PAGE_BITS_ALL; 1550 } 1551 } 1552 1553 void 1554 pmap_dispose_proc(struct proc *p) 1555 { 1556 TODO; 1557 } 1558 1559 void 1560 pmap_dispose_thread(struct thread *td) 1561 { 1562 TODO; 1563 } 1564 1565 void 1566 pmap_swapin_thread(struct thread *td) 1567 { 1568 TODO; 1569 } 1570 1571 void 1572 pmap_swapout_thread(struct thread *td) 1573 { 1574 TODO; 1575 } 1576 1577 /* 1578 * Allocate a physical page of memory directly from the phys_avail map. 1579 * Can only be called from pmap_bootstrap before avail start and end are 1580 * calculated. 1581 */ 1582 static vm_offset_t 1583 pmap_bootstrap_alloc(vm_size_t size, u_int align) 1584 { 1585 vm_offset_t s, e; 1586 int i, j; 1587 1588 size = round_page(size); 1589 for (i = 0; phys_avail[i + 1] != 0; i += 2) { 1590 if (align != 0) 1591 s = (phys_avail[i] + align - 1) & ~(align - 1); 1592 else 1593 s = phys_avail[i]; 1594 e = s + size; 1595 1596 if (s < phys_avail[i] || e > phys_avail[i + 1]) 1597 continue; 1598 1599 if (s == phys_avail[i]) { 1600 phys_avail[i] += size; 1601 } else if (e == phys_avail[i + 1]) { 1602 phys_avail[i + 1] -= size; 1603 } else { 1604 for (j = phys_avail_count * 2; j > i; j -= 2) { 1605 phys_avail[j] = phys_avail[j - 2]; 1606 phys_avail[j + 1] = phys_avail[j - 1]; 1607 } 1608 1609 phys_avail[i + 3] = phys_avail[i + 1]; 1610 phys_avail[i + 1] = s; 1611 phys_avail[i + 2] = e; 1612 phys_avail_count++; 1613 } 1614 1615 return (s); 1616 } 1617 panic("pmap_bootstrap_alloc: could not allocate memory"); 1618 } 1619 1620 /* 1621 * Return an unmapped pvo for a kernel virtual address. 1622 * Used by pmap functions that operate on physical pages. 1623 */ 1624 static struct pvo_entry * 1625 pmap_rkva_alloc(void) 1626 { 1627 struct pvo_entry *pvo; 1628 struct pte *pt; 1629 vm_offset_t kva; 1630 int pteidx; 1631 1632 if (pmap_rkva_count == 0) 1633 panic("pmap_rkva_alloc: no more reserved KVAs"); 1634 1635 kva = pmap_rkva_start + (PAGE_SIZE * --pmap_rkva_count); 1636 pmap_kenter(kva, 0); 1637 1638 pvo = pmap_pvo_find_va(kernel_pmap, kva, &pteidx); 1639 1640 if (pvo == NULL) 1641 panic("pmap_kva_alloc: pmap_pvo_find_va failed"); 1642 1643 pt = pmap_pvo_to_pte(pvo, pteidx); 1644 1645 if (pt == NULL) 1646 panic("pmap_kva_alloc: pmap_pvo_to_pte failed"); 1647 1648 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1649 PVO_PTEGIDX_CLR(pvo); 1650 1651 pmap_pte_overflow++; 1652 1653 return (pvo); 1654 } 1655 1656 static void 1657 pmap_pa_map(struct pvo_entry *pvo, vm_offset_t pa, struct pte *saved_pt, 1658 int *depth_p) 1659 { 1660 struct pte *pt; 1661 1662 /* 1663 * If this pvo already has a valid pte, we need to save it so it can 1664 * be restored later. We then just reload the new PTE over the old 1665 * slot. 1666 */ 1667 if (saved_pt != NULL) { 1668 pt = pmap_pvo_to_pte(pvo, -1); 1669 1670 if (pt != NULL) { 1671 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1672 PVO_PTEGIDX_CLR(pvo); 1673 pmap_pte_overflow++; 1674 } 1675 1676 *saved_pt = pvo->pvo_pte; 1677 1678 pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 1679 } 1680 1681 pvo->pvo_pte.pte_lo |= pa; 1682 1683 if (!pmap_pte_spill(pvo->pvo_vaddr)) 1684 panic("pmap_pa_map: could not spill pvo %p", pvo); 1685 1686 if (depth_p != NULL) 1687 (*depth_p)++; 1688 } 1689 1690 static void 1691 pmap_pa_unmap(struct pvo_entry *pvo, struct pte *saved_pt, int *depth_p) 1692 { 1693 struct pte *pt; 1694 1695 pt = pmap_pvo_to_pte(pvo, -1); 1696 1697 if (pt != NULL) { 1698 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1699 PVO_PTEGIDX_CLR(pvo); 1700 pmap_pte_overflow++; 1701 } 1702 1703 pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 1704 1705 /* 1706 * If there is a saved PTE and it's valid, restore it and return. 1707 */ 1708 if (saved_pt != NULL && (saved_pt->pte_lo & PTE_RPGN) != 0) { 1709 if (depth_p != NULL && --(*depth_p) == 0) 1710 panic("pmap_pa_unmap: restoring but depth == 0"); 1711 1712 pvo->pvo_pte = *saved_pt; 1713 1714 if (!pmap_pte_spill(pvo->pvo_vaddr)) 1715 panic("pmap_pa_unmap: could not spill pvo %p", pvo); 1716 } 1717 } 1718 1719 static void 1720 pmap_syncicache(vm_offset_t pa, vm_size_t len) 1721 { 1722 __syncicache((void *)pa, len); 1723 } 1724 1725 static void 1726 tlbia(void) 1727 { 1728 caddr_t i; 1729 1730 SYNC(); 1731 for (i = 0; i < (caddr_t)0x00040000; i += 0x00001000) { 1732 TLBIE(i); 1733 EIEIO(); 1734 } 1735 TLBSYNC(); 1736 SYNC(); 1737 } 1738 1739 static int 1740 pmap_pvo_enter(pmap_t pm, uma_zone_t zone, struct pvo_head *pvo_head, 1741 vm_offset_t va, vm_offset_t pa, u_int pte_lo, int flags) 1742 { 1743 struct pvo_entry *pvo; 1744 u_int sr; 1745 int first; 1746 u_int ptegidx; 1747 int i; 1748 1749 pmap_pvo_enter_calls++; 1750 first = 0; 1751 1752 /* 1753 * Compute the PTE Group index. 1754 */ 1755 va &= ~ADDR_POFF; 1756 sr = va_to_sr(pm->pm_sr, va); 1757 ptegidx = va_to_pteg(sr, va); 1758 1759 /* 1760 * Remove any existing mapping for this page. Reuse the pvo entry if 1761 * there is a mapping. 1762 */ 1763 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1764 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1765 if ((pvo->pvo_pte.pte_lo & PTE_RPGN) == pa && 1766 (pvo->pvo_pte.pte_lo & PTE_PP) == 1767 (pte_lo & PTE_PP)) { 1768 return (0); 1769 } 1770 pmap_pvo_remove(pvo, -1); 1771 break; 1772 } 1773 } 1774 1775 /* 1776 * If we aren't overwriting a mapping, try to allocate. 1777 */ 1778 if (pmap_initialized) { 1779 pvo = uma_zalloc(zone, M_NOWAIT); 1780 } else { 1781 if (pmap_bpvo_pool_index >= pmap_bpvo_pool_count) { 1782 pmap_bpvo_pool = (struct pvo_entry *) 1783 pmap_bootstrap_alloc(PAGE_SIZE, 0); 1784 pmap_bpvo_pool_index = 0; 1785 } 1786 pvo = &pmap_bpvo_pool[pmap_bpvo_pool_index]; 1787 pmap_bpvo_pool_index++; 1788 pvo->pvo_vaddr |= PVO_BOOTSTRAP; 1789 } 1790 1791 if (pvo == NULL) { 1792 return (ENOMEM); 1793 } 1794 1795 pmap_pvo_entries++; 1796 pvo->pvo_vaddr = va; 1797 pvo->pvo_pmap = pm; 1798 LIST_INSERT_HEAD(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1799 pvo->pvo_vaddr &= ~ADDR_POFF; 1800 if (flags & VM_PROT_EXECUTE) 1801 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1802 if (flags & PVO_WIRED) 1803 pvo->pvo_vaddr |= PVO_WIRED; 1804 if (pvo_head != &pmap_pvo_kunmanaged) 1805 pvo->pvo_vaddr |= PVO_MANAGED; 1806 pmap_pte_create(&pvo->pvo_pte, sr, va, pa | pte_lo); 1807 1808 /* 1809 * Remember if the list was empty and therefore will be the first 1810 * item. 1811 */ 1812 if (LIST_FIRST(pvo_head) == NULL) 1813 first = 1; 1814 1815 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1816 if (pvo->pvo_pte.pte_lo & PVO_WIRED) 1817 pvo->pvo_pmap->pm_stats.wired_count++; 1818 pvo->pvo_pmap->pm_stats.resident_count++; 1819 1820 /* 1821 * We hope this succeeds but it isn't required. 1822 */ 1823 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1824 if (i >= 0) { 1825 PVO_PTEGIDX_SET(pvo, i); 1826 } else { 1827 panic("pmap_pvo_enter: overflow"); 1828 pmap_pte_overflow++; 1829 } 1830 1831 return (first ? ENOENT : 0); 1832 } 1833 1834 static void 1835 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx) 1836 { 1837 struct pte *pt; 1838 1839 /* 1840 * If there is an active pte entry, we need to deactivate it (and 1841 * save the ref & cfg bits). 1842 */ 1843 pt = pmap_pvo_to_pte(pvo, pteidx); 1844 if (pt != NULL) { 1845 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1846 PVO_PTEGIDX_CLR(pvo); 1847 } else { 1848 pmap_pte_overflow--; 1849 } 1850 1851 /* 1852 * Update our statistics. 1853 */ 1854 pvo->pvo_pmap->pm_stats.resident_count--; 1855 if (pvo->pvo_pte.pte_lo & PVO_WIRED) 1856 pvo->pvo_pmap->pm_stats.wired_count--; 1857 1858 /* 1859 * Save the REF/CHG bits into their cache if the page is managed. 1860 */ 1861 if (pvo->pvo_vaddr & PVO_MANAGED) { 1862 struct vm_page *pg; 1863 1864 pg = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte_lo & PTE_RPGN); 1865 if (pg != NULL) { 1866 pmap_attr_save(pg, pvo->pvo_pte.pte_lo & 1867 (PTE_REF | PTE_CHG)); 1868 } 1869 } 1870 1871 /* 1872 * Remove this PVO from the PV list. 1873 */ 1874 LIST_REMOVE(pvo, pvo_vlink); 1875 1876 /* 1877 * Remove this from the overflow list and return it to the pool 1878 * if we aren't going to reuse it. 1879 */ 1880 LIST_REMOVE(pvo, pvo_olink); 1881 if (!(pvo->pvo_vaddr & PVO_BOOTSTRAP)) 1882 uma_zfree(pvo->pvo_vaddr & PVO_MANAGED ? pmap_mpvo_zone : 1883 pmap_upvo_zone, pvo); 1884 pmap_pvo_entries--; 1885 pmap_pvo_remove_calls++; 1886 } 1887 1888 static __inline int 1889 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1890 { 1891 int pteidx; 1892 1893 /* 1894 * We can find the actual pte entry without searching by grabbing 1895 * the PTEG index from 3 unused bits in pte_lo[11:9] and by 1896 * noticing the HID bit. 1897 */ 1898 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1899 if (pvo->pvo_pte.pte_hi & PTE_HID) 1900 pteidx ^= pmap_pteg_mask * 8; 1901 1902 return (pteidx); 1903 } 1904 1905 static struct pvo_entry * 1906 pmap_pvo_find_va(pmap_t pm, vm_offset_t va, int *pteidx_p) 1907 { 1908 struct pvo_entry *pvo; 1909 int ptegidx; 1910 u_int sr; 1911 1912 va &= ~ADDR_POFF; 1913 sr = va_to_sr(pm->pm_sr, va); 1914 ptegidx = va_to_pteg(sr, va); 1915 1916 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1917 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1918 if (pteidx_p) 1919 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1920 return (pvo); 1921 } 1922 } 1923 1924 return (NULL); 1925 } 1926 1927 static struct pte * 1928 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1929 { 1930 struct pte *pt; 1931 1932 /* 1933 * If we haven't been supplied the ptegidx, calculate it. 1934 */ 1935 if (pteidx == -1) { 1936 int ptegidx; 1937 u_int sr; 1938 1939 sr = va_to_sr(pvo->pvo_pmap->pm_sr, pvo->pvo_vaddr); 1940 ptegidx = va_to_pteg(sr, pvo->pvo_vaddr); 1941 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1942 } 1943 1944 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1945 1946 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1947 panic("pmap_pvo_to_pte: pvo %p has valid pte in pvo but no " 1948 "valid pte index", pvo); 1949 } 1950 1951 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1952 panic("pmap_pvo_to_pte: pvo %p has valid pte index in pvo " 1953 "pvo but no valid pte", pvo); 1954 } 1955 1956 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1957 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1958 panic("pmap_pvo_to_pte: pvo %p has valid pte in " 1959 "pmap_pteg_table %p but invalid in pvo", pvo, pt); 1960 } 1961 1962 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) 1963 != 0) { 1964 panic("pmap_pvo_to_pte: pvo %p pte does not match " 1965 "pte %p in pmap_pteg_table", pvo, pt); 1966 } 1967 1968 return (pt); 1969 } 1970 1971 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1972 panic("pmap_pvo_to_pte: pvo %p has invalid pte %p in " 1973 "pmap_pteg_table but valid in pvo", pvo, pt); 1974 } 1975 1976 return (NULL); 1977 } 1978 1979 static void * 1980 pmap_pvo_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 1981 { 1982 vm_page_t m; 1983 1984 if (bytes != PAGE_SIZE) 1985 panic("pmap_pvo_allocf: benno was shortsighted. hit him."); 1986 1987 *flags = UMA_SLAB_PRIV; 1988 m = vm_page_alloc(pmap_pvo_obj, pmap_pvo_count, VM_ALLOC_SYSTEM); 1989 if (m == NULL) 1990 return (NULL); 1991 pmap_pvo_count++; 1992 return ((void *)VM_PAGE_TO_PHYS(m)); 1993 } 1994 1995 /* 1996 * XXX: THIS STUFF SHOULD BE IN pte.c? 1997 */ 1998 int 1999 pmap_pte_spill(vm_offset_t addr) 2000 { 2001 struct pvo_entry *source_pvo, *victim_pvo; 2002 struct pvo_entry *pvo; 2003 int ptegidx, i, j; 2004 u_int sr; 2005 struct pteg *pteg; 2006 struct pte *pt; 2007 2008 pmap_pte_spills++; 2009 2010 sr = mfsrin(addr); 2011 ptegidx = va_to_pteg(sr, addr); 2012 2013 /* 2014 * Have to substitute some entry. Use the primary hash for this. 2015 * Use low bits of timebase as random generator. 2016 */ 2017 pteg = &pmap_pteg_table[ptegidx]; 2018 __asm __volatile("mftb %0" : "=r"(i)); 2019 i &= 7; 2020 pt = &pteg->pt[i]; 2021 2022 source_pvo = NULL; 2023 victim_pvo = NULL; 2024 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2025 /* 2026 * We need to find a pvo entry for this address. 2027 */ 2028 PMAP_PVO_CHECK(pvo); 2029 if (source_pvo == NULL && 2030 pmap_pte_match(&pvo->pvo_pte, sr, addr, 2031 pvo->pvo_pte.pte_hi & PTE_HID)) { 2032 /* 2033 * Now found an entry to be spilled into the pteg. 2034 * The PTE is now valid, so we know it's active. 2035 */ 2036 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 2037 2038 if (j >= 0) { 2039 PVO_PTEGIDX_SET(pvo, j); 2040 pmap_pte_overflow--; 2041 PMAP_PVO_CHECK(pvo); 2042 return (1); 2043 } 2044 2045 source_pvo = pvo; 2046 2047 if (victim_pvo != NULL) 2048 break; 2049 } 2050 2051 /* 2052 * We also need the pvo entry of the victim we are replacing 2053 * so save the R & C bits of the PTE. 2054 */ 2055 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 2056 pmap_pte_compare(pt, &pvo->pvo_pte)) { 2057 victim_pvo = pvo; 2058 if (source_pvo != NULL) 2059 break; 2060 } 2061 } 2062 2063 if (source_pvo == NULL) 2064 return (0); 2065 2066 if (victim_pvo == NULL) { 2067 if ((pt->pte_hi & PTE_HID) == 0) 2068 panic("pmap_pte_spill: victim p-pte (%p) has no pvo" 2069 "entry", pt); 2070 2071 /* 2072 * If this is a secondary PTE, we need to search it's primary 2073 * pvo bucket for the matching PVO. 2074 */ 2075 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx ^ pmap_pteg_mask], 2076 pvo_olink) { 2077 PMAP_PVO_CHECK(pvo); 2078 /* 2079 * We also need the pvo entry of the victim we are 2080 * replacing so save the R & C bits of the PTE. 2081 */ 2082 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 2083 victim_pvo = pvo; 2084 break; 2085 } 2086 } 2087 2088 if (victim_pvo == NULL) 2089 panic("pmap_pte_spill: victim s-pte (%p) has no pvo" 2090 "entry", pt); 2091 } 2092 2093 /* 2094 * We are invalidating the TLB entry for the EA we are replacing even 2095 * though it's valid. If we don't, we lose any ref/chg bit changes 2096 * contained in the TLB entry. 2097 */ 2098 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 2099 2100 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 2101 pmap_pte_set(pt, &source_pvo->pvo_pte); 2102 2103 PVO_PTEGIDX_CLR(victim_pvo); 2104 PVO_PTEGIDX_SET(source_pvo, i); 2105 pmap_pte_replacements++; 2106 2107 PMAP_PVO_CHECK(victim_pvo); 2108 PMAP_PVO_CHECK(source_pvo); 2109 2110 return (1); 2111 } 2112 2113 static int 2114 pmap_pte_insert(u_int ptegidx, struct pte *pvo_pt) 2115 { 2116 struct pte *pt; 2117 int i; 2118 2119 /* 2120 * First try primary hash. 2121 */ 2122 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 2123 if ((pt->pte_hi & PTE_VALID) == 0) { 2124 pvo_pt->pte_hi &= ~PTE_HID; 2125 pmap_pte_set(pt, pvo_pt); 2126 return (i); 2127 } 2128 } 2129 2130 /* 2131 * Now try secondary hash. 2132 */ 2133 ptegidx ^= pmap_pteg_mask; 2134 ptegidx++; 2135 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 2136 if ((pt->pte_hi & PTE_VALID) == 0) { 2137 pvo_pt->pte_hi |= PTE_HID; 2138 pmap_pte_set(pt, pvo_pt); 2139 return (i); 2140 } 2141 } 2142 2143 panic("pmap_pte_insert: overflow"); 2144 return (-1); 2145 } 2146 2147 static boolean_t 2148 pmap_query_bit(vm_page_t m, int ptebit) 2149 { 2150 struct pvo_entry *pvo; 2151 struct pte *pt; 2152 2153 if (pmap_attr_fetch(m) & ptebit) 2154 return (TRUE); 2155 2156 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2157 PMAP_PVO_CHECK(pvo); /* sanity check */ 2158 2159 /* 2160 * See if we saved the bit off. If so, cache it and return 2161 * success. 2162 */ 2163 if (pvo->pvo_pte.pte_lo & ptebit) { 2164 pmap_attr_save(m, ptebit); 2165 PMAP_PVO_CHECK(pvo); /* sanity check */ 2166 return (TRUE); 2167 } 2168 } 2169 2170 /* 2171 * No luck, now go through the hard part of looking at the PTEs 2172 * themselves. Sync so that any pending REF/CHG bits are flushed to 2173 * the PTEs. 2174 */ 2175 SYNC(); 2176 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2177 PMAP_PVO_CHECK(pvo); /* sanity check */ 2178 2179 /* 2180 * See if this pvo has a valid PTE. if so, fetch the 2181 * REF/CHG bits from the valid PTE. If the appropriate 2182 * ptebit is set, cache it and return success. 2183 */ 2184 pt = pmap_pvo_to_pte(pvo, -1); 2185 if (pt != NULL) { 2186 pmap_pte_synch(pt, &pvo->pvo_pte); 2187 if (pvo->pvo_pte.pte_lo & ptebit) { 2188 pmap_attr_save(m, ptebit); 2189 PMAP_PVO_CHECK(pvo); /* sanity check */ 2190 return (TRUE); 2191 } 2192 } 2193 } 2194 2195 return (TRUE); 2196 } 2197 2198 static boolean_t 2199 pmap_clear_bit(vm_page_t m, int ptebit) 2200 { 2201 struct pvo_entry *pvo; 2202 struct pte *pt; 2203 int rv; 2204 2205 /* 2206 * Clear the cached value. 2207 */ 2208 rv = pmap_attr_fetch(m); 2209 pmap_attr_clear(m, ptebit); 2210 2211 /* 2212 * Sync so that any pending REF/CHG bits are flushed to the PTEs (so 2213 * we can reset the right ones). note that since the pvo entries and 2214 * list heads are accessed via BAT0 and are never placed in the page 2215 * table, we don't have to worry about further accesses setting the 2216 * REF/CHG bits. 2217 */ 2218 SYNC(); 2219 2220 /* 2221 * For each pvo entry, clear the pvo's ptebit. If this pvo has a 2222 * valid pte clear the ptebit from the valid pte. 2223 */ 2224 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2225 PMAP_PVO_CHECK(pvo); /* sanity check */ 2226 pt = pmap_pvo_to_pte(pvo, -1); 2227 if (pt != NULL) { 2228 pmap_pte_synch(pt, &pvo->pvo_pte); 2229 if (pvo->pvo_pte.pte_lo & ptebit) 2230 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2231 } 2232 rv |= pvo->pvo_pte.pte_lo; 2233 pvo->pvo_pte.pte_lo &= ~ptebit; 2234 PMAP_PVO_CHECK(pvo); /* sanity check */ 2235 } 2236 2237 return ((rv & ptebit) != 0); 2238 } 2239