1 /*- 2 * Copyright (c) 2014-2017, Matthew Macy (mmacy@mattmacy.io) 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Neither the name of Matthew Macy nor the names of its 12 * contributors may be used to endorse or promote products derived from 13 * this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 #ifndef __IFLIB_H_ 30 #define __IFLIB_H_ 31 32 #include <sys/kobj.h> 33 #include <sys/bus.h> 34 #include <sys/cpuset.h> 35 #include <machine/bus.h> 36 #include <sys/nv.h> 37 #include <sys/gtaskqueue.h> 38 39 /* 40 * The value type for indexing, limits max descriptors 41 * to 65535 can be conditionally redefined to uint32_t 42 * in the future if the need arises. 43 */ 44 typedef uint16_t qidx_t; 45 #define QIDX_INVALID 0xFFFF 46 /* 47 * Most cards can handle much larger TSO requests 48 * but the FreeBSD TCP stack will break on larger 49 * values 50 */ 51 #define FREEBSD_TSO_SIZE_MAX 65518 52 53 54 struct iflib_ctx; 55 typedef struct iflib_ctx *if_ctx_t; 56 struct if_shared_ctx; 57 typedef struct if_shared_ctx *if_shared_ctx_t; 58 struct if_int_delay_info; 59 typedef struct if_int_delay_info *if_int_delay_info_t; 60 61 /* 62 * File organization: 63 * - public structures 64 * - iflib accessors 65 * - iflib utility functions 66 * - iflib core functions 67 */ 68 69 typedef struct if_rxd_frag { 70 uint8_t irf_flid; 71 qidx_t irf_idx; 72 uint16_t irf_len; 73 } *if_rxd_frag_t; 74 75 typedef struct if_rxd_info { 76 /* set by iflib */ 77 uint16_t iri_qsidx; /* qset index */ 78 uint16_t iri_vtag; /* vlan tag - if flag set */ 79 /* XXX redundant with the new irf_len field */ 80 uint16_t iri_len; /* packet length */ 81 qidx_t iri_cidx; /* consumer index of cq */ 82 struct ifnet *iri_ifp; /* some drivers >1 interface per softc */ 83 84 /* updated by driver */ 85 if_rxd_frag_t iri_frags; 86 uint32_t iri_flowid; /* RSS hash for packet */ 87 uint32_t iri_csum_flags; /* m_pkthdr csum flags */ 88 89 uint32_t iri_csum_data; /* m_pkthdr csum data */ 90 uint8_t iri_flags; /* mbuf flags for packet */ 91 uint8_t iri_nfrags; /* number of fragments in packet */ 92 uint8_t iri_rsstype; /* RSS hash type */ 93 uint8_t iri_pad; /* any padding in the received data */ 94 } *if_rxd_info_t; 95 96 typedef struct if_rxd_update { 97 uint64_t *iru_paddrs; 98 caddr_t *iru_vaddrs; 99 qidx_t *iru_idxs; 100 qidx_t iru_pidx; 101 uint16_t iru_qsidx; 102 uint16_t iru_count; 103 uint16_t iru_buf_size; 104 uint8_t iru_flidx; 105 } *if_rxd_update_t; 106 107 #define IPI_TX_INTR 0x1 /* send an interrupt when this packet is sent */ 108 #define IPI_TX_IPV4 0x2 /* ethertype IPv4 */ 109 #define IPI_TX_IPV6 0x4 /* ethertype IPv6 */ 110 111 typedef struct if_pkt_info { 112 bus_dma_segment_t *ipi_segs; /* physical addresses */ 113 uint32_t ipi_len; /* packet length */ 114 uint16_t ipi_qsidx; /* queue set index */ 115 qidx_t ipi_nsegs; /* number of segments */ 116 117 qidx_t ipi_ndescs; /* number of descriptors used by encap */ 118 uint16_t ipi_flags; /* iflib per-packet flags */ 119 qidx_t ipi_pidx; /* start pidx for encap */ 120 qidx_t ipi_new_pidx; /* next available pidx post-encap */ 121 /* offload handling */ 122 uint8_t ipi_ehdrlen; /* ether header length */ 123 uint8_t ipi_ip_hlen; /* ip header length */ 124 uint8_t ipi_tcp_hlen; /* tcp header length */ 125 uint8_t ipi_ipproto; /* ip protocol */ 126 127 uint32_t ipi_csum_flags; /* packet checksum flags */ 128 uint16_t ipi_tso_segsz; /* tso segment size */ 129 uint16_t ipi_vtag; /* VLAN tag */ 130 uint16_t ipi_etype; /* ether header type */ 131 uint8_t ipi_tcp_hflags; /* tcp header flags */ 132 uint8_t ipi_mflags; /* packet mbuf flags */ 133 134 uint32_t ipi_tcp_seq; /* tcp seqno */ 135 uint32_t ipi_tcp_sum; /* tcp csum */ 136 } *if_pkt_info_t; 137 138 typedef struct if_irq { 139 struct resource *ii_res; 140 int ii_rid; 141 void *ii_tag; 142 } *if_irq_t; 143 144 struct if_int_delay_info { 145 if_ctx_t iidi_ctx; /* Back-pointer to the iflib ctx (softc) */ 146 int iidi_offset; /* Register offset to read/write */ 147 int iidi_value; /* Current value in usecs */ 148 struct sysctl_oid *iidi_oidp; 149 struct sysctl_req *iidi_req; 150 }; 151 152 typedef enum { 153 IFLIB_INTR_LEGACY, 154 IFLIB_INTR_MSI, 155 IFLIB_INTR_MSIX 156 } iflib_intr_mode_t; 157 158 /* 159 * This really belongs in pciio.h or some place more general 160 * but this is the only consumer for now. 161 */ 162 typedef struct pci_vendor_info { 163 uint32_t pvi_vendor_id; 164 uint32_t pvi_device_id; 165 uint32_t pvi_subvendor_id; 166 uint32_t pvi_subdevice_id; 167 uint32_t pvi_rev_id; 168 uint32_t pvi_class_mask; 169 caddr_t pvi_name; 170 } pci_vendor_info_t; 171 172 #define PVID(vendor, devid, name) {vendor, devid, 0, 0, 0, 0, name} 173 #define PVID_OEM(vendor, devid, svid, sdevid, revid, name) {vendor, devid, svid, sdevid, revid, 0, name} 174 #define PVID_END {0, 0, 0, 0, 0, 0, NULL} 175 176 #define IFLIB_PNP_DESCR "U32:vendor;U32:device;U32:subvendor;U32:subdevice;" \ 177 "U32:revision;U32:class;D:#" 178 #define IFLIB_PNP_INFO(b, u, t) \ 179 MODULE_PNP_INFO(IFLIB_PNP_DESCR, b, u, t, sizeof(t[0]), nitems(t) - 1) 180 181 typedef struct if_txrx { 182 int (*ift_txd_encap) (void *, if_pkt_info_t); 183 void (*ift_txd_flush) (void *, uint16_t, qidx_t pidx); 184 int (*ift_txd_credits_update) (void *, uint16_t qsidx, bool clear); 185 186 int (*ift_rxd_available) (void *, uint16_t qsidx, qidx_t pidx, qidx_t budget); 187 int (*ift_rxd_pkt_get) (void *, if_rxd_info_t ri); 188 void (*ift_rxd_refill) (void * , if_rxd_update_t iru); 189 void (*ift_rxd_flush) (void *, uint16_t qsidx, uint8_t flidx, qidx_t pidx); 190 int (*ift_legacy_intr) (void *); 191 } *if_txrx_t; 192 193 typedef struct if_softc_ctx { 194 int isc_vectors; 195 int isc_nrxqsets; 196 int isc_ntxqsets; 197 int isc_msix_bar; /* can be model specific - initialize in attach_pre */ 198 int isc_tx_nsegments; /* can be model specific - initialize in attach_pre */ 199 int isc_ntxd[8]; 200 int isc_nrxd[8]; 201 202 uint32_t isc_txqsizes[8]; 203 uint32_t isc_rxqsizes[8]; 204 /* is there such thing as a descriptor that is more than 248 bytes ? */ 205 uint8_t isc_txd_size[8]; 206 uint8_t isc_rxd_size[8]; 207 208 int isc_tx_tso_segments_max; 209 int isc_tx_tso_size_max; 210 int isc_tx_tso_segsize_max; 211 int isc_tx_csum_flags; 212 int isc_capenable; 213 int isc_rss_table_size; 214 int isc_rss_table_mask; 215 int isc_nrxqsets_max; 216 int isc_ntxqsets_max; 217 218 iflib_intr_mode_t isc_intr; 219 uint16_t isc_max_frame_size; /* set at init time by driver */ 220 uint16_t isc_min_frame_size; /* set at init time by driver, only used if 221 IFLIB_NEED_ETHER_PAD is set. */ 222 uint32_t isc_pause_frames; /* set by driver for iflib_timer to detect */ 223 pci_vendor_info_t isc_vendor_info; /* set by iflib prior to attach_pre */ 224 int isc_disable_msix; 225 if_txrx_t isc_txrx; 226 } *if_softc_ctx_t; 227 228 /* 229 * Initialization values for device 230 */ 231 struct if_shared_ctx { 232 int isc_magic; 233 driver_t *isc_driver; 234 bus_size_t isc_q_align; 235 bus_size_t isc_tx_maxsize; 236 bus_size_t isc_tx_maxsegsize; 237 bus_size_t isc_rx_maxsize; 238 bus_size_t isc_rx_maxsegsize; 239 int isc_rx_nsegments; 240 int isc_admin_intrcnt; /* # of admin/link interrupts */ 241 242 /* fields necessary for probe */ 243 pci_vendor_info_t *isc_vendor_info; 244 char *isc_driver_version; 245 /* optional function to transform the read values to match the table*/ 246 void (*isc_parse_devinfo) (uint16_t *device_id, uint16_t *subvendor_id, 247 uint16_t *subdevice_id, uint16_t *rev_id); 248 int isc_nrxd_min[8]; 249 int isc_nrxd_default[8]; 250 int isc_nrxd_max[8]; 251 int isc_ntxd_min[8]; 252 int isc_ntxd_default[8]; 253 int isc_ntxd_max[8]; 254 255 /* actively used during operation */ 256 int isc_nfl __aligned(CACHE_LINE_SIZE); 257 int isc_ntxqs; /* # of tx queues per tx qset - usually 1 */ 258 int isc_nrxqs; /* # of rx queues per rx qset - intel 1, chelsio 2, broadcom 3 */ 259 int isc_rx_process_limit; 260 int isc_tx_reclaim_thresh; 261 int isc_flags; 262 }; 263 264 typedef struct iflib_dma_info { 265 bus_addr_t idi_paddr; 266 caddr_t idi_vaddr; 267 bus_dma_tag_t idi_tag; 268 bus_dmamap_t idi_map; 269 uint32_t idi_size; 270 } *iflib_dma_info_t; 271 272 #define IFLIB_MAGIC 0xCAFEF00D 273 274 typedef enum { 275 IFLIB_INTR_RX, 276 IFLIB_INTR_TX, 277 IFLIB_INTR_RXTX, 278 IFLIB_INTR_ADMIN, 279 IFLIB_INTR_IOV, 280 } iflib_intr_type_t; 281 282 #ifndef ETH_ADDR_LEN 283 #define ETH_ADDR_LEN 6 284 #endif 285 286 287 /* 288 * Interface has a separate command queue for RX 289 */ 290 #define IFLIB_HAS_RXCQ 0x01 291 /* 292 * Driver has already allocated vectors 293 */ 294 #define IFLIB_SKIP_MSIX 0x02 295 /* 296 * Interface is a virtual function 297 */ 298 #define IFLIB_IS_VF 0x04 299 /* 300 * Interface has a separate command queue for TX 301 */ 302 #define IFLIB_HAS_TXCQ 0x08 303 /* 304 * Interface does checksum in place 305 */ 306 #define IFLIB_NEED_SCRATCH 0x10 307 /* 308 * Interface doesn't expect in_pseudo for th_sum 309 */ 310 #define IFLIB_TSO_INIT_IP 0x20 311 /* 312 * Interface doesn't align IP header 313 */ 314 #define IFLIB_DO_RX_FIXUP 0x40 315 /* 316 * Driver needs csum zeroed for offloading 317 */ 318 #define IFLIB_NEED_ZERO_CSUM 0x80 319 /* 320 * Driver needs frames padded to some minimum length 321 */ 322 #define IFLIB_NEED_ETHER_PAD 0x100 323 324 325 326 /* 327 * field accessors 328 */ 329 void *iflib_get_softc(if_ctx_t ctx); 330 331 device_t iflib_get_dev(if_ctx_t ctx); 332 333 if_t iflib_get_ifp(if_ctx_t ctx); 334 335 struct ifmedia *iflib_get_media(if_ctx_t ctx); 336 337 if_softc_ctx_t iflib_get_softc_ctx(if_ctx_t ctx); 338 if_shared_ctx_t iflib_get_sctx(if_ctx_t ctx); 339 340 void iflib_set_mac(if_ctx_t ctx, uint8_t mac[ETHER_ADDR_LEN]); 341 342 /* 343 * If the driver can plug cleanly in to newbus use these 344 */ 345 int iflib_device_probe(device_t); 346 int iflib_device_attach(device_t); 347 int iflib_device_detach(device_t); 348 int iflib_device_suspend(device_t); 349 int iflib_device_resume(device_t); 350 int iflib_device_shutdown(device_t); 351 352 353 int iflib_device_iov_init(device_t, uint16_t, const nvlist_t *); 354 void iflib_device_iov_uninit(device_t); 355 int iflib_device_iov_add_vf(device_t, uint16_t, const nvlist_t *); 356 357 /* 358 * If the driver can't plug cleanly in to newbus 359 * use these 360 */ 361 int iflib_device_register(device_t dev, void *softc, if_shared_ctx_t sctx, if_ctx_t *ctxp); 362 int iflib_device_deregister(if_ctx_t); 363 364 365 366 int iflib_irq_alloc(if_ctx_t, if_irq_t, int, driver_filter_t, void *filter_arg, driver_intr_t, void *arg, char *name); 367 int iflib_irq_alloc_generic(if_ctx_t ctx, if_irq_t irq, int rid, 368 iflib_intr_type_t type, driver_filter_t *filter, 369 void *filter_arg, int qid, char *name); 370 void iflib_softirq_alloc_generic(if_ctx_t ctx, if_irq_t irq, iflib_intr_type_t type, void *arg, int qid, char *name); 371 372 void iflib_irq_free(if_ctx_t ctx, if_irq_t irq); 373 374 void iflib_io_tqg_attach(struct grouptask *gt, void *uniq, int cpu, char *name); 375 376 void iflib_config_gtask_init(if_ctx_t ctx, struct grouptask *gtask, 377 gtask_fn_t *fn, char *name); 378 379 void iflib_config_gtask_deinit(struct grouptask *gtask); 380 381 382 383 void iflib_tx_intr_deferred(if_ctx_t ctx, int txqid); 384 void iflib_rx_intr_deferred(if_ctx_t ctx, int rxqid); 385 void iflib_admin_intr_deferred(if_ctx_t ctx); 386 void iflib_iov_intr_deferred(if_ctx_t ctx); 387 388 389 void iflib_link_state_change(if_ctx_t ctx, int linkstate, uint64_t baudrate); 390 391 int iflib_dma_alloc(if_ctx_t ctx, int size, iflib_dma_info_t dma, int mapflags); 392 void iflib_dma_free(iflib_dma_info_t dma); 393 394 int iflib_dma_alloc_multi(if_ctx_t ctx, int *sizes, iflib_dma_info_t *dmalist, int mapflags, int count); 395 396 void iflib_dma_free_multi(iflib_dma_info_t *dmalist, int count); 397 398 399 struct mtx *iflib_ctx_lock_get(if_ctx_t); 400 struct mtx *iflib_qset_lock_get(if_ctx_t, uint16_t); 401 402 void iflib_led_create(if_ctx_t ctx); 403 404 void iflib_add_int_delay_sysctl(if_ctx_t, const char *, const char *, 405 if_int_delay_info_t, int, int); 406 407 #endif /* __IFLIB_H_ */ 408