1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2010-2013 Alexander Motin <mav@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 /* 33 * Common routines to manage event timers hardware. 34 */ 35 36 #include "opt_device_polling.h" 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/bus.h> 41 #include <sys/limits.h> 42 #include <sys/lock.h> 43 #include <sys/kdb.h> 44 #include <sys/ktr.h> 45 #include <sys/mutex.h> 46 #include <sys/proc.h> 47 #include <sys/kernel.h> 48 #include <sys/sched.h> 49 #include <sys/smp.h> 50 #include <sys/sysctl.h> 51 #include <sys/timeet.h> 52 #include <sys/timetc.h> 53 54 #include <machine/atomic.h> 55 #include <machine/clock.h> 56 #include <machine/cpu.h> 57 #include <machine/smp.h> 58 59 int cpu_disable_c2_sleep = 0; /* Timer dies in C2. */ 60 int cpu_disable_c3_sleep = 0; /* Timer dies in C3. */ 61 62 static void setuptimer(void); 63 static void loadtimer(sbintime_t now, int first); 64 static int doconfigtimer(void); 65 static void configtimer(int start); 66 static int round_freq(struct eventtimer *et, int freq); 67 68 static sbintime_t getnextcpuevent(int idle); 69 static sbintime_t getnextevent(void); 70 static int handleevents(sbintime_t now, int fake); 71 72 static struct mtx et_hw_mtx; 73 74 #define ET_HW_LOCK(state) \ 75 { \ 76 if (timer->et_flags & ET_FLAGS_PERCPU) \ 77 mtx_lock_spin(&(state)->et_hw_mtx); \ 78 else \ 79 mtx_lock_spin(&et_hw_mtx); \ 80 } 81 82 #define ET_HW_UNLOCK(state) \ 83 { \ 84 if (timer->et_flags & ET_FLAGS_PERCPU) \ 85 mtx_unlock_spin(&(state)->et_hw_mtx); \ 86 else \ 87 mtx_unlock_spin(&et_hw_mtx); \ 88 } 89 90 static struct eventtimer *timer = NULL; 91 static sbintime_t timerperiod; /* Timer period for periodic mode. */ 92 static sbintime_t statperiod; /* statclock() events period. */ 93 static sbintime_t profperiod; /* profclock() events period. */ 94 static sbintime_t nexttick; /* Next global timer tick time. */ 95 static u_int busy = 1; /* Reconfiguration is in progress. */ 96 static int profiling; /* Profiling events enabled. */ 97 98 static char timername[32]; /* Wanted timer. */ 99 TUNABLE_STR("kern.eventtimer.timer", timername, sizeof(timername)); 100 101 static int singlemul; /* Multiplier for periodic mode. */ 102 SYSCTL_INT(_kern_eventtimer, OID_AUTO, singlemul, CTLFLAG_RWTUN, &singlemul, 103 0, "Multiplier for periodic mode"); 104 105 static u_int idletick; /* Run periodic events when idle. */ 106 SYSCTL_UINT(_kern_eventtimer, OID_AUTO, idletick, CTLFLAG_RWTUN, &idletick, 107 0, "Run periodic events when idle"); 108 109 static int periodic; /* Periodic or one-shot mode. */ 110 static int want_periodic; /* What mode to prefer. */ 111 TUNABLE_INT("kern.eventtimer.periodic", &want_periodic); 112 113 struct pcpu_state { 114 struct mtx et_hw_mtx; /* Per-CPU timer mutex. */ 115 u_int action; /* Reconfiguration requests. */ 116 u_int handle; /* Immediate handle resuests. */ 117 sbintime_t now; /* Last tick time. */ 118 sbintime_t nextevent; /* Next scheduled event on this CPU. */ 119 sbintime_t nexttick; /* Next timer tick time. */ 120 sbintime_t nexthard; /* Next hardclock() event. */ 121 sbintime_t nextstat; /* Next statclock() event. */ 122 sbintime_t nextprof; /* Next profclock() event. */ 123 sbintime_t nextcall; /* Next callout event. */ 124 sbintime_t nextcallopt; /* Next optional callout event. */ 125 int ipi; /* This CPU needs IPI. */ 126 int idle; /* This CPU is in idle mode. */ 127 }; 128 129 static DPCPU_DEFINE(struct pcpu_state, timerstate); 130 DPCPU_DEFINE(sbintime_t, hardclocktime); 131 132 /* 133 * Timer broadcast IPI handler. 134 */ 135 int 136 hardclockintr(void) 137 { 138 sbintime_t now; 139 struct pcpu_state *state; 140 int done; 141 142 if (doconfigtimer() || busy) 143 return (FILTER_HANDLED); 144 state = DPCPU_PTR(timerstate); 145 now = state->now; 146 CTR3(KTR_SPARE2, "ipi at %d: now %d.%08x", 147 curcpu, (int)(now >> 32), (u_int)(now & 0xffffffff)); 148 done = handleevents(now, 0); 149 return (done ? FILTER_HANDLED : FILTER_STRAY); 150 } 151 152 /* 153 * Handle all events for specified time on this CPU 154 */ 155 static int 156 handleevents(sbintime_t now, int fake) 157 { 158 sbintime_t t, *hct; 159 struct trapframe *frame; 160 struct pcpu_state *state; 161 int usermode; 162 int done, runs; 163 164 CTR3(KTR_SPARE2, "handle at %d: now %d.%08x", 165 curcpu, (int)(now >> 32), (u_int)(now & 0xffffffff)); 166 done = 0; 167 if (fake) { 168 frame = NULL; 169 usermode = 0; 170 } else { 171 frame = curthread->td_intr_frame; 172 usermode = TRAPF_USERMODE(frame); 173 } 174 175 state = DPCPU_PTR(timerstate); 176 177 runs = 0; 178 while (now >= state->nexthard) { 179 state->nexthard += tick_sbt; 180 runs++; 181 } 182 if (runs) { 183 hct = DPCPU_PTR(hardclocktime); 184 *hct = state->nexthard - tick_sbt; 185 if (fake < 2) { 186 hardclock_cnt(runs, usermode); 187 done = 1; 188 } 189 } 190 runs = 0; 191 while (now >= state->nextstat) { 192 state->nextstat += statperiod; 193 runs++; 194 } 195 if (runs && fake < 2) { 196 statclock_cnt(runs, usermode); 197 done = 1; 198 } 199 if (profiling) { 200 runs = 0; 201 while (now >= state->nextprof) { 202 state->nextprof += profperiod; 203 runs++; 204 } 205 if (runs && !fake) { 206 profclock_cnt(runs, usermode, TRAPF_PC(frame)); 207 done = 1; 208 } 209 } else 210 state->nextprof = state->nextstat; 211 if (now >= state->nextcallopt || now >= state->nextcall) { 212 state->nextcall = state->nextcallopt = SBT_MAX; 213 callout_process(now); 214 } 215 216 t = getnextcpuevent(0); 217 ET_HW_LOCK(state); 218 if (!busy) { 219 state->idle = 0; 220 state->nextevent = t; 221 loadtimer(now, (fake == 2) && 222 (timer->et_flags & ET_FLAGS_PERCPU)); 223 } 224 ET_HW_UNLOCK(state); 225 return (done); 226 } 227 228 /* 229 * Schedule binuptime of the next event on current CPU. 230 */ 231 static sbintime_t 232 getnextcpuevent(int idle) 233 { 234 sbintime_t event; 235 struct pcpu_state *state; 236 u_int hardfreq; 237 238 state = DPCPU_PTR(timerstate); 239 /* Handle hardclock() events, skipping some if CPU is idle. */ 240 event = state->nexthard; 241 if (idle) { 242 hardfreq = (u_int)hz / 2; 243 if (tc_min_ticktock_freq > 2 244 #ifdef SMP 245 && curcpu == CPU_FIRST() 246 #endif 247 ) 248 hardfreq = hz / tc_min_ticktock_freq; 249 if (hardfreq > 1) 250 event += tick_sbt * (hardfreq - 1); 251 } 252 /* Handle callout events. */ 253 if (event > state->nextcall) 254 event = state->nextcall; 255 if (!idle) { /* If CPU is active - handle other types of events. */ 256 if (event > state->nextstat) 257 event = state->nextstat; 258 if (profiling && event > state->nextprof) 259 event = state->nextprof; 260 } 261 return (event); 262 } 263 264 /* 265 * Schedule binuptime of the next event on all CPUs. 266 */ 267 static sbintime_t 268 getnextevent(void) 269 { 270 struct pcpu_state *state; 271 sbintime_t event; 272 #ifdef SMP 273 int cpu; 274 #endif 275 int c; 276 277 state = DPCPU_PTR(timerstate); 278 event = state->nextevent; 279 c = -1; 280 #ifdef SMP 281 if ((timer->et_flags & ET_FLAGS_PERCPU) == 0) { 282 CPU_FOREACH(cpu) { 283 state = DPCPU_ID_PTR(cpu, timerstate); 284 if (event > state->nextevent) { 285 event = state->nextevent; 286 c = cpu; 287 } 288 } 289 } 290 #endif 291 CTR4(KTR_SPARE2, "next at %d: next %d.%08x by %d", 292 curcpu, (int)(event >> 32), (u_int)(event & 0xffffffff), c); 293 return (event); 294 } 295 296 /* Hardware timer callback function. */ 297 static void 298 timercb(struct eventtimer *et, void *arg) 299 { 300 sbintime_t now; 301 sbintime_t *next; 302 struct pcpu_state *state; 303 #ifdef SMP 304 int cpu, bcast; 305 #endif 306 307 /* Do not touch anything if somebody reconfiguring timers. */ 308 if (busy) 309 return; 310 /* Update present and next tick times. */ 311 state = DPCPU_PTR(timerstate); 312 if (et->et_flags & ET_FLAGS_PERCPU) { 313 next = &state->nexttick; 314 } else 315 next = &nexttick; 316 now = sbinuptime(); 317 if (periodic) 318 *next = now + timerperiod; 319 else 320 *next = -1; /* Next tick is not scheduled yet. */ 321 state->now = now; 322 CTR3(KTR_SPARE2, "intr at %d: now %d.%08x", 323 curcpu, (int)(now >> 32), (u_int)(now & 0xffffffff)); 324 325 #ifdef SMP 326 #ifdef EARLY_AP_STARTUP 327 MPASS(mp_ncpus == 1 || smp_started); 328 #endif 329 /* Prepare broadcasting to other CPUs for non-per-CPU timers. */ 330 bcast = 0; 331 #ifdef EARLY_AP_STARTUP 332 if ((et->et_flags & ET_FLAGS_PERCPU) == 0) { 333 #else 334 if ((et->et_flags & ET_FLAGS_PERCPU) == 0 && smp_started) { 335 #endif 336 CPU_FOREACH(cpu) { 337 state = DPCPU_ID_PTR(cpu, timerstate); 338 ET_HW_LOCK(state); 339 state->now = now; 340 if (now >= state->nextevent) { 341 state->nextevent += SBT_1S; 342 if (curcpu != cpu) { 343 state->ipi = 1; 344 bcast = 1; 345 } 346 } 347 ET_HW_UNLOCK(state); 348 } 349 } 350 #endif 351 352 /* Handle events for this time on this CPU. */ 353 handleevents(now, 0); 354 355 #ifdef SMP 356 /* Broadcast interrupt to other CPUs for non-per-CPU timers. */ 357 if (bcast) { 358 CPU_FOREACH(cpu) { 359 if (curcpu == cpu) 360 continue; 361 state = DPCPU_ID_PTR(cpu, timerstate); 362 if (state->ipi) { 363 state->ipi = 0; 364 ipi_cpu(cpu, IPI_HARDCLOCK); 365 } 366 } 367 } 368 #endif 369 } 370 371 /* 372 * Load new value into hardware timer. 373 */ 374 static void 375 loadtimer(sbintime_t now, int start) 376 { 377 struct pcpu_state *state; 378 sbintime_t new; 379 sbintime_t *next; 380 uint64_t tmp; 381 int eq; 382 383 if (timer->et_flags & ET_FLAGS_PERCPU) { 384 state = DPCPU_PTR(timerstate); 385 next = &state->nexttick; 386 } else 387 next = &nexttick; 388 if (periodic) { 389 if (start) { 390 /* 391 * Try to start all periodic timers aligned 392 * to period to make events synchronous. 393 */ 394 tmp = now % timerperiod; 395 new = timerperiod - tmp; 396 if (new < tmp) /* Left less then passed. */ 397 new += timerperiod; 398 CTR5(KTR_SPARE2, "load p at %d: now %d.%08x first in %d.%08x", 399 curcpu, (int)(now >> 32), (u_int)(now & 0xffffffff), 400 (int)(new >> 32), (u_int)(new & 0xffffffff)); 401 *next = new + now; 402 et_start(timer, new, timerperiod); 403 } 404 } else { 405 new = getnextevent(); 406 eq = (new == *next); 407 CTR4(KTR_SPARE2, "load at %d: next %d.%08x eq %d", 408 curcpu, (int)(new >> 32), (u_int)(new & 0xffffffff), eq); 409 if (!eq) { 410 *next = new; 411 et_start(timer, new - now, 0); 412 } 413 } 414 } 415 416 /* 417 * Prepare event timer parameters after configuration changes. 418 */ 419 static void 420 setuptimer(void) 421 { 422 int freq; 423 424 if (periodic && (timer->et_flags & ET_FLAGS_PERIODIC) == 0) 425 periodic = 0; 426 else if (!periodic && (timer->et_flags & ET_FLAGS_ONESHOT) == 0) 427 periodic = 1; 428 singlemul = MIN(MAX(singlemul, 1), 20); 429 freq = hz * singlemul; 430 while (freq < (profiling ? profhz : stathz)) 431 freq += hz; 432 freq = round_freq(timer, freq); 433 timerperiod = SBT_1S / freq; 434 } 435 436 /* 437 * Reconfigure specified per-CPU timer on other CPU. Called from IPI handler. 438 */ 439 static int 440 doconfigtimer(void) 441 { 442 sbintime_t now; 443 struct pcpu_state *state; 444 445 state = DPCPU_PTR(timerstate); 446 switch (atomic_load_acq_int(&state->action)) { 447 case 1: 448 now = sbinuptime(); 449 ET_HW_LOCK(state); 450 loadtimer(now, 1); 451 ET_HW_UNLOCK(state); 452 state->handle = 0; 453 atomic_store_rel_int(&state->action, 0); 454 return (1); 455 case 2: 456 ET_HW_LOCK(state); 457 et_stop(timer); 458 ET_HW_UNLOCK(state); 459 state->handle = 0; 460 atomic_store_rel_int(&state->action, 0); 461 return (1); 462 } 463 if (atomic_readandclear_int(&state->handle) && !busy) { 464 now = sbinuptime(); 465 handleevents(now, 0); 466 return (1); 467 } 468 return (0); 469 } 470 471 /* 472 * Reconfigure specified timer. 473 * For per-CPU timers use IPI to make other CPUs to reconfigure. 474 */ 475 static void 476 configtimer(int start) 477 { 478 sbintime_t now, next; 479 struct pcpu_state *state; 480 int cpu; 481 482 if (start) { 483 setuptimer(); 484 now = sbinuptime(); 485 } else 486 now = 0; 487 critical_enter(); 488 ET_HW_LOCK(DPCPU_PTR(timerstate)); 489 if (start) { 490 /* Initialize time machine parameters. */ 491 next = now + timerperiod; 492 if (periodic) 493 nexttick = next; 494 else 495 nexttick = -1; 496 #ifdef EARLY_AP_STARTUP 497 MPASS(mp_ncpus == 1 || smp_started); 498 #endif 499 CPU_FOREACH(cpu) { 500 state = DPCPU_ID_PTR(cpu, timerstate); 501 state->now = now; 502 #ifndef EARLY_AP_STARTUP 503 if (!smp_started && cpu != CPU_FIRST()) 504 state->nextevent = SBT_MAX; 505 else 506 #endif 507 state->nextevent = next; 508 if (periodic) 509 state->nexttick = next; 510 else 511 state->nexttick = -1; 512 state->nexthard = next; 513 state->nextstat = next; 514 state->nextprof = next; 515 state->nextcall = next; 516 state->nextcallopt = next; 517 hardclock_sync(cpu); 518 } 519 busy = 0; 520 /* Start global timer or per-CPU timer of this CPU. */ 521 loadtimer(now, 1); 522 } else { 523 busy = 1; 524 /* Stop global timer or per-CPU timer of this CPU. */ 525 et_stop(timer); 526 } 527 ET_HW_UNLOCK(DPCPU_PTR(timerstate)); 528 #ifdef SMP 529 #ifdef EARLY_AP_STARTUP 530 /* If timer is global we are done. */ 531 if ((timer->et_flags & ET_FLAGS_PERCPU) == 0) { 532 #else 533 /* If timer is global or there is no other CPUs yet - we are done. */ 534 if ((timer->et_flags & ET_FLAGS_PERCPU) == 0 || !smp_started) { 535 #endif 536 critical_exit(); 537 return; 538 } 539 /* Set reconfigure flags for other CPUs. */ 540 CPU_FOREACH(cpu) { 541 state = DPCPU_ID_PTR(cpu, timerstate); 542 atomic_store_rel_int(&state->action, 543 (cpu == curcpu) ? 0 : ( start ? 1 : 2)); 544 } 545 /* Broadcast reconfigure IPI. */ 546 ipi_all_but_self(IPI_HARDCLOCK); 547 /* Wait for reconfiguration completed. */ 548 restart: 549 cpu_spinwait(); 550 CPU_FOREACH(cpu) { 551 if (cpu == curcpu) 552 continue; 553 state = DPCPU_ID_PTR(cpu, timerstate); 554 if (atomic_load_acq_int(&state->action)) 555 goto restart; 556 } 557 #endif 558 critical_exit(); 559 } 560 561 /* 562 * Calculate nearest frequency supported by hardware timer. 563 */ 564 static int 565 round_freq(struct eventtimer *et, int freq) 566 { 567 uint64_t div; 568 569 if (et->et_frequency != 0) { 570 div = lmax((et->et_frequency + freq / 2) / freq, 1); 571 if (et->et_flags & ET_FLAGS_POW2DIV) 572 div = 1 << (flsl(div + div / 2) - 1); 573 freq = (et->et_frequency + div / 2) / div; 574 } 575 if (et->et_min_period > SBT_1S) 576 panic("Event timer \"%s\" doesn't support sub-second periods!", 577 et->et_name); 578 else if (et->et_min_period != 0) 579 freq = min(freq, SBT2FREQ(et->et_min_period)); 580 if (et->et_max_period < SBT_1S && et->et_max_period != 0) 581 freq = max(freq, SBT2FREQ(et->et_max_period)); 582 return (freq); 583 } 584 585 /* 586 * Configure and start event timers (BSP part). 587 */ 588 void 589 cpu_initclocks_bsp(void) 590 { 591 struct pcpu_state *state; 592 int base, div, cpu; 593 594 mtx_init(&et_hw_mtx, "et_hw_mtx", NULL, MTX_SPIN); 595 CPU_FOREACH(cpu) { 596 state = DPCPU_ID_PTR(cpu, timerstate); 597 mtx_init(&state->et_hw_mtx, "et_hw_mtx", NULL, MTX_SPIN); 598 state->nextcall = SBT_MAX; 599 state->nextcallopt = SBT_MAX; 600 } 601 periodic = want_periodic; 602 /* Grab requested timer or the best of present. */ 603 if (timername[0]) 604 timer = et_find(timername, 0, 0); 605 if (timer == NULL && periodic) { 606 timer = et_find(NULL, 607 ET_FLAGS_PERIODIC, ET_FLAGS_PERIODIC); 608 } 609 if (timer == NULL) { 610 timer = et_find(NULL, 611 ET_FLAGS_ONESHOT, ET_FLAGS_ONESHOT); 612 } 613 if (timer == NULL && !periodic) { 614 timer = et_find(NULL, 615 ET_FLAGS_PERIODIC, ET_FLAGS_PERIODIC); 616 } 617 if (timer == NULL) 618 panic("No usable event timer found!"); 619 et_init(timer, timercb, NULL, NULL); 620 621 /* Adapt to timer capabilities. */ 622 if (periodic && (timer->et_flags & ET_FLAGS_PERIODIC) == 0) 623 periodic = 0; 624 else if (!periodic && (timer->et_flags & ET_FLAGS_ONESHOT) == 0) 625 periodic = 1; 626 if (timer->et_flags & ET_FLAGS_C3STOP) 627 cpu_disable_c3_sleep++; 628 629 /* 630 * We honor the requested 'hz' value. 631 * We want to run stathz in the neighborhood of 128hz. 632 * We would like profhz to run as often as possible. 633 */ 634 if (singlemul <= 0 || singlemul > 20) { 635 if (hz >= 1500 || (hz % 128) == 0) 636 singlemul = 1; 637 else if (hz >= 750) 638 singlemul = 2; 639 else 640 singlemul = 4; 641 } 642 if (periodic) { 643 base = round_freq(timer, hz * singlemul); 644 singlemul = max((base + hz / 2) / hz, 1); 645 hz = (base + singlemul / 2) / singlemul; 646 if (base <= 128) 647 stathz = base; 648 else { 649 div = base / 128; 650 if (div >= singlemul && (div % singlemul) == 0) 651 div++; 652 stathz = base / div; 653 } 654 profhz = stathz; 655 while ((profhz + stathz) <= 128 * 64) 656 profhz += stathz; 657 profhz = round_freq(timer, profhz); 658 } else { 659 hz = round_freq(timer, hz); 660 stathz = round_freq(timer, 127); 661 profhz = round_freq(timer, stathz * 64); 662 } 663 tick = 1000000 / hz; 664 tick_sbt = SBT_1S / hz; 665 tick_bt = sbttobt(tick_sbt); 666 statperiod = SBT_1S / stathz; 667 profperiod = SBT_1S / profhz; 668 ET_LOCK(); 669 configtimer(1); 670 ET_UNLOCK(); 671 } 672 673 /* 674 * Start per-CPU event timers on APs. 675 */ 676 void 677 cpu_initclocks_ap(void) 678 { 679 sbintime_t now; 680 struct pcpu_state *state; 681 struct thread *td; 682 683 state = DPCPU_PTR(timerstate); 684 now = sbinuptime(); 685 ET_HW_LOCK(state); 686 state->now = now; 687 hardclock_sync(curcpu); 688 spinlock_enter(); 689 ET_HW_UNLOCK(state); 690 td = curthread; 691 td->td_intr_nesting_level++; 692 handleevents(state->now, 2); 693 td->td_intr_nesting_level--; 694 spinlock_exit(); 695 } 696 697 /* 698 * Switch to profiling clock rates. 699 */ 700 void 701 cpu_startprofclock(void) 702 { 703 704 ET_LOCK(); 705 if (profiling == 0) { 706 if (periodic) { 707 configtimer(0); 708 profiling = 1; 709 configtimer(1); 710 } else 711 profiling = 1; 712 } else 713 profiling++; 714 ET_UNLOCK(); 715 } 716 717 /* 718 * Switch to regular clock rates. 719 */ 720 void 721 cpu_stopprofclock(void) 722 { 723 724 ET_LOCK(); 725 if (profiling == 1) { 726 if (periodic) { 727 configtimer(0); 728 profiling = 0; 729 configtimer(1); 730 } else 731 profiling = 0; 732 } else 733 profiling--; 734 ET_UNLOCK(); 735 } 736 737 /* 738 * Switch to idle mode (all ticks handled). 739 */ 740 sbintime_t 741 cpu_idleclock(void) 742 { 743 sbintime_t now, t; 744 struct pcpu_state *state; 745 746 if (idletick || busy || 747 (periodic && (timer->et_flags & ET_FLAGS_PERCPU)) 748 #ifdef DEVICE_POLLING 749 || curcpu == CPU_FIRST() 750 #endif 751 ) 752 return (-1); 753 state = DPCPU_PTR(timerstate); 754 if (periodic) 755 now = state->now; 756 else 757 now = sbinuptime(); 758 CTR3(KTR_SPARE2, "idle at %d: now %d.%08x", 759 curcpu, (int)(now >> 32), (u_int)(now & 0xffffffff)); 760 t = getnextcpuevent(1); 761 ET_HW_LOCK(state); 762 state->idle = 1; 763 state->nextevent = t; 764 if (!periodic) 765 loadtimer(now, 0); 766 ET_HW_UNLOCK(state); 767 return (MAX(t - now, 0)); 768 } 769 770 /* 771 * Switch to active mode (skip empty ticks). 772 */ 773 void 774 cpu_activeclock(void) 775 { 776 sbintime_t now; 777 struct pcpu_state *state; 778 struct thread *td; 779 780 state = DPCPU_PTR(timerstate); 781 if (state->idle == 0 || busy) 782 return; 783 if (periodic) 784 now = state->now; 785 else 786 now = sbinuptime(); 787 CTR3(KTR_SPARE2, "active at %d: now %d.%08x", 788 curcpu, (int)(now >> 32), (u_int)(now & 0xffffffff)); 789 spinlock_enter(); 790 td = curthread; 791 td->td_intr_nesting_level++; 792 handleevents(now, 1); 793 td->td_intr_nesting_level--; 794 spinlock_exit(); 795 } 796 797 /* 798 * Change the frequency of the given timer. This changes et->et_frequency and 799 * if et is the active timer it reconfigures the timer on all CPUs. This is 800 * intended to be a private interface for the use of et_change_frequency() only. 801 */ 802 void 803 cpu_et_frequency(struct eventtimer *et, uint64_t newfreq) 804 { 805 806 ET_LOCK(); 807 if (et == timer) { 808 configtimer(0); 809 et->et_frequency = newfreq; 810 configtimer(1); 811 } else 812 et->et_frequency = newfreq; 813 ET_UNLOCK(); 814 } 815 816 void 817 cpu_new_callout(int cpu, sbintime_t bt, sbintime_t bt_opt) 818 { 819 struct pcpu_state *state; 820 821 /* Do not touch anything if somebody reconfiguring timers. */ 822 if (busy) 823 return; 824 CTR6(KTR_SPARE2, "new co at %d: on %d at %d.%08x - %d.%08x", 825 curcpu, cpu, (int)(bt_opt >> 32), (u_int)(bt_opt & 0xffffffff), 826 (int)(bt >> 32), (u_int)(bt & 0xffffffff)); 827 828 KASSERT(!CPU_ABSENT(cpu), ("Absent CPU %d", cpu)); 829 state = DPCPU_ID_PTR(cpu, timerstate); 830 ET_HW_LOCK(state); 831 832 /* 833 * If there is callout time already set earlier -- do nothing. 834 * This check may appear redundant because we check already in 835 * callout_process() but this double check guarantees we're safe 836 * with respect to race conditions between interrupts execution 837 * and scheduling. 838 */ 839 state->nextcallopt = bt_opt; 840 if (bt >= state->nextcall) 841 goto done; 842 state->nextcall = bt; 843 /* If there is some other event set earlier -- do nothing. */ 844 if (bt >= state->nextevent) 845 goto done; 846 state->nextevent = bt; 847 /* If timer is periodic -- there is nothing to reprogram. */ 848 if (periodic) 849 goto done; 850 /* If timer is global or of the current CPU -- reprogram it. */ 851 if ((timer->et_flags & ET_FLAGS_PERCPU) == 0 || cpu == curcpu) { 852 loadtimer(sbinuptime(), 0); 853 done: 854 ET_HW_UNLOCK(state); 855 return; 856 } 857 /* Otherwise make other CPU to reprogram it. */ 858 state->handle = 1; 859 ET_HW_UNLOCK(state); 860 #ifdef SMP 861 ipi_cpu(cpu, IPI_HARDCLOCK); 862 #endif 863 } 864 865 /* 866 * Report or change the active event timers hardware. 867 */ 868 static int 869 sysctl_kern_eventtimer_timer(SYSCTL_HANDLER_ARGS) 870 { 871 char buf[32]; 872 struct eventtimer *et; 873 int error; 874 875 ET_LOCK(); 876 et = timer; 877 snprintf(buf, sizeof(buf), "%s", et->et_name); 878 ET_UNLOCK(); 879 error = sysctl_handle_string(oidp, buf, sizeof(buf), req); 880 ET_LOCK(); 881 et = timer; 882 if (error != 0 || req->newptr == NULL || 883 strcasecmp(buf, et->et_name) == 0) { 884 ET_UNLOCK(); 885 return (error); 886 } 887 et = et_find(buf, 0, 0); 888 if (et == NULL) { 889 ET_UNLOCK(); 890 return (ENOENT); 891 } 892 configtimer(0); 893 et_free(timer); 894 if (et->et_flags & ET_FLAGS_C3STOP) 895 cpu_disable_c3_sleep++; 896 if (timer->et_flags & ET_FLAGS_C3STOP) 897 cpu_disable_c3_sleep--; 898 periodic = want_periodic; 899 timer = et; 900 et_init(timer, timercb, NULL, NULL); 901 configtimer(1); 902 ET_UNLOCK(); 903 return (error); 904 } 905 SYSCTL_PROC(_kern_eventtimer, OID_AUTO, timer, 906 CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE, 907 0, 0, sysctl_kern_eventtimer_timer, "A", "Chosen event timer"); 908 909 /* 910 * Report or change the active event timer periodicity. 911 */ 912 static int 913 sysctl_kern_eventtimer_periodic(SYSCTL_HANDLER_ARGS) 914 { 915 int error, val; 916 917 val = periodic; 918 error = sysctl_handle_int(oidp, &val, 0, req); 919 if (error != 0 || req->newptr == NULL) 920 return (error); 921 ET_LOCK(); 922 configtimer(0); 923 periodic = want_periodic = val; 924 configtimer(1); 925 ET_UNLOCK(); 926 return (error); 927 } 928 SYSCTL_PROC(_kern_eventtimer, OID_AUTO, periodic, 929 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, 930 0, 0, sysctl_kern_eventtimer_periodic, "I", "Enable event timer periodic mode"); 931 932 #include "opt_ddb.h" 933 934 #ifdef DDB 935 #include <ddb/ddb.h> 936 937 DB_SHOW_COMMAND(clocksource, db_show_clocksource) 938 { 939 struct pcpu_state *st; 940 int c; 941 942 CPU_FOREACH(c) { 943 st = DPCPU_ID_PTR(c, timerstate); 944 db_printf( 945 "CPU %2d: action %d handle %d ipi %d idle %d\n" 946 " now %#jx nevent %#jx (%jd)\n" 947 " ntick %#jx (%jd) nhard %#jx (%jd)\n" 948 " nstat %#jx (%jd) nprof %#jx (%jd)\n" 949 " ncall %#jx (%jd) ncallopt %#jx (%jd)\n", 950 c, st->action, st->handle, st->ipi, st->idle, 951 (uintmax_t)st->now, 952 (uintmax_t)st->nextevent, 953 (uintmax_t)(st->nextevent - st->now) / tick_sbt, 954 (uintmax_t)st->nexttick, 955 (uintmax_t)(st->nexttick - st->now) / tick_sbt, 956 (uintmax_t)st->nexthard, 957 (uintmax_t)(st->nexthard - st->now) / tick_sbt, 958 (uintmax_t)st->nextstat, 959 (uintmax_t)(st->nextstat - st->now) / tick_sbt, 960 (uintmax_t)st->nextprof, 961 (uintmax_t)(st->nextprof - st->now) / tick_sbt, 962 (uintmax_t)st->nextcall, 963 (uintmax_t)(st->nextcall - st->now) / tick_sbt, 964 (uintmax_t)st->nextcallopt, 965 (uintmax_t)(st->nextcallopt - st->now) / tick_sbt); 966 } 967 } 968 969 #endif 970