xref: /freebsd/sys/isa/rtc.h (revision cfd6422a5217410fbd66f7a7a8a64d9d85e61229)
1 /*-
2  * SPDX-License-Identifier: BSD-3-Clause
3  *
4  * Copyright (c) 1990 The Regents of the University of California.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * William Jolitz.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. Neither the name of the University nor the names of its contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  *	from: @(#)rtc.h	7.1 (Berkeley) 5/12/91
35  * $FreeBSD$
36  */
37 
38 #ifndef _I386_ISA_RTC_H_
39 #define _I386_ISA_RTC_H_ 1
40 
41 /*
42  * MC146818 RTC Register locations
43  */
44 
45 #define RTC_SEC		0x00	/* seconds */
46 #define RTC_SECALRM	0x01	/* seconds alarm */
47 #define RTC_MIN		0x02	/* minutes */
48 #define RTC_MINALRM	0x03	/* minutes alarm */
49 #define RTC_HRS		0x04	/* hours */
50 #define RTC_HRSALRM	0x05	/* hours alarm */
51 #define RTC_WDAY	0x06	/* week day */
52 #define RTC_DAY		0x07	/* day of month */
53 #define RTC_MONTH	0x08	/* month of year */
54 #define RTC_YEAR	0x09	/* month of year */
55 
56 #define RTC_STATUSA	0x0a	/* status register A */
57 #define  RTCSA_TUP	 0x80	/* time update, don't look now */
58 #define  RTCSA_RESET	 0x70	/* reset divider */
59 #define  RTCSA_DIVIDER   0x20   /* divider correct for 32768 Hz */
60 #define  RTCSA_8192      0x03	/* 8192 Hz interrupt */
61 #define  RTCSA_4096      0x04
62 #define  RTCSA_2048      0x05
63 #define  RTCSA_1024      0x06	/* default for profiling */
64 #define  RTCSA_PROF      RTCSA_1024
65 #define  RTC_PROFRATE    1024
66 #define  RTCSA_512       0x07
67 #define  RTCSA_256       0x08
68 #define  RTCSA_128       0x09
69 #define  RTCSA_NOPROF	 RTCSA_128
70 #define  RTC_NOPROFRATE  128
71 #define  RTCSA_64        0x0a
72 #define  RTCSA_32        0x0b	/* 32 Hz interrupt */
73 
74 #define RTC_STATUSB	0x0b	/* status register B */
75 #define	 RTCSB_DST	 0x01	/* USA Daylight Savings Time enable */
76 #define	 RTCSB_24HR	 0x02	/* 0 = 12 hours, 1 = 24	hours */
77 #define	 RTCSB_BCD	 0x04	/* 0 = BCD, 1 =	Binary coded time */
78 #define	 RTCSB_SQWE	 0x08	/* 1 = output sqare wave at SQW	pin */
79 #define	 RTCSB_UINTR	 0x10	/* 1 = enable update-ended interrupt */
80 #define	 RTCSB_AINTR	 0x20	/* 1 = enable alarm interrupt */
81 #define	 RTCSB_PINTR	 0x40	/* 1 = enable periodic clock interrupt */
82 #define  RTCSB_HALT      0x80	/* stop clock updates */
83 
84 #define RTC_INTR	0x0c	/* status register C (R) interrupt source */
85 #define  RTCIR_UPDATE	 0x10	/* update intr */
86 #define  RTCIR_ALARM	 0x20	/* alarm intr */
87 #define  RTCIR_PERIOD	 0x40	/* periodic intr */
88 #define  RTCIR_INT	 0x80	/* interrupt output signal */
89 
90 #define RTC_STATUSD	0x0d	/* status register D (R) Lost Power */
91 #define  RTCSD_PWR	 0x80	/* clock power OK */
92 
93 #define RTC_DIAG	0x0e	/* status register E - bios diagnostic */
94 #define RTCDG_BITS	"\020\010clock_battery\007ROM_cksum\006config_unit\005memory_size\004fixed_disk\003invalid_time"
95 
96 #define RTC_RESET	0x0f	/* status register F - reset code byte */
97 #define	 RTCRS_RST	 0x00		/* normal reset */
98 #define	 RTCRS_LOAD	 0x04		/* load system */
99 
100 #define RTC_FDISKETTE	0x10	/* diskette drive type in upper/lower nibble */
101 #define	 RTCFDT_NONE	 0		/* none present */
102 #define	 RTCFDT_360K	 0x10		/* 360K */
103 #define	 RTCFDT_12M	 0x20		/* 1.2M */
104 #define  RTCFDT_720K     0x30           /* 720K */
105 #define	 RTCFDT_144M	 0x40		/* 1.44M */
106 #define  RTCFDT_288M_1   0x50		/* 2.88M, some BIOSes */
107 #define	 RTCFDT_288M	 0x60		/* 2.88M */
108 
109 #define RTC_BASELO	0x15	/* low byte of basemem size */
110 #define RTC_BASEHI	0x16	/* high byte of basemem size */
111 #define RTC_EXTLO	0x17	/* low byte of extended mem size */
112 #define RTC_EXTHI	0x18	/* low byte of extended mem size */
113 
114 #define	RTC_CENTURY	0x32	/* current century */
115 
116 #ifdef _KERNEL
117 extern  struct mtx atrtc_time_lock;
118 extern	int atrtcclock_disable;
119 int	rtcin(int reg);
120 void	atrtc_restore(void);
121 void	writertc(int reg, u_char val);
122 #endif
123 
124 #endif /* _I386_ISA_RTC_H_ */
125