xref: /freebsd/sys/isa/isareg.h (revision cfa84f46316d500ad9b4a7d62b98b498134d2584)
1 /*-
2  * Copyright (c) 1990 The Regents of the University of California.
3  * All rights reserved.
4  *
5  * This code is derived from software contributed to Berkeley by
6  * William Jolitz.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by the University of
19  *	California, Berkeley and its contributors.
20  * 4. Neither the name of the University nor the names of its contributors
21  *    may be used to endorse or promote products derived from this software
22  *    without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  *
36  *	from: @(#)isa.h	5.7 (Berkeley) 5/9/91
37  *	$Id: isareg.h,v 1.2 1999/01/06 05:49:30 yokota Exp $
38  */
39 
40 #ifdef PC98
41 #error isa.h is included from PC-9801 source
42 #endif
43 
44 #ifndef _ISA_ISA_H_
45 #define	_ISA_ISA_H_
46 
47 /* BEWARE:  Included in both assembler and C code */
48 
49 /*
50  * ISA Bus conventions
51  */
52 
53 /*
54  * Input / Output Port Assignments
55  */
56 #ifndef IO_ISABEGIN
57 #define	IO_ISABEGIN	0x000		/* 0x000 - Beginning of I/O Registers */
58 
59 		/* CPU Board */
60 #define	IO_DMA1		0x000		/* 8237A DMA Controller #1 */
61 #define	IO_ICU1		0x020		/* 8259A Interrupt Controller #1 */
62 #define	IO_PMP1		0x026		/* 82347 Power Management Peripheral */
63 #define	IO_TIMER1	0x040		/* 8253 Timer #1 */
64 #define	IO_TIMER2	0x048		/* 8253 Timer #2 */
65 #define	IO_KBD		0x060		/* 8042 Keyboard */
66 #define	IO_PPI		0x061		/* Programmable Peripheral Interface */
67 #define	IO_RTC		0x070		/* RTC */
68 #define	IO_NMI		IO_RTC		/* NMI Control */
69 #define	IO_DMAPG	0x080		/* DMA Page Registers */
70 #define	IO_ICU2		0x0A0		/* 8259A Interrupt Controller #2 */
71 #define	IO_DMA2		0x0C0		/* 8237A DMA Controller #2 */
72 #define	IO_NPX		0x0F0		/* Numeric Coprocessor */
73 
74 		/* Cards */
75 					/* 0x100 - 0x16F Open */
76 
77 #define	IO_WD2		0x170		/* Secondary Fixed Disk Controller */
78 
79 #define	IO_PMP2		0x178		/* 82347 Power Management Peripheral */
80 
81 					/* 0x17A - 0x1EF Open */
82 
83 #define	IO_WD1		0x1F0		/* Primary Fixed Disk Controller */
84 #define	IO_GAME		0x201		/* Game Controller */
85 
86 					/* 0x202 - 0x22A Open */
87 
88 #define	IO_ASC2		0x22B		/* AmiScan addr.grp. 2 */
89 
90 					/* 0x230 - 0x26A Open */
91 
92 #define	IO_ASC3		0x26B		/* AmiScan addr.grp. 3 */
93 #define	IO_GSC1		0x270 /* -- 0x27B! GeniScan GS-4500 addr.grp. 1 */
94 #define	IO_LPT2		0x278		/* Parallel Port #2 */
95 
96 					/* 0x280 - 0x2AA Open */
97 
98 #define	IO_ASC4		0x2AB		/* AmiScan addr.grp. 4 */
99 
100 					/* 0x2B0 - 0x2DF Open */
101 
102 #define	IO_GSC2		0x2E0		/* GeniScan GS-4500 addr.grp. 2 */
103 #define	IO_COM4		0x2E8		/* COM4 i/o address */
104 #define	IO_ASC5		0x2EB		/* AmiScan addr.grp. 5 */
105 
106 					/* 0x2F0 - 0x2F7 Open */
107 
108 #define	IO_COM2		0x2F8		/* COM2 i/o address */
109 
110 					/* 0x300 - 0x32A Open */
111 
112 #define	IO_ASC6		0x32B		/* AmiScan addr.grp. 6 */
113 #define	IO_AHA0		0x330		/* adaptec 1542 default addr. */
114 #define	IO_BT0		0x330		/* bustek 742a default addr. */
115 #define	IO_UHA0		0x330		/* ultrastore 14f default addr. */
116 #define	IO_AHA1		0x334		/* adaptec 1542 default addr. */
117 #define	IO_BT1		0x334		/* bustek 742a default addr. */
118 
119 					/* 0x340 - 0x36A Open */
120 
121 #define	IO_ASC7		0x36B		/* AmiScan addr.grp. 7 */
122 #define	IO_GSC3		0x370		/* GeniScan GS-4500 addr.grp. 3 */
123 #define	IO_FD2		0x370		/* secondary base i/o address */
124 #define	IO_LPT1		0x378		/* Parallel Port #1 */
125 
126 					/* 0x380 - 0x3AA Open */
127 
128 #define	IO_ASC8		0x3AB		/* AmiScan addr.grp. 8 */
129 #define	IO_MDA		0x3B0		/* Monochome Adapter */
130 #define	IO_LPT3		0x3BC		/* Monochome Adapter Printer Port */
131 #define	IO_VGA		0x3C0		/* E/VGA Ports */
132 #define	IO_CGA		0x3D0		/* CGA Ports */
133 #define	IO_GSC4		0x3E0		/* GeniScan GS-4500 addr.grp. 4 */
134 #define	IO_COM3		0x3E8		/* COM3 i/o address */
135 #define	IO_ASC1		0x3EB		/* AmiScan addr.grp. 1 */
136 #define	IO_FD1		0x3F0		/* primary base i/o address */
137 #define	IO_COM1		0x3F8		/* COM1 i/o address */
138 
139 #define	IO_ISAEND	0x3FF		/* End (actually Max) of I/O Regs */
140 #endif /* !IO_ISABEGIN */
141 
142 /*
143  * Input / Output Port Sizes - these are from several sources, and tend
144  * to be the larger of what was found.
145  */
146 #ifndef	IO_ISASIZES
147 #define	IO_ISASIZES
148 
149 #define	IO_ASCSIZE	5		/* AmiScan GI1904-based hand scanner */
150 #define	IO_CGASIZE	12		/* CGA controllers */
151 #define	IO_COMSIZE	8		/* 8250, 16x50 com controllers */
152 #define	IO_DMASIZE	16		/* 8237 DMA controllers */
153 #define	IO_DPGSIZE	32		/* 74LS612 DMA page registers */
154 #define	IO_EISASIZE	256		/* EISA controllers */
155 #define	IO_FDCSIZE	8		/* Nec765 floppy controllers */
156 #define	IO_GAMSIZE	16		/* AT compatible game controllers */
157 #define	IO_GSCSIZE	8		/* GeniScan GS-4500G hand scanner */
158 #define	IO_ICUSIZE	16		/* 8259A interrupt controllers */
159 #define	IO_KBDSIZE	16		/* 8042 Keyboard controllers */
160 #define	IO_LPTSIZE	8		/* LPT controllers, some use only 4 */
161 #define	IO_MDASIZE	12		/* Monochrome display controllers */
162 #define	IO_NPXSIZE	16		/* 80387/80487 NPX registers */
163 #define	IO_PMPSIZE	2		/* 82347 power management peripheral */
164 #define	IO_PSMSIZE	5		/* 8042 Keyboard controllers */
165 #define	IO_RTCSIZE	16		/* CMOS real time clock, NMI control */
166 #define	IO_TMRSIZE	16		/* 8253 programmable timers */
167 #define	IO_VGASIZE	16		/* VGA controllers */
168 #define	IO_WDCSIZE	8		/* WD compatible disk controllers */
169 
170 #endif /* !IO_ISASIZES */
171 
172 /*
173  * Input / Output Memory Physical Addresses
174  */
175 #ifndef	IOM_BEGIN
176 #define	IOM_BEGIN	0x0A0000	/* Start of I/O Memory "hole" */
177 #define	IOM_END		0x100000	/* End of I/O Memory "hole" */
178 #define	IOM_SIZE	(IOM_END - IOM_BEGIN)
179 #endif /* !IOM_BEGIN */
180 
181 /*
182  * RAM Physical Address Space (ignoring the above mentioned "hole")
183  */
184 #ifndef	RAM_BEGIN
185 #define	RAM_BEGIN	0x0000000	/* Start of RAM Memory */
186 #define	RAM_END		0x1000000	/* End of RAM Memory */
187 #define	RAM_SIZE	(RAM_END - RAM_BEGIN)
188 #endif /* !RAM_BEGIN */
189 
190 /*
191  * Oddball Physical Memory Addresses
192  */
193 #ifndef	COMPAQ_RAMRELOC
194 #define	COMPAQ_RAMRELOC	0x80C00000	/* Compaq RAM relocation/diag */
195 #define	COMPAQ_RAMSETUP	0x80C00002	/* Compaq RAM setup */
196 #define	WEITEK_FPU	0xC0000000	/* WTL 2167 */
197 #define	CYRIX_EMC	0xC0000000	/* Cyrix EMC */
198 #endif /* !COMPAQ_RAMRELOC */
199 
200 #endif /* !_ISA_ISA_H_ */
201