xref: /freebsd/sys/isa/isareg.h (revision cc7495b5c1c0dc1a0eb0128220ef454ccc87df47)
11a4290e7SDoug Rabson /*-
21a4290e7SDoug Rabson  * Copyright (c) 1990 The Regents of the University of California.
31a4290e7SDoug Rabson  * All rights reserved.
41a4290e7SDoug Rabson  *
51a4290e7SDoug Rabson  * This code is derived from software contributed to Berkeley by
61a4290e7SDoug Rabson  * William Jolitz.
71a4290e7SDoug Rabson  *
81a4290e7SDoug Rabson  * Redistribution and use in source and binary forms, with or without
91a4290e7SDoug Rabson  * modification, are permitted provided that the following conditions
101a4290e7SDoug Rabson  * are met:
111a4290e7SDoug Rabson  * 1. Redistributions of source code must retain the above copyright
121a4290e7SDoug Rabson  *    notice, this list of conditions and the following disclaimer.
131a4290e7SDoug Rabson  * 2. Redistributions in binary form must reproduce the above copyright
141a4290e7SDoug Rabson  *    notice, this list of conditions and the following disclaimer in the
151a4290e7SDoug Rabson  *    documentation and/or other materials provided with the distribution.
161a4290e7SDoug Rabson  * 3. All advertising materials mentioning features or use of this software
171a4290e7SDoug Rabson  *    must display the following acknowledgement:
181a4290e7SDoug Rabson  *	This product includes software developed by the University of
191a4290e7SDoug Rabson  *	California, Berkeley and its contributors.
201a4290e7SDoug Rabson  * 4. Neither the name of the University nor the names of its contributors
211a4290e7SDoug Rabson  *    may be used to endorse or promote products derived from this software
221a4290e7SDoug Rabson  *    without specific prior written permission.
231a4290e7SDoug Rabson  *
241a4290e7SDoug Rabson  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
251a4290e7SDoug Rabson  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
261a4290e7SDoug Rabson  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
271a4290e7SDoug Rabson  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
281a4290e7SDoug Rabson  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
291a4290e7SDoug Rabson  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
301a4290e7SDoug Rabson  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
311a4290e7SDoug Rabson  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
321a4290e7SDoug Rabson  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
331a4290e7SDoug Rabson  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
341a4290e7SDoug Rabson  * SUCH DAMAGE.
351a4290e7SDoug Rabson  *
361a4290e7SDoug Rabson  *	from: @(#)isa.h	5.7 (Berkeley) 5/9/91
37cc7495b5SKazutaka YOKOTA  *	$Id: isareg.h,v 1.1 1998/08/06 08:49:09 dfr Exp $
381a4290e7SDoug Rabson  */
391a4290e7SDoug Rabson 
401a4290e7SDoug Rabson #ifdef PC98
411a4290e7SDoug Rabson #error isa.h is included from PC-9801 source
421a4290e7SDoug Rabson #endif
431a4290e7SDoug Rabson 
441a4290e7SDoug Rabson #ifndef _I386_ISA_ISA_H_
451a4290e7SDoug Rabson #define	_I386_ISA_ISA_H_
461a4290e7SDoug Rabson 
471a4290e7SDoug Rabson /* BEWARE:  Included in both assembler and C code */
481a4290e7SDoug Rabson 
491a4290e7SDoug Rabson /*
501a4290e7SDoug Rabson  * ISA Bus conventions
511a4290e7SDoug Rabson  */
521a4290e7SDoug Rabson 
531a4290e7SDoug Rabson /*
541a4290e7SDoug Rabson  * Input / Output Port Assignments
551a4290e7SDoug Rabson  */
561a4290e7SDoug Rabson #ifndef IO_ISABEGIN
571a4290e7SDoug Rabson #define	IO_ISABEGIN	0x000		/* 0x000 - Beginning of I/O Registers */
581a4290e7SDoug Rabson 
591a4290e7SDoug Rabson 		/* CPU Board */
601a4290e7SDoug Rabson #define	IO_DMA1		0x000		/* 8237A DMA Controller #1 */
611a4290e7SDoug Rabson #define	IO_ICU1		0x020		/* 8259A Interrupt Controller #1 */
621a4290e7SDoug Rabson #define	IO_PMP1		0x026		/* 82347 Power Management Peripheral */
631a4290e7SDoug Rabson #define	IO_TIMER1	0x040		/* 8253 Timer #1 */
641a4290e7SDoug Rabson #define	IO_TIMER2	0x048		/* 8253 Timer #2 */
651a4290e7SDoug Rabson #define	IO_KBD		0x060		/* 8042 Keyboard */
661a4290e7SDoug Rabson #define	IO_PPI		0x061		/* Programmable Peripheral Interface */
671a4290e7SDoug Rabson #define	IO_RTC		0x070		/* RTC */
681a4290e7SDoug Rabson #define	IO_NMI		IO_RTC		/* NMI Control */
691a4290e7SDoug Rabson #define	IO_DMAPG	0x080		/* DMA Page Registers */
701a4290e7SDoug Rabson #define	IO_ICU2		0x0A0		/* 8259A Interrupt Controller #2 */
711a4290e7SDoug Rabson #define	IO_DMA2		0x0C0		/* 8237A DMA Controller #2 */
721a4290e7SDoug Rabson #define	IO_NPX		0x0F0		/* Numeric Coprocessor */
731a4290e7SDoug Rabson 
741a4290e7SDoug Rabson 		/* Cards */
751a4290e7SDoug Rabson 					/* 0x100 - 0x16F Open */
761a4290e7SDoug Rabson 
771a4290e7SDoug Rabson #define	IO_WD2		0x170		/* Secondary Fixed Disk Controller */
781a4290e7SDoug Rabson 
791a4290e7SDoug Rabson #define	IO_PMP2		0x178		/* 82347 Power Management Peripheral */
801a4290e7SDoug Rabson 
811a4290e7SDoug Rabson 					/* 0x17A - 0x1EF Open */
821a4290e7SDoug Rabson 
831a4290e7SDoug Rabson #define	IO_WD1		0x1F0		/* Primary Fixed Disk Controller */
841a4290e7SDoug Rabson #define	IO_GAME		0x201		/* Game Controller */
851a4290e7SDoug Rabson 
861a4290e7SDoug Rabson 					/* 0x202 - 0x22A Open */
871a4290e7SDoug Rabson 
881a4290e7SDoug Rabson #define	IO_ASC2		0x22B		/* AmiScan addr.grp. 2 */
891a4290e7SDoug Rabson 
901a4290e7SDoug Rabson 					/* 0x230 - 0x26A Open */
911a4290e7SDoug Rabson 
921a4290e7SDoug Rabson #define	IO_ASC3		0x26B		/* AmiScan addr.grp. 3 */
931a4290e7SDoug Rabson #define	IO_GSC1		0x270 /* -- 0x27B! GeniScan GS-4500 addr.grp. 1 */
941a4290e7SDoug Rabson #define	IO_LPT2		0x278		/* Parallel Port #2 */
951a4290e7SDoug Rabson 
961a4290e7SDoug Rabson 					/* 0x280 - 0x2AA Open */
971a4290e7SDoug Rabson 
981a4290e7SDoug Rabson #define	IO_ASC4		0x2AB		/* AmiScan addr.grp. 4 */
991a4290e7SDoug Rabson 
1001a4290e7SDoug Rabson 					/* 0x2B0 - 0x2DF Open */
1011a4290e7SDoug Rabson 
1021a4290e7SDoug Rabson #define	IO_GSC2		0x2E0		/* GeniScan GS-4500 addr.grp. 2 */
1031a4290e7SDoug Rabson #define	IO_COM4		0x2E8		/* COM4 i/o address */
1041a4290e7SDoug Rabson #define	IO_ASC5		0x2EB		/* AmiScan addr.grp. 5 */
1051a4290e7SDoug Rabson 
1061a4290e7SDoug Rabson 					/* 0x2F0 - 0x2F7 Open */
1071a4290e7SDoug Rabson 
1081a4290e7SDoug Rabson #define	IO_COM2		0x2F8		/* COM2 i/o address */
1091a4290e7SDoug Rabson 
1101a4290e7SDoug Rabson 					/* 0x300 - 0x32A Open */
1111a4290e7SDoug Rabson 
1121a4290e7SDoug Rabson #define	IO_ASC6		0x32B		/* AmiScan addr.grp. 6 */
1131a4290e7SDoug Rabson #define	IO_AHA0		0x330		/* adaptec 1542 default addr. */
1141a4290e7SDoug Rabson #define	IO_BT0		0x330		/* bustek 742a default addr. */
1151a4290e7SDoug Rabson #define	IO_UHA0		0x330		/* ultrastore 14f default addr. */
1161a4290e7SDoug Rabson #define	IO_AHA1		0x334		/* adaptec 1542 default addr. */
1171a4290e7SDoug Rabson #define	IO_BT1		0x334		/* bustek 742a default addr. */
1181a4290e7SDoug Rabson 
1191a4290e7SDoug Rabson 					/* 0x340 - 0x36A Open */
1201a4290e7SDoug Rabson 
1211a4290e7SDoug Rabson #define	IO_ASC7		0x36B		/* AmiScan addr.grp. 7 */
1221a4290e7SDoug Rabson #define	IO_GSC3		0x370		/* GeniScan GS-4500 addr.grp. 3 */
1231a4290e7SDoug Rabson #define	IO_FD2		0x370		/* secondary base i/o address */
1241a4290e7SDoug Rabson #define	IO_LPT1		0x378		/* Parallel Port #1 */
1251a4290e7SDoug Rabson 
1261a4290e7SDoug Rabson 					/* 0x380 - 0x3AA Open */
1271a4290e7SDoug Rabson 
1281a4290e7SDoug Rabson #define	IO_ASC8		0x3AB		/* AmiScan addr.grp. 8 */
1291a4290e7SDoug Rabson #define	IO_MDA		0x3B0		/* Monochome Adapter */
1301a4290e7SDoug Rabson #define	IO_LPT3		0x3BC		/* Monochome Adapter Printer Port */
1311a4290e7SDoug Rabson #define	IO_VGA		0x3C0		/* E/VGA Ports */
1321a4290e7SDoug Rabson #define	IO_CGA		0x3D0		/* CGA Ports */
1331a4290e7SDoug Rabson #define	IO_GSC4		0x3E0		/* GeniScan GS-4500 addr.grp. 4 */
1341a4290e7SDoug Rabson #define	IO_COM3		0x3E8		/* COM3 i/o address */
1351a4290e7SDoug Rabson #define	IO_ASC1		0x3EB		/* AmiScan addr.grp. 1 */
1361a4290e7SDoug Rabson #define	IO_FD1		0x3F0		/* primary base i/o address */
1371a4290e7SDoug Rabson #define	IO_COM1		0x3F8		/* COM1 i/o address */
1381a4290e7SDoug Rabson 
1391a4290e7SDoug Rabson #define	IO_ISAEND	0x3FF		/* End (actually Max) of I/O Regs */
1401a4290e7SDoug Rabson #endif /* !IO_ISABEGIN */
1411a4290e7SDoug Rabson 
1421a4290e7SDoug Rabson /*
1431a4290e7SDoug Rabson  * Input / Output Port Sizes - these are from several sources, and tend
1441a4290e7SDoug Rabson  * to be the larger of what was found.
1451a4290e7SDoug Rabson  */
1461a4290e7SDoug Rabson #ifndef	IO_ISASIZES
1471a4290e7SDoug Rabson #define	IO_ISASIZES
1481a4290e7SDoug Rabson 
1491a4290e7SDoug Rabson #define	IO_ASCSIZE	5		/* AmiScan GI1904-based hand scanner */
150cc7495b5SKazutaka YOKOTA #define	IO_CGASIZE	12		/* CGA controllers */
1511a4290e7SDoug Rabson #define	IO_COMSIZE	8		/* 8250, 16x50 com controllers */
1521a4290e7SDoug Rabson #define	IO_DMASIZE	16		/* 8237 DMA controllers */
1531a4290e7SDoug Rabson #define	IO_DPGSIZE	32		/* 74LS612 DMA page registers */
1541a4290e7SDoug Rabson #define	IO_EISASIZE	256		/* EISA controllers */
1551a4290e7SDoug Rabson #define	IO_FDCSIZE	8		/* Nec765 floppy controllers */
1561a4290e7SDoug Rabson #define	IO_GAMSIZE	16		/* AT compatible game controllers */
1571a4290e7SDoug Rabson #define	IO_GSCSIZE	8		/* GeniScan GS-4500G hand scanner */
1581a4290e7SDoug Rabson #define	IO_ICUSIZE	16		/* 8259A interrupt controllers */
1591a4290e7SDoug Rabson #define	IO_KBDSIZE	16		/* 8042 Keyboard controllers */
1601a4290e7SDoug Rabson #define	IO_LPTSIZE	8		/* LPT controllers, some use only 4 */
161cc7495b5SKazutaka YOKOTA #define	IO_MDASIZE	12		/* Monochrome display controllers */
1621a4290e7SDoug Rabson #define	IO_NPXSIZE	16		/* 80387/80487 NPX registers */
1631a4290e7SDoug Rabson #define	IO_PMPSIZE	2		/* 82347 power management peripheral */
164cc7495b5SKazutaka YOKOTA #define	IO_PSMSIZE	5		/* 8042 Keyboard controllers */
1651a4290e7SDoug Rabson #define	IO_RTCSIZE	16		/* CMOS real time clock, NMI control */
1661a4290e7SDoug Rabson #define	IO_TMRSIZE	16		/* 8253 programmable timers */
1671a4290e7SDoug Rabson #define	IO_VGASIZE	16		/* VGA controllers */
1681a4290e7SDoug Rabson #define	IO_WDCSIZE	8		/* WD compatible disk controllers */
1691a4290e7SDoug Rabson 
1701a4290e7SDoug Rabson #endif /* !IO_ISASIZES */
1711a4290e7SDoug Rabson 
1721a4290e7SDoug Rabson /*
1731a4290e7SDoug Rabson  * Input / Output Memory Physical Addresses
1741a4290e7SDoug Rabson  */
1751a4290e7SDoug Rabson #ifndef	IOM_BEGIN
1761a4290e7SDoug Rabson #define	IOM_BEGIN	0x0A0000	/* Start of I/O Memory "hole" */
1771a4290e7SDoug Rabson #define	IOM_END		0x100000	/* End of I/O Memory "hole" */
1781a4290e7SDoug Rabson #define	IOM_SIZE	(IOM_END - IOM_BEGIN)
1791a4290e7SDoug Rabson #endif /* !IOM_BEGIN */
1801a4290e7SDoug Rabson 
1811a4290e7SDoug Rabson /*
1821a4290e7SDoug Rabson  * RAM Physical Address Space (ignoring the above mentioned "hole")
1831a4290e7SDoug Rabson  */
1841a4290e7SDoug Rabson #ifndef	RAM_BEGIN
1851a4290e7SDoug Rabson #define	RAM_BEGIN	0x0000000	/* Start of RAM Memory */
1861a4290e7SDoug Rabson #define	RAM_END		0x1000000	/* End of RAM Memory */
1871a4290e7SDoug Rabson #define	RAM_SIZE	(RAM_END - RAM_BEGIN)
1881a4290e7SDoug Rabson #endif /* !RAM_BEGIN */
1891a4290e7SDoug Rabson 
1901a4290e7SDoug Rabson /*
1911a4290e7SDoug Rabson  * Oddball Physical Memory Addresses
1921a4290e7SDoug Rabson  */
1931a4290e7SDoug Rabson #ifndef	COMPAQ_RAMRELOC
1941a4290e7SDoug Rabson #define	COMPAQ_RAMRELOC	0x80C00000	/* Compaq RAM relocation/diag */
1951a4290e7SDoug Rabson #define	COMPAQ_RAMSETUP	0x80C00002	/* Compaq RAM setup */
1961a4290e7SDoug Rabson #define	WEITEK_FPU	0xC0000000	/* WTL 2167 */
1971a4290e7SDoug Rabson #define	CYRIX_EMC	0xC0000000	/* Cyrix EMC */
1981a4290e7SDoug Rabson #endif /* !COMPAQ_RAMRELOC */
1991a4290e7SDoug Rabson 
2001a4290e7SDoug Rabson #endif /* !_I386_ISA_ISA_H_ */
201