1 /***************************************************************************** 2 * i386/xen/xen-os.h 3 * 4 * Random collection of macros and definition 5 * 6 * Copyright (c) 2003, 2004 Keir Fraser (on behalf of the Xen team) 7 * All rights reserved. 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a copy 10 * of this software and associated documentation files (the "Software"), to 11 * deal in the Software without restriction, including without limitation the 12 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 13 * sell copies of the Software, and to permit persons to whom the Software is 14 * furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 22 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 25 * DEALINGS IN THE SOFTWARE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #ifndef _MACHINE_XEN_XEN_OS_H_ 31 #define _MACHINE_XEN_XEN_OS_H_ 32 33 #ifdef PAE 34 #define CONFIG_X86_PAE 35 #endif 36 37 /* Everything below this point is not included by assembler (.S) files. */ 38 #ifndef __ASSEMBLY__ 39 40 /* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */ 41 static inline void rep_nop(void) 42 { 43 __asm__ __volatile__ ( "rep;nop" : : : "memory" ); 44 } 45 #define cpu_relax() rep_nop() 46 47 #ifndef XENHVM 48 49 #ifdef SMP 50 extern int gdtset; 51 52 #include <sys/time.h> /* XXX for pcpu.h */ 53 #include <sys/pcpu.h> /* XXX for PCPU_GET */ 54 static inline int 55 smp_processor_id(void) 56 { 57 if (__predict_true(gdtset)) 58 return PCPU_GET(cpuid); 59 return 0; 60 } 61 62 #else 63 #define smp_processor_id() 0 64 #endif 65 66 #ifndef PANIC_IF 67 #define PANIC_IF(exp) if (__predict_false(exp)) {printf("panic - %s: %s:%d\n",#exp, __FILE__, __LINE__); panic("%s: %s:%d", #exp, __FILE__, __LINE__);} 68 #endif 69 70 /* 71 * Crude memory allocator for memory allocation early in boot. 72 */ 73 void *bootmem_alloc(unsigned int size); 74 void bootmem_free(void *ptr, unsigned int size); 75 76 /* 77 * STI/CLI equivalents. These basically set and clear the virtual 78 * event_enable flag in the shared_info structure. Note that when 79 * the enable bit is set, there may be pending events to be handled. 80 * We may therefore call into do_hypervisor_callback() directly. 81 */ 82 83 #define __cli() \ 84 do { \ 85 vcpu_info_t *_vcpu; \ 86 _vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()]; \ 87 _vcpu->evtchn_upcall_mask = 1; \ 88 barrier(); \ 89 } while (0) 90 91 #define __sti() \ 92 do { \ 93 vcpu_info_t *_vcpu; \ 94 barrier(); \ 95 _vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()]; \ 96 _vcpu->evtchn_upcall_mask = 0; \ 97 barrier(); /* unmask then check (avoid races) */ \ 98 if (__predict_false(_vcpu->evtchn_upcall_pending)) \ 99 force_evtchn_callback(); \ 100 } while (0) 101 102 #define __restore_flags(x) \ 103 do { \ 104 vcpu_info_t *_vcpu; \ 105 barrier(); \ 106 _vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()]; \ 107 if ((_vcpu->evtchn_upcall_mask = (x)) == 0) { \ 108 barrier(); /* unmask then check (avoid races) */ \ 109 if (__predict_false(_vcpu->evtchn_upcall_pending)) \ 110 force_evtchn_callback(); \ 111 } \ 112 } while (0) 113 114 /* 115 * Add critical_{enter, exit}? 116 * 117 */ 118 #define __save_and_cli(x) \ 119 do { \ 120 vcpu_info_t *_vcpu; \ 121 _vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()]; \ 122 (x) = _vcpu->evtchn_upcall_mask; \ 123 _vcpu->evtchn_upcall_mask = 1; \ 124 barrier(); \ 125 } while (0) 126 127 128 #define cli() __cli() 129 #define sti() __sti() 130 #define save_flags(x) __save_flags(x) 131 #define restore_flags(x) __restore_flags(x) 132 #define save_and_cli(x) __save_and_cli(x) 133 134 #define local_irq_save(x) __save_and_cli(x) 135 #define local_irq_restore(x) __restore_flags(x) 136 #define local_irq_disable() __cli() 137 #define local_irq_enable() __sti() 138 139 #define mtx_lock_irqsave(lock, x) {local_irq_save((x)); mtx_lock_spin((lock));} 140 #define mtx_unlock_irqrestore(lock, x) {mtx_unlock_spin((lock)); local_irq_restore((x)); } 141 #define spin_lock_irqsave mtx_lock_irqsave 142 #define spin_unlock_irqrestore mtx_unlock_irqrestore 143 144 #endif /* !XENHVM */ 145 146 /* This is a barrier for the compiler only, NOT the processor! */ 147 #define barrier() __asm__ __volatile__("": : :"memory") 148 149 #define LOCK_PREFIX "" 150 #define LOCK "" 151 #define ADDR (*(volatile long *) addr) 152 /* 153 * Make sure gcc doesn't try to be clever and move things around 154 * on us. We need to use _exactly_ the address the user gave us, 155 * not some alias that contains the same information. 156 */ 157 typedef struct { volatile int counter; } atomic_t; 158 159 #define xen_xchg(ptr,v) \ 160 ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr)))) 161 struct __xchg_dummy { unsigned long a[100]; }; 162 #define __xg(x) ((volatile struct __xchg_dummy *)(x)) 163 static __inline unsigned long __xchg(unsigned long x, volatile void * ptr, 164 int size) 165 { 166 switch (size) { 167 case 1: 168 __asm__ __volatile__("xchgb %b0,%1" 169 :"=q" (x) 170 :"m" (*__xg(ptr)), "0" (x) 171 :"memory"); 172 break; 173 case 2: 174 __asm__ __volatile__("xchgw %w0,%1" 175 :"=r" (x) 176 :"m" (*__xg(ptr)), "0" (x) 177 :"memory"); 178 break; 179 case 4: 180 __asm__ __volatile__("xchgl %0,%1" 181 :"=r" (x) 182 :"m" (*__xg(ptr)), "0" (x) 183 :"memory"); 184 break; 185 } 186 return x; 187 } 188 189 /** 190 * test_and_clear_bit - Clear a bit and return its old value 191 * @nr: Bit to set 192 * @addr: Address to count from 193 * 194 * This operation is atomic and cannot be reordered. 195 * It also implies a memory barrier. 196 */ 197 static __inline int test_and_clear_bit(int nr, volatile void * addr) 198 { 199 int oldbit; 200 201 __asm__ __volatile__( LOCK_PREFIX 202 "btrl %2,%1\n\tsbbl %0,%0" 203 :"=r" (oldbit),"=m" (ADDR) 204 :"Ir" (nr) : "memory"); 205 return oldbit; 206 } 207 208 static __inline int constant_test_bit(int nr, const volatile void * addr) 209 { 210 return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0; 211 } 212 213 static __inline int variable_test_bit(int nr, volatile void * addr) 214 { 215 int oldbit; 216 217 __asm__ __volatile__( 218 "btl %2,%1\n\tsbbl %0,%0" 219 :"=r" (oldbit) 220 :"m" (ADDR),"Ir" (nr)); 221 return oldbit; 222 } 223 224 #define test_bit(nr,addr) \ 225 (__builtin_constant_p(nr) ? \ 226 constant_test_bit((nr),(addr)) : \ 227 variable_test_bit((nr),(addr))) 228 229 230 /** 231 * set_bit - Atomically set a bit in memory 232 * @nr: the bit to set 233 * @addr: the address to start counting from 234 * 235 * This function is atomic and may not be reordered. See __set_bit() 236 * if you do not require the atomic guarantees. 237 * Note that @nr may be almost arbitrarily large; this function is not 238 * restricted to acting on a single-word quantity. 239 */ 240 static __inline__ void set_bit(int nr, volatile void * addr) 241 { 242 __asm__ __volatile__( LOCK_PREFIX 243 "btsl %1,%0" 244 :"=m" (ADDR) 245 :"Ir" (nr)); 246 } 247 248 /** 249 * clear_bit - Clears a bit in memory 250 * @nr: Bit to clear 251 * @addr: Address to start counting from 252 * 253 * clear_bit() is atomic and may not be reordered. However, it does 254 * not contain a memory barrier, so if it is used for locking purposes, 255 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit() 256 * in order to ensure changes are visible on other processors. 257 */ 258 static __inline__ void clear_bit(int nr, volatile void * addr) 259 { 260 __asm__ __volatile__( LOCK_PREFIX 261 "btrl %1,%0" 262 :"=m" (ADDR) 263 :"Ir" (nr)); 264 } 265 266 /** 267 * atomic_inc - increment atomic variable 268 * @v: pointer of type atomic_t 269 * 270 * Atomically increments @v by 1. Note that the guaranteed 271 * useful range of an atomic_t is only 24 bits. 272 */ 273 static __inline__ void atomic_inc(atomic_t *v) 274 { 275 __asm__ __volatile__( 276 LOCK "incl %0" 277 :"=m" (v->counter) 278 :"m" (v->counter)); 279 } 280 281 282 #define rdtscll(val) \ 283 __asm__ __volatile__("rdtsc" : "=A" (val)) 284 285 #endif /* !__ASSEMBLY__ */ 286 287 #endif /* _MACHINE_XEN_XEN_OS_H_ */ 288