xref: /freebsd/sys/i386/include/pmc_mdep.h (revision f4b37ed0f8b307b1f3f0f630ca725d68f1dff30d)
1 /*-
2  * Copyright (c) 2003-2005,2008 Joseph Koshy
3  * Copyright (c) 2007 The FreeBSD Foundation
4  * All rights reserved.
5  *
6  * Portions of this software were developed by A. Joseph Koshy under
7  * sponsorship from the FreeBSD Foundation and Google, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * $FreeBSD$
31  */
32 
33 #ifndef _MACHINE_PMC_MDEP_H
34 #define	_MACHINE_PMC_MDEP_H 1
35 
36 #ifdef	_KERNEL
37 struct pmc_mdep;
38 #endif
39 
40 /*
41  * On the i386 platform we support the following PMCs.
42  *
43  * TSC		The timestamp counter
44  * K7		AMD Athlon XP/MP and other 32 bit processors.
45  * K8		AMD Athlon64 and Opteron PMCs in 32 bit mode.
46  * PIV		Intel P4/HTT and P4/EMT64
47  * PPRO		Intel Pentium Pro, Pentium-II, Pentium-III, Celeron and
48  *		Pentium-M processors
49  * PENTIUM	Intel Pentium MMX.
50  * IAP		Intel Core/Core2/Atom programmable PMCs.
51  * IAF		Intel fixed-function PMCs.
52  * UCP		Intel Uncore programmable PMCs.
53  * UCF		Intel Uncore fixed-function PMCs.
54  */
55 
56 #include <dev/hwpmc/hwpmc_amd.h> /* K7 and K8 */
57 #include <dev/hwpmc/hwpmc_core.h>
58 #include <dev/hwpmc/hwpmc_piv.h>
59 #include <dev/hwpmc/hwpmc_ppro.h>
60 #include <dev/hwpmc/hwpmc_pentium.h>
61 #include <dev/hwpmc/hwpmc_tsc.h>
62 #include <dev/hwpmc/hwpmc_uncore.h>
63 
64 /*
65  * Intel processors implementing V2 and later of the Intel performance
66  * measurement architecture have PMCs of the following classes: TSC,
67  * IAF, IAP, UCF and UCP.
68  */
69 #define	PMC_MDEP_CLASS_INDEX_TSC	1
70 #define	PMC_MDEP_CLASS_INDEX_K7		2
71 #define	PMC_MDEP_CLASS_INDEX_K8		2
72 #define	PMC_MDEP_CLASS_INDEX_P4		2
73 #define	PMC_MDEP_CLASS_INDEX_P5		2
74 #define	PMC_MDEP_CLASS_INDEX_P6		2
75 #define	PMC_MDEP_CLASS_INDEX_IAP	2
76 #define	PMC_MDEP_CLASS_INDEX_IAF	3
77 #define	PMC_MDEP_CLASS_INDEX_UCP	4
78 #define	PMC_MDEP_CLASS_INDEX_UCF	5
79 
80 /*
81  * Architecture specific extensions to <sys/pmc.h> structures.
82  */
83 
84 union pmc_md_op_pmcallocate  {
85 	struct pmc_md_amd_op_pmcallocate	pm_amd;
86 	struct pmc_md_iaf_op_pmcallocate	pm_iaf;
87 	struct pmc_md_iap_op_pmcallocate	pm_iap;
88 	struct pmc_md_ucf_op_pmcallocate	pm_ucf;
89 	struct pmc_md_ucp_op_pmcallocate	pm_ucp;
90 	struct pmc_md_p4_op_pmcallocate		pm_p4;
91 	struct pmc_md_pentium_op_pmcallocate	pm_pentium;
92 	struct pmc_md_ppro_op_pmcallocate	pm_ppro;
93 	uint64_t				__pad[4];
94 };
95 
96 /* Logging */
97 #define	PMCLOG_READADDR		PMCLOG_READ32
98 #define	PMCLOG_EMITADDR		PMCLOG_EMIT32
99 
100 #ifdef _KERNEL
101 
102 /* MD extension for 'struct pmc' */
103 union pmc_md_pmc  {
104 	struct pmc_md_amd_pmc	pm_amd;
105 	struct pmc_md_iaf_pmc	pm_iaf;
106 	struct pmc_md_iap_pmc	pm_iap;
107 	struct pmc_md_ucf_pmc	pm_ucf;
108 	struct pmc_md_ucp_pmc	pm_ucp;
109 	struct pmc_md_p4_pmc	pm_p4;
110 	struct pmc_md_pentium_pmc pm_pentium;
111 	struct pmc_md_ppro_pmc	pm_ppro;
112 };
113 
114 struct pmc;
115 struct pmc_mdep;
116 
117 #define	PMC_TRAPFRAME_TO_PC(TF)	((TF)->tf_eip)
118 #define	PMC_TRAPFRAME_TO_FP(TF)	((TF)->tf_ebp)
119 
120 /*
121  * The layout of the stack frame on entry into the NMI handler depends on
122  * whether a privilege level change (and consequent stack switch) was
123  * required for entry.
124  *
125  * When processing an interrupt when in user mode, the processor switches
126  * stacks, and saves the user mode stack pointer on the kernel stack.  The
127  * user mode stack pointer is then available to the interrupt handler
128  * at frame->tf_esp.
129  *
130  * When processing an interrupt while in kernel mode, the processor
131  * continues to use the existing (kernel) stack.  Therefore we determine
132  * the stack pointer for the interrupted kernel procedure by adding an
133  * offset to the current frame pointer.
134  */
135 
136 #define	PMC_TRAPFRAME_TO_USER_SP(TF)	((TF)->tf_esp)
137 #define	PMC_TRAPFRAME_TO_KERNEL_SP(TF)	((uintptr_t) &((TF)->tf_esp))
138 
139 #define	PMC_IN_KERNEL_STACK(S,START,END)		\
140 	((S) >= (START) && (S) < (END))
141 #define	PMC_IN_KERNEL(va)	INKERNEL(va)
142 
143 #define	PMC_IN_USERSPACE(va) ((va) <= VM_MAXUSER_ADDRESS)
144 
145 #define	PMC_IN_TRAP_HANDLER(PC) 			\
146 	((PC) >= (uintptr_t) start_exceptions &&	\
147 	 (PC) < (uintptr_t) end_exceptions)
148 
149 #define	PMC_AT_FUNCTION_PROLOGUE_PUSH_BP(I)		\
150 	(((I) & 0x00ffffff) == 0xe58955) /* pushl %ebp; movl %esp,%ebp */
151 #define	PMC_AT_FUNCTION_PROLOGUE_MOV_SP_BP(I)		\
152 	(((I) & 0x0000ffff) == 0xe589)	/* movl %esp,%ebp */
153 #define	PMC_AT_FUNCTION_EPILOGUE_RET(I)			\
154 	(((I) & 0xFF) == 0xC3)		   /* ret */
155 
156 /* Build a fake kernel trapframe from current instruction pointer. */
157 #define PMC_FAKE_TRAPFRAME(TF)						\
158 	do {								\
159 	(TF)->tf_cs = 0; (TF)->tf_eflags = 0;				\
160 	__asm __volatile("movl %%ebp,%0" : "=r" ((TF)->tf_ebp));	\
161 	__asm __volatile("movl %%esp,%0" : "=r" ((TF)->tf_esp));	\
162 	__asm __volatile("call 1f \n\t1: pop %0" : "=r"((TF)->tf_eip));	\
163 	} while (0)
164 
165 /*
166  * Prototypes
167  */
168 
169 void	start_exceptions(void), end_exceptions(void);
170 
171 struct pmc_mdep *pmc_amd_initialize(void);
172 void	pmc_amd_finalize(struct pmc_mdep *_md);
173 struct pmc_mdep *pmc_intel_initialize(void);
174 void	pmc_intel_finalize(struct pmc_mdep *_md);
175 
176 #endif /* _KERNEL */
177 #endif /* _MACHINE_PMC_MDEP_H */
178