1 /*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * the Systems Programming Group of the University of Utah Computer 7 * Science Department and William Jolitz of UUNET Technologies Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * Derived from hp300 version by Mike Hibler, this version by William 34 * Jolitz uses a recursive map [a pde points to the page directory] to 35 * map the page tables using the pagetables themselves. This is done to 36 * reduce the impact on kernel virtual memory for lots of sparse address 37 * space, and to reduce the cost of memory to each process. 38 * 39 * from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90 40 * from: @(#)pmap.h 7.4 (Berkeley) 5/12/91 41 * $FreeBSD$ 42 */ 43 44 #ifndef _MACHINE_PMAP_H_ 45 #define _MACHINE_PMAP_H_ 46 47 /* 48 * Page-directory and page-table entries follow this format, with a few 49 * of the fields not present here and there, depending on a lot of things. 50 */ 51 /* ---- Intel Nomenclature ---- */ 52 #define PG_V 0x001 /* P Valid */ 53 #define PG_RW 0x002 /* R/W Read/Write */ 54 #define PG_U 0x004 /* U/S User/Supervisor */ 55 #define PG_NC_PWT 0x008 /* PWT Write through */ 56 #define PG_NC_PCD 0x010 /* PCD Cache disable */ 57 #define PG_A 0x020 /* A Accessed */ 58 #define PG_M 0x040 /* D Dirty */ 59 #define PG_PS 0x080 /* PS Page size (0=4k,1=4M) */ 60 #define PG_PTE_PAT 0x080 /* PAT PAT index */ 61 #define PG_G 0x100 /* G Global */ 62 #define PG_AVAIL1 0x200 /* / Available for system */ 63 #define PG_AVAIL2 0x400 /* < programmers use */ 64 #define PG_AVAIL3 0x800 /* \ */ 65 #define PG_PDE_PAT 0x1000 /* PAT PAT index */ 66 67 68 /* Our various interpretations of the above */ 69 #define PG_W PG_AVAIL1 /* "Wired" pseudoflag */ 70 #define PG_MANAGED PG_AVAIL2 71 #define PG_FRAME (~((vm_paddr_t)PAGE_MASK)) 72 #define PG_PROT (PG_RW|PG_U) /* all protection bits . */ 73 #define PG_N (PG_NC_PWT|PG_NC_PCD) /* Non-cacheable */ 74 75 /* 76 * Page Protection Exception bits 77 */ 78 79 #define PGEX_P 0x01 /* Protection violation vs. not present */ 80 #define PGEX_W 0x02 /* during a Write cycle */ 81 #define PGEX_U 0x04 /* access from User mode (UPL) */ 82 83 /* 84 * Size of Kernel address space. This is the number of page table pages 85 * (4MB each) to use for the kernel. 256 pages == 1 Gigabyte. 86 * This **MUST** be a multiple of 4 (eg: 252, 256, 260, etc). 87 */ 88 #ifndef KVA_PAGES 89 #ifdef PAE 90 #define KVA_PAGES 512 91 #else 92 #define KVA_PAGES 256 93 #endif 94 #endif 95 96 /* 97 * Pte related macros 98 */ 99 #define VADDR(pdi, pti) ((vm_offset_t)(((pdi)<<PDRSHIFT)|((pti)<<PAGE_SHIFT))) 100 101 /* Actual number of kernel page tables */ 102 #ifndef NKPT 103 #ifdef PAE 104 #define NKPT 240 /* Enough for 16GB (2MB page tables) */ 105 #else 106 #define NKPT 30 /* Enough for 4GB (4MB page tables) */ 107 #endif 108 #endif 109 #ifndef NKPDE 110 #ifdef SMP 111 #define NKPDE (KVA_PAGES - 1) /* number of page tables/pde's */ 112 #else 113 #define NKPDE (KVA_PAGES) /* number of page tables/pde's */ 114 #endif 115 #endif 116 117 /* 118 * The *PTDI values control the layout of virtual memory 119 * 120 * XXX This works for now, but I am not real happy with it, I'll fix it 121 * right after I fix locore.s and the magic 28K hole 122 * 123 * SMP_PRIVPAGES: The per-cpu address space is 0xff80000 -> 0xffbfffff 124 */ 125 #ifdef SMP 126 #define MPPTDI (NPDEPTD-1) /* per cpu ptd entry */ 127 #define KPTDI (MPPTDI-NKPDE) /* start of kernel virtual pde's */ 128 #else 129 #define KPTDI (NPDEPTD-NKPDE)/* start of kernel virtual pde's */ 130 #endif /* SMP */ 131 #define PTDPTDI (KPTDI-NPGPTD) /* ptd entry that points to ptd! */ 132 133 /* 134 * XXX doesn't really belong here I guess... 135 */ 136 #define ISA_HOLE_START 0xa0000 137 #define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START) 138 139 #ifndef LOCORE 140 141 #include <sys/queue.h> 142 #include <sys/_lock.h> 143 #include <sys/_mutex.h> 144 145 #ifdef PAE 146 147 typedef uint64_t pdpt_entry_t; 148 typedef uint64_t pd_entry_t; 149 typedef uint64_t pt_entry_t; 150 151 #define PTESHIFT (3) 152 #define PDESHIFT (3) 153 154 #else 155 156 typedef uint32_t pd_entry_t; 157 typedef uint32_t pt_entry_t; 158 159 #define PTESHIFT (2) 160 #define PDESHIFT (2) 161 162 #endif 163 164 /* 165 * Address of current and alternate address space page table maps 166 * and directories. 167 */ 168 #ifdef _KERNEL 169 extern pt_entry_t PTmap[]; 170 extern pd_entry_t PTD[]; 171 extern pd_entry_t PTDpde[]; 172 173 #ifdef PAE 174 extern pdpt_entry_t *IdlePDPT; 175 #endif 176 extern pd_entry_t *IdlePTD; /* physical address of "Idle" state directory */ 177 #endif 178 179 #ifdef _KERNEL 180 /* 181 * virtual address to page table entry and 182 * to physical address. 183 * Note: these work recursively, thus vtopte of a pte will give 184 * the corresponding pde that in turn maps it. 185 */ 186 #define vtopte(va) (PTmap + i386_btop(va)) 187 #define vtophys(va) pmap_kextract((vm_offset_t)(va)) 188 189 /* 190 * Routine: pmap_kextract 191 * Function: 192 * Extract the physical page address associated 193 * kernel virtual address. 194 */ 195 static __inline vm_paddr_t 196 pmap_kextract(vm_offset_t va) 197 { 198 vm_paddr_t pa; 199 200 if ((pa = PTD[va >> PDRSHIFT]) & PG_PS) { 201 pa = (pa & ~(NBPDR - 1)) | (va & (NBPDR - 1)); 202 } else { 203 pa = *vtopte(va); 204 pa = (pa & PG_FRAME) | (va & PAGE_MASK); 205 } 206 return pa; 207 } 208 209 #ifdef PAE 210 211 static __inline pt_entry_t 212 pte_load(pt_entry_t *ptep) 213 { 214 pt_entry_t r; 215 216 __asm __volatile( 217 "lock; cmpxchg8b %1" 218 : "=A" (r) 219 : "m" (*ptep), "a" (0), "d" (0), "b" (0), "c" (0)); 220 return (r); 221 } 222 223 static __inline pt_entry_t 224 pte_load_store(pt_entry_t *ptep, pt_entry_t v) 225 { 226 pt_entry_t r; 227 228 r = *ptep; 229 __asm __volatile( 230 "1:\n" 231 "\tlock; cmpxchg8b %1\n" 232 "\tjnz 1b" 233 : "+A" (r) 234 : "m" (*ptep), "b" ((uint32_t)v), "c" ((uint32_t)(v >> 32))); 235 return (r); 236 } 237 238 #define pte_load_clear(ptep) pte_load_store((ptep), (pt_entry_t)0ULL) 239 240 #define pte_store(ptep, pte) pte_load_store((ptep), (pt_entry_t)pte) 241 242 #else /* PAE */ 243 244 static __inline pt_entry_t 245 pte_load(pt_entry_t *ptep) 246 { 247 pt_entry_t r; 248 249 r = *ptep; 250 return (r); 251 } 252 253 static __inline pt_entry_t 254 pte_load_store(pt_entry_t *ptep, pt_entry_t pte) 255 { 256 pt_entry_t r; 257 258 __asm __volatile( 259 "xchgl %0,%1" 260 : "=m" (*ptep), 261 "=r" (r) 262 : "1" (pte), 263 "m" (*ptep)); 264 return (r); 265 } 266 267 #define pte_load_clear(pte) atomic_readandclear_int(pte) 268 269 static __inline void 270 pte_store(pt_entry_t *ptep, pt_entry_t pte) 271 { 272 273 *ptep = pte; 274 } 275 276 #endif /* PAE */ 277 278 #define pte_clear(ptep) pte_store((ptep), (pt_entry_t)0ULL) 279 280 #define pde_store(pdep, pde) pte_store((pdep), (pde)) 281 282 #endif /* _KERNEL */ 283 284 /* 285 * Pmap stuff 286 */ 287 struct pv_entry; 288 struct pv_chunk; 289 290 struct md_page { 291 int pv_list_count; 292 TAILQ_HEAD(,pv_entry) pv_list; 293 }; 294 295 struct pmap { 296 struct mtx pm_mtx; 297 pd_entry_t *pm_pdir; /* KVA of page directory */ 298 TAILQ_HEAD(,pv_chunk) pm_pvchunk; /* list of mappings in pmap */ 299 u_int pm_active; /* active on cpus */ 300 struct pmap_statistics pm_stats; /* pmap statistics */ 301 LIST_ENTRY(pmap) pm_list; /* List of all pmaps */ 302 #ifdef PAE 303 pdpt_entry_t *pm_pdpt; /* KVA of page director pointer 304 table */ 305 #endif 306 }; 307 308 typedef struct pmap *pmap_t; 309 310 #ifdef _KERNEL 311 extern struct pmap kernel_pmap_store; 312 #define kernel_pmap (&kernel_pmap_store) 313 314 #define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx) 315 #define PMAP_LOCK_ASSERT(pmap, type) \ 316 mtx_assert(&(pmap)->pm_mtx, (type)) 317 #define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx) 318 #define PMAP_LOCK_INIT(pmap) mtx_init(&(pmap)->pm_mtx, "pmap", \ 319 NULL, MTX_DEF | MTX_DUPOK) 320 #define PMAP_LOCKED(pmap) mtx_owned(&(pmap)->pm_mtx) 321 #define PMAP_MTX(pmap) (&(pmap)->pm_mtx) 322 #define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx) 323 #define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx) 324 #endif 325 326 /* 327 * For each vm_page_t, there is a list of all currently valid virtual 328 * mappings of that page. An entry is a pv_entry_t, the list is pv_table. 329 */ 330 typedef struct pv_entry { 331 vm_offset_t pv_va; /* virtual address for mapping */ 332 TAILQ_ENTRY(pv_entry) pv_list; 333 } *pv_entry_t; 334 335 /* 336 * pv_entries are allocated in chunks per-process. This avoids the 337 * need to track per-pmap assignments. 338 */ 339 #define _NPCM 11 340 #define _NPCPV 336 341 struct pv_chunk { 342 pmap_t pc_pmap; 343 TAILQ_ENTRY(pv_chunk) pc_list; 344 uint32_t pc_map[_NPCM]; /* bitmap; 1 = free */ 345 uint32_t pc_spare[2]; 346 struct pv_entry pc_pventry[_NPCPV]; 347 }; 348 349 #ifdef _KERNEL 350 351 #define NPPROVMTRR 8 352 #define PPRO_VMTRRphysBase0 0x200 353 #define PPRO_VMTRRphysMask0 0x201 354 struct ppro_vmtrr { 355 u_int64_t base, mask; 356 }; 357 extern struct ppro_vmtrr PPro_vmtrr[NPPROVMTRR]; 358 359 extern caddr_t CADDR1; 360 extern pt_entry_t *CMAP1; 361 extern vm_paddr_t avail_end; 362 extern vm_paddr_t phys_avail[]; 363 extern vm_paddr_t dump_avail[]; 364 extern int pseflag; 365 extern int pgeflag; 366 extern char *ptvmmap; /* poor name! */ 367 extern vm_offset_t virtual_avail; 368 extern vm_offset_t virtual_end; 369 370 #define pmap_page_is_mapped(m) (!TAILQ_EMPTY(&(m)->md.pv_list)) 371 372 void pmap_bootstrap(vm_paddr_t, vm_paddr_t); 373 void pmap_init_pat(void); 374 void pmap_kenter(vm_offset_t va, vm_paddr_t pa); 375 void *pmap_kenter_temporary(vm_paddr_t pa, int i); 376 void pmap_kremove(vm_offset_t); 377 void *pmap_mapdev(vm_paddr_t, vm_size_t); 378 void pmap_unmapdev(vm_offset_t, vm_size_t); 379 pt_entry_t *pmap_pte(pmap_t, vm_offset_t) __pure2; 380 void pmap_set_pg(void); 381 void pmap_invalidate_page(pmap_t, vm_offset_t); 382 void pmap_invalidate_range(pmap_t, vm_offset_t, vm_offset_t); 383 void pmap_invalidate_all(pmap_t); 384 void pmap_invalidate_cache(void); 385 386 #endif /* _KERNEL */ 387 388 #endif /* !LOCORE */ 389 390 #endif /* !_MACHINE_PMAP_H_ */ 391