1 /*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * the Systems Programming Group of the University of Utah Computer 7 * Science Department and William Jolitz of UUNET Technologies Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * Derived from hp300 version by Mike Hibler, this version by William 34 * Jolitz uses a recursive map [a pde points to the page directory] to 35 * map the page tables using the pagetables themselves. This is done to 36 * reduce the impact on kernel virtual memory for lots of sparse address 37 * space, and to reduce the cost of memory to each process. 38 * 39 * from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90 40 * from: @(#)pmap.h 7.4 (Berkeley) 5/12/91 41 * $FreeBSD$ 42 */ 43 44 #ifndef _MACHINE_PMAP_H_ 45 #define _MACHINE_PMAP_H_ 46 47 /* 48 * Page-directory and page-table entries follow this format, with a few 49 * of the fields not present here and there, depending on a lot of things. 50 */ 51 /* ---- Intel Nomenclature ---- */ 52 #define PG_V 0x001 /* P Valid */ 53 #define PG_RW 0x002 /* R/W Read/Write */ 54 #define PG_U 0x004 /* U/S User/Supervisor */ 55 #define PG_NC_PWT 0x008 /* PWT Write through */ 56 #define PG_NC_PCD 0x010 /* PCD Cache disable */ 57 #define PG_A 0x020 /* A Accessed */ 58 #define PG_M 0x040 /* D Dirty */ 59 #define PG_PS 0x080 /* PS Page size (0=4k,1=4M) */ 60 #define PG_G 0x100 /* G Global */ 61 #define PG_AVAIL1 0x200 /* / Available for system */ 62 #define PG_AVAIL2 0x400 /* < programmers use */ 63 #define PG_AVAIL3 0x800 /* \ */ 64 65 66 /* Our various interpretations of the above */ 67 #define PG_W PG_AVAIL1 /* "Wired" pseudoflag */ 68 #define PG_MANAGED PG_AVAIL2 69 #define PG_FRAME (~((vm_paddr_t)PAGE_MASK)) 70 #define PG_PROT (PG_RW|PG_U) /* all protection bits . */ 71 #define PG_N (PG_NC_PWT|PG_NC_PCD) /* Non-cacheable */ 72 73 /* 74 * Page Protection Exception bits 75 */ 76 77 #define PGEX_P 0x01 /* Protection violation vs. not present */ 78 #define PGEX_W 0x02 /* during a Write cycle */ 79 #define PGEX_U 0x04 /* access from User mode (UPL) */ 80 81 /* 82 * Size of Kernel address space. This is the number of page table pages 83 * (4MB each) to use for the kernel. 256 pages == 1 Gigabyte. 84 * This **MUST** be a multiple of 4 (eg: 252, 256, 260, etc). 85 */ 86 #ifndef KVA_PAGES 87 #ifdef PAE 88 #define KVA_PAGES 512 89 #else 90 #define KVA_PAGES 256 91 #endif 92 #endif 93 94 /* 95 * Pte related macros 96 */ 97 #define VADDR(pdi, pti) ((vm_offset_t)(((pdi)<<PDRSHIFT)|((pti)<<PAGE_SHIFT))) 98 99 /* Actual number of kernel page tables */ 100 #ifndef NKPT 101 #ifdef PAE 102 #define NKPT 240 /* Enough for 16GB (2MB page tables) */ 103 #else 104 #define NKPT 30 /* Enough for 4GB (4MB page tables) */ 105 #endif 106 #endif 107 #ifndef NKPDE 108 #ifdef SMP 109 #define NKPDE (KVA_PAGES - 1) /* number of page tables/pde's */ 110 #else 111 #define NKPDE (KVA_PAGES) /* number of page tables/pde's */ 112 #endif 113 #endif 114 115 /* 116 * The *PTDI values control the layout of virtual memory 117 * 118 * XXX This works for now, but I am not real happy with it, I'll fix it 119 * right after I fix locore.s and the magic 28K hole 120 * 121 * SMP_PRIVPAGES: The per-cpu address space is 0xff80000 -> 0xffbfffff 122 */ 123 #ifdef SMP 124 #define MPPTDI (NPDEPTD-1) /* per cpu ptd entry */ 125 #define KPTDI (MPPTDI-NKPDE) /* start of kernel virtual pde's */ 126 #else 127 #define KPTDI (NPDEPTD-NKPDE)/* start of kernel virtual pde's */ 128 #endif /* SMP */ 129 #define PTDPTDI (KPTDI-NPGPTD) /* ptd entry that points to ptd! */ 130 131 /* 132 * XXX doesn't really belong here I guess... 133 */ 134 #define ISA_HOLE_START 0xa0000 135 #define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START) 136 137 #ifndef LOCORE 138 139 #include <sys/queue.h> 140 #include <sys/_lock.h> 141 #include <sys/_mutex.h> 142 143 #ifdef PAE 144 145 typedef uint64_t pdpt_entry_t; 146 typedef uint64_t pd_entry_t; 147 typedef uint64_t pt_entry_t; 148 149 #define PTESHIFT (3) 150 #define PDESHIFT (3) 151 152 #else 153 154 typedef uint32_t pd_entry_t; 155 typedef uint32_t pt_entry_t; 156 157 #define PTESHIFT (2) 158 #define PDESHIFT (2) 159 160 #endif 161 162 /* 163 * Address of current and alternate address space page table maps 164 * and directories. 165 */ 166 #ifdef _KERNEL 167 extern pt_entry_t PTmap[]; 168 extern pd_entry_t PTD[]; 169 extern pd_entry_t PTDpde[]; 170 171 #ifdef PAE 172 extern pdpt_entry_t *IdlePDPT; 173 #endif 174 extern pd_entry_t *IdlePTD; /* physical address of "Idle" state directory */ 175 #endif 176 177 #ifdef _KERNEL 178 /* 179 * virtual address to page table entry and 180 * to physical address. 181 * Note: these work recursively, thus vtopte of a pte will give 182 * the corresponding pde that in turn maps it. 183 */ 184 #define vtopte(va) (PTmap + i386_btop(va)) 185 #define vtophys(va) pmap_kextract((vm_offset_t)(va)) 186 187 /* 188 * Routine: pmap_kextract 189 * Function: 190 * Extract the physical page address associated 191 * kernel virtual address. 192 */ 193 static __inline vm_paddr_t 194 pmap_kextract(vm_offset_t va) 195 { 196 vm_paddr_t pa; 197 198 if ((pa = PTD[va >> PDRSHIFT]) & PG_PS) { 199 pa = (pa & ~(NBPDR - 1)) | (va & (NBPDR - 1)); 200 } else { 201 pa = *vtopte(va); 202 pa = (pa & PG_FRAME) | (va & PAGE_MASK); 203 } 204 return pa; 205 } 206 207 #ifdef PAE 208 209 static __inline pt_entry_t 210 pte_load(pt_entry_t *ptep) 211 { 212 pt_entry_t r; 213 214 __asm __volatile( 215 "lock; cmpxchg8b %1" 216 : "=A" (r) 217 : "m" (*ptep), "a" (0), "d" (0), "b" (0), "c" (0)); 218 return (r); 219 } 220 221 static __inline pt_entry_t 222 pte_load_store(pt_entry_t *ptep, pt_entry_t v) 223 { 224 pt_entry_t r; 225 226 r = *ptep; 227 __asm __volatile( 228 "1:\n" 229 "\tlock; cmpxchg8b %1\n" 230 "\tjnz 1b" 231 : "+A" (r) 232 : "m" (*ptep), "b" ((uint32_t)v), "c" ((uint32_t)(v >> 32))); 233 return (r); 234 } 235 236 #define pte_load_clear(ptep) pte_load_store((ptep), (pt_entry_t)0ULL) 237 238 #define pte_store(ptep, pte) pte_load_store((ptep), (pt_entry_t)pte) 239 240 #else /* PAE */ 241 242 static __inline pt_entry_t 243 pte_load(pt_entry_t *ptep) 244 { 245 pt_entry_t r; 246 247 r = *ptep; 248 return (r); 249 } 250 251 static __inline pt_entry_t 252 pte_load_store(pt_entry_t *ptep, pt_entry_t pte) 253 { 254 pt_entry_t r; 255 256 __asm __volatile( 257 "xchgl %0,%1" 258 : "=m" (*ptep), 259 "=r" (r) 260 : "1" (pte), 261 "m" (*ptep)); 262 return (r); 263 } 264 265 #define pte_load_clear(pte) atomic_readandclear_int(pte) 266 267 static __inline void 268 pte_store(pt_entry_t *ptep, pt_entry_t pte) 269 { 270 271 *ptep = pte; 272 } 273 274 #endif /* PAE */ 275 276 #define pte_clear(ptep) pte_store((ptep), (pt_entry_t)0ULL) 277 278 #define pde_store(pdep, pde) pte_store((pdep), (pde)) 279 280 #endif /* _KERNEL */ 281 282 /* 283 * Pmap stuff 284 */ 285 struct pv_entry; 286 287 struct md_page { 288 int pv_list_count; 289 TAILQ_HEAD(,pv_entry) pv_list; 290 }; 291 292 struct pmap { 293 struct mtx pm_mtx; 294 pd_entry_t *pm_pdir; /* KVA of page directory */ 295 TAILQ_HEAD(,pv_entry) pm_pvlist; /* list of mappings in pmap */ 296 u_int pm_active; /* active on cpus */ 297 struct pmap_statistics pm_stats; /* pmap statistics */ 298 LIST_ENTRY(pmap) pm_list; /* List of all pmaps */ 299 #ifdef PAE 300 pdpt_entry_t *pm_pdpt; /* KVA of page director pointer 301 table */ 302 #endif 303 }; 304 305 typedef struct pmap *pmap_t; 306 307 #ifdef _KERNEL 308 extern struct pmap kernel_pmap_store; 309 #define kernel_pmap (&kernel_pmap_store) 310 311 #define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx) 312 #define PMAP_LOCK_ASSERT(pmap, type) \ 313 mtx_assert(&(pmap)->pm_mtx, (type)) 314 #define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx) 315 #define PMAP_LOCK_INIT(pmap) mtx_init(&(pmap)->pm_mtx, "pmap", \ 316 NULL, MTX_DEF | MTX_DUPOK) 317 #define PMAP_LOCKED(pmap) mtx_owned(&(pmap)->pm_mtx) 318 #define PMAP_MTX(pmap) (&(pmap)->pm_mtx) 319 #define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx) 320 #define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx) 321 #endif 322 323 /* 324 * For each vm_page_t, there is a list of all currently valid virtual 325 * mappings of that page. An entry is a pv_entry_t, the list is pv_table. 326 */ 327 typedef struct pv_entry { 328 pmap_t pv_pmap; /* pmap where mapping lies */ 329 vm_offset_t pv_va; /* virtual address for mapping */ 330 TAILQ_ENTRY(pv_entry) pv_list; 331 TAILQ_ENTRY(pv_entry) pv_plist; 332 } *pv_entry_t; 333 334 #ifdef _KERNEL 335 336 #define NPPROVMTRR 8 337 #define PPRO_VMTRRphysBase0 0x200 338 #define PPRO_VMTRRphysMask0 0x201 339 struct ppro_vmtrr { 340 u_int64_t base, mask; 341 }; 342 extern struct ppro_vmtrr PPro_vmtrr[NPPROVMTRR]; 343 344 extern caddr_t CADDR1; 345 extern pt_entry_t *CMAP1; 346 extern vm_paddr_t avail_end; 347 extern vm_paddr_t phys_avail[]; 348 extern vm_paddr_t dump_avail[]; 349 extern int pseflag; 350 extern int pgeflag; 351 extern char *ptvmmap; /* poor name! */ 352 extern vm_offset_t virtual_avail; 353 extern vm_offset_t virtual_end; 354 355 #define pmap_page_is_mapped(m) (!TAILQ_EMPTY(&(m)->md.pv_list)) 356 357 void pmap_bootstrap(vm_paddr_t, vm_paddr_t); 358 void pmap_kenter(vm_offset_t va, vm_paddr_t pa); 359 void *pmap_kenter_temporary(vm_paddr_t pa, int i); 360 void pmap_kremove(vm_offset_t); 361 void *pmap_mapdev(vm_paddr_t, vm_size_t); 362 void pmap_unmapdev(vm_offset_t, vm_size_t); 363 pt_entry_t *pmap_pte(pmap_t, vm_offset_t) __pure2; 364 void pmap_set_pg(void); 365 void pmap_invalidate_page(pmap_t, vm_offset_t); 366 void pmap_invalidate_range(pmap_t, vm_offset_t, vm_offset_t); 367 void pmap_invalidate_all(pmap_t); 368 369 #endif /* _KERNEL */ 370 371 #endif /* !LOCORE */ 372 373 #endif /* !_MACHINE_PMAP_H_ */ 374