1 /*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * the Systems Programming Group of the University of Utah Computer 7 * Science Department and William Jolitz of UUNET Technologies Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * Derived from hp300 version by Mike Hibler, this version by William 34 * Jolitz uses a recursive map [a pde points to the page directory] to 35 * map the page tables using the pagetables themselves. This is done to 36 * reduce the impact on kernel virtual memory for lots of sparse address 37 * space, and to reduce the cost of memory to each process. 38 * 39 * from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90 40 * from: @(#)pmap.h 7.4 (Berkeley) 5/12/91 41 * $FreeBSD$ 42 */ 43 44 #ifndef _MACHINE_PMAP_H_ 45 #define _MACHINE_PMAP_H_ 46 47 /* 48 * Page-directory and page-table entries follow this format, with a few 49 * of the fields not present here and there, depending on a lot of things. 50 */ 51 /* ---- Intel Nomenclature ---- */ 52 #define PG_V 0x001 /* P Valid */ 53 #define PG_RW 0x002 /* R/W Read/Write */ 54 #define PG_U 0x004 /* U/S User/Supervisor */ 55 #define PG_NC_PWT 0x008 /* PWT Write through */ 56 #define PG_NC_PCD 0x010 /* PCD Cache disable */ 57 #define PG_A 0x020 /* A Accessed */ 58 #define PG_M 0x040 /* D Dirty */ 59 #define PG_PS 0x080 /* PS Page size (0=4k,1=4M) */ 60 #define PG_PTE_PAT 0x080 /* PAT PAT index */ 61 #define PG_G 0x100 /* G Global */ 62 #define PG_AVAIL1 0x200 /* / Available for system */ 63 #define PG_AVAIL2 0x400 /* < programmers use */ 64 #define PG_AVAIL3 0x800 /* \ */ 65 #define PG_PDE_PAT 0x1000 /* PAT PAT index */ 66 #ifdef PAE 67 #define PG_NX (1ull<<63) /* No-execute */ 68 #endif 69 70 71 /* Our various interpretations of the above */ 72 #define PG_W PG_AVAIL1 /* "Wired" pseudoflag */ 73 #define PG_MANAGED PG_AVAIL2 74 #ifdef PAE 75 #define PG_FRAME (0x000ffffffffff000ull) 76 #define PG_PS_FRAME (0x000fffffffe00000ull) 77 #else 78 #define PG_FRAME (~PAGE_MASK) 79 #define PG_PS_FRAME (0xffc00000) 80 #endif 81 #define PG_PROT (PG_RW|PG_U) /* all protection bits . */ 82 #define PG_N (PG_NC_PWT|PG_NC_PCD) /* Non-cacheable */ 83 84 /* 85 * Promotion to a 2 or 4MB (PDE) page mapping requires that the corresponding 86 * 4KB (PTE) page mappings have identical settings for the following fields: 87 */ 88 #define PG_PTE_PROMOTE (PG_MANAGED | PG_W | PG_G | PG_PTE_PAT | \ 89 PG_M | PG_A | PG_NC_PCD | PG_NC_PWT | PG_U | PG_RW | PG_V) 90 91 /* 92 * Page Protection Exception bits 93 */ 94 95 #define PGEX_P 0x01 /* Protection violation vs. not present */ 96 #define PGEX_W 0x02 /* during a Write cycle */ 97 #define PGEX_U 0x04 /* access from User mode (UPL) */ 98 #define PGEX_RSV 0x08 /* reserved PTE field is non-zero */ 99 #define PGEX_I 0x10 /* during an instruction fetch */ 100 101 /* 102 * Size of Kernel address space. This is the number of page table pages 103 * (4MB each) to use for the kernel. 256 pages == 1 Gigabyte. 104 * This **MUST** be a multiple of 4 (eg: 252, 256, 260, etc). 105 * For PAE, the page table page unit size is 2MB. This means that 512 pages 106 * is 1 Gigabyte. Double everything. It must be a multiple of 8 for PAE. 107 */ 108 #ifndef KVA_PAGES 109 #ifdef PAE 110 #define KVA_PAGES 512 111 #else 112 #define KVA_PAGES 256 113 #endif 114 #endif 115 116 /* 117 * Pte related macros 118 */ 119 #define VADDR(pdi, pti) ((vm_offset_t)(((pdi)<<PDRSHIFT)|((pti)<<PAGE_SHIFT))) 120 121 /* Initial number of kernel page tables. */ 122 #ifndef NKPT 123 #ifdef PAE 124 /* 152 page tables needed to map 16G (76B "struct vm_page", 2M page tables). */ 125 #define NKPT 240 126 #else 127 /* 18 page tables needed to map 4G (72B "struct vm_page", 4M page tables). */ 128 #define NKPT 30 129 #endif 130 #endif 131 132 #ifndef NKPDE 133 #define NKPDE (KVA_PAGES) /* number of page tables/pde's */ 134 #endif 135 136 /* 137 * The *PTDI values control the layout of virtual memory 138 * 139 * XXX This works for now, but I am not real happy with it, I'll fix it 140 * right after I fix locore.s and the magic 28K hole 141 */ 142 #define KPTDI (NPDEPTD-NKPDE) /* start of kernel virtual pde's */ 143 #define PTDPTDI (KPTDI-NPGPTD) /* ptd entry that points to ptd! */ 144 145 /* 146 * XXX doesn't really belong here I guess... 147 */ 148 #define ISA_HOLE_START 0xa0000 149 #define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START) 150 151 #ifndef LOCORE 152 153 #include <sys/queue.h> 154 #include <sys/_lock.h> 155 #include <sys/_mutex.h> 156 157 #ifdef PAE 158 159 typedef uint64_t pdpt_entry_t; 160 typedef uint64_t pd_entry_t; 161 typedef uint64_t pt_entry_t; 162 163 #define PTESHIFT (3) 164 #define PDESHIFT (3) 165 166 #else 167 168 typedef uint32_t pd_entry_t; 169 typedef uint32_t pt_entry_t; 170 171 #define PTESHIFT (2) 172 #define PDESHIFT (2) 173 174 #endif 175 176 /* 177 * Address of current address space page table maps and directories. 178 */ 179 #ifdef _KERNEL 180 extern pt_entry_t PTmap[]; 181 extern pd_entry_t PTD[]; 182 extern pd_entry_t PTDpde[]; 183 184 #ifdef PAE 185 extern pdpt_entry_t *IdlePDPT; 186 #endif 187 extern pd_entry_t *IdlePTD; /* physical address of "Idle" state directory */ 188 189 /* 190 * virtual address to page table entry and 191 * to physical address. 192 * Note: these work recursively, thus vtopte of a pte will give 193 * the corresponding pde that in turn maps it. 194 */ 195 #define vtopte(va) (PTmap + i386_btop(va)) 196 #define vtophys(va) pmap_kextract((vm_offset_t)(va)) 197 198 #ifdef XEN 199 #include <sys/param.h> 200 #include <machine/xen/xen-os.h> 201 #include <machine/xen/xenvar.h> 202 #include <machine/xen/xenpmap.h> 203 204 extern pt_entry_t pg_nx; 205 206 #define PG_KERNEL (PG_V | PG_A | PG_RW | PG_M) 207 208 #define MACH_TO_VM_PAGE(ma) PHYS_TO_VM_PAGE(xpmap_mtop((ma))) 209 #define VM_PAGE_TO_MACH(m) xpmap_ptom(VM_PAGE_TO_PHYS((m))) 210 211 static __inline vm_paddr_t 212 pmap_kextract_ma(vm_offset_t va) 213 { 214 vm_paddr_t ma; 215 if ((ma = PTD[va >> PDRSHIFT]) & PG_PS) { 216 ma = (ma & ~(NBPDR - 1)) | (va & (NBPDR - 1)); 217 } else { 218 ma = (*vtopte(va) & PG_FRAME) | (va & PAGE_MASK); 219 } 220 return ma; 221 } 222 223 static __inline vm_paddr_t 224 pmap_kextract(vm_offset_t va) 225 { 226 return xpmap_mtop(pmap_kextract_ma(va)); 227 } 228 #define vtomach(va) pmap_kextract_ma(((vm_offset_t) (va))) 229 230 vm_paddr_t pmap_extract_ma(struct pmap *pmap, vm_offset_t va); 231 232 void pmap_kenter_ma(vm_offset_t va, vm_paddr_t pa); 233 void pmap_map_readonly(struct pmap *pmap, vm_offset_t va, int len); 234 void pmap_map_readwrite(struct pmap *pmap, vm_offset_t va, int len); 235 236 static __inline pt_entry_t 237 pte_load_store(pt_entry_t *ptep, pt_entry_t v) 238 { 239 pt_entry_t r; 240 241 v = xpmap_ptom(v); 242 r = *ptep; 243 PT_SET_VA(ptep, v, TRUE); 244 return (r); 245 } 246 247 static __inline pt_entry_t 248 pte_load_store_ma(pt_entry_t *ptep, pt_entry_t v) 249 { 250 pt_entry_t r; 251 252 r = *ptep; 253 PT_SET_VA_MA(ptep, v, TRUE); 254 return (r); 255 } 256 257 #define pte_load_clear(ptep) pte_load_store((ptep), (pt_entry_t)0ULL) 258 259 #define pte_store(ptep, pte) pte_load_store((ptep), (pt_entry_t)pte) 260 #define pte_store_ma(ptep, pte) pte_load_store_ma((ptep), (pt_entry_t)pte) 261 #define pde_store_ma(ptep, pte) pte_load_store_ma((ptep), (pt_entry_t)pte) 262 263 #elif !defined(XEN) 264 /* 265 * Routine: pmap_kextract 266 * Function: 267 * Extract the physical page address associated 268 * kernel virtual address. 269 */ 270 static __inline vm_paddr_t 271 pmap_kextract(vm_offset_t va) 272 { 273 vm_paddr_t pa; 274 275 if ((pa = PTD[va >> PDRSHIFT]) & PG_PS) { 276 pa = (pa & PG_PS_FRAME) | (va & PDRMASK); 277 } else { 278 pa = *vtopte(va); 279 pa = (pa & PG_FRAME) | (va & PAGE_MASK); 280 } 281 return pa; 282 } 283 284 #define PT_UPDATES_FLUSH() 285 #endif 286 287 #if defined(PAE) && !defined(XEN) 288 289 #define pde_cmpset(pdep, old, new) \ 290 atomic_cmpset_64((pdep), (old), (new)) 291 292 static __inline pt_entry_t 293 pte_load(pt_entry_t *ptep) 294 { 295 pt_entry_t r; 296 297 __asm __volatile( 298 "lock; cmpxchg8b %1" 299 : "=A" (r) 300 : "m" (*ptep), "a" (0), "d" (0), "b" (0), "c" (0)); 301 return (r); 302 } 303 304 static __inline pt_entry_t 305 pte_load_store(pt_entry_t *ptep, pt_entry_t v) 306 { 307 pt_entry_t r; 308 309 r = *ptep; 310 __asm __volatile( 311 "1:\n" 312 "\tlock; cmpxchg8b %1\n" 313 "\tjnz 1b" 314 : "+A" (r) 315 : "m" (*ptep), "b" ((uint32_t)v), "c" ((uint32_t)(v >> 32))); 316 return (r); 317 } 318 319 /* XXXRU move to atomic.h? */ 320 static __inline int 321 atomic_cmpset_64(volatile uint64_t *dst, uint64_t exp, uint64_t src) 322 { 323 int64_t res = exp; 324 325 __asm __volatile ( 326 " lock ; " 327 " cmpxchg8b %2 ; " 328 " setz %%al ; " 329 " movzbl %%al,%0 ; " 330 "# atomic_cmpset_64" 331 : "+A" (res), /* 0 (result) */ 332 "=m" (*dst) /* 1 */ 333 : "m" (*dst), /* 2 */ 334 "b" ((uint32_t)src), 335 "c" ((uint32_t)(src >> 32))); 336 337 return (res); 338 } 339 340 #define pte_load_clear(ptep) pte_load_store((ptep), (pt_entry_t)0ULL) 341 342 #define pte_store(ptep, pte) pte_load_store((ptep), (pt_entry_t)pte) 343 344 extern pt_entry_t pg_nx; 345 346 #elif !defined(PAE) && !defined (XEN) 347 348 #define pde_cmpset(pdep, old, new) \ 349 atomic_cmpset_int((pdep), (old), (new)) 350 351 static __inline pt_entry_t 352 pte_load(pt_entry_t *ptep) 353 { 354 pt_entry_t r; 355 356 r = *ptep; 357 return (r); 358 } 359 360 static __inline pt_entry_t 361 pte_load_store(pt_entry_t *ptep, pt_entry_t pte) 362 { 363 __asm volatile("xchgl %0, %1" : "+m" (*ptep), "+r" (pte)); 364 return (pte); 365 } 366 367 #define pte_load_clear(pte) atomic_readandclear_int(pte) 368 369 static __inline void 370 pte_store(pt_entry_t *ptep, pt_entry_t pte) 371 { 372 373 *ptep = pte; 374 } 375 376 #endif /* PAE */ 377 378 #define pte_clear(ptep) pte_store((ptep), (pt_entry_t)0ULL) 379 380 #define pde_store(pdep, pde) pte_store((pdep), (pde)) 381 382 #endif /* _KERNEL */ 383 384 /* 385 * Pmap stuff 386 */ 387 struct pv_entry; 388 struct pv_chunk; 389 390 struct md_page { 391 TAILQ_HEAD(,pv_entry) pv_list; 392 int pat_mode; 393 }; 394 395 struct pmap { 396 struct mtx pm_mtx; 397 pd_entry_t *pm_pdir; /* KVA of page directory */ 398 TAILQ_HEAD(,pv_chunk) pm_pvchunk; /* list of mappings in pmap */ 399 u_int pm_active; /* active on cpus */ 400 struct pmap_statistics pm_stats; /* pmap statistics */ 401 LIST_ENTRY(pmap) pm_list; /* List of all pmaps */ 402 #ifdef PAE 403 pdpt_entry_t *pm_pdpt; /* KVA of page director pointer 404 table */ 405 #endif 406 vm_page_t pm_root; /* spare page table pages */ 407 }; 408 409 typedef struct pmap *pmap_t; 410 411 #ifdef _KERNEL 412 extern struct pmap kernel_pmap_store; 413 #define kernel_pmap (&kernel_pmap_store) 414 415 #define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx) 416 #define PMAP_LOCK_ASSERT(pmap, type) \ 417 mtx_assert(&(pmap)->pm_mtx, (type)) 418 #define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx) 419 #define PMAP_LOCK_INIT(pmap) mtx_init(&(pmap)->pm_mtx, "pmap", \ 420 NULL, MTX_DEF | MTX_DUPOK) 421 #define PMAP_LOCKED(pmap) mtx_owned(&(pmap)->pm_mtx) 422 #define PMAP_MTX(pmap) (&(pmap)->pm_mtx) 423 #define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx) 424 #define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx) 425 #endif 426 427 /* 428 * For each vm_page_t, there is a list of all currently valid virtual 429 * mappings of that page. An entry is a pv_entry_t, the list is pv_list. 430 */ 431 typedef struct pv_entry { 432 vm_offset_t pv_va; /* virtual address for mapping */ 433 TAILQ_ENTRY(pv_entry) pv_list; 434 } *pv_entry_t; 435 436 /* 437 * pv_entries are allocated in chunks per-process. This avoids the 438 * need to track per-pmap assignments. 439 */ 440 #define _NPCM 11 441 #define _NPCPV 336 442 struct pv_chunk { 443 pmap_t pc_pmap; 444 TAILQ_ENTRY(pv_chunk) pc_list; 445 uint32_t pc_map[_NPCM]; /* bitmap; 1 = free */ 446 uint32_t pc_spare[2]; 447 struct pv_entry pc_pventry[_NPCPV]; 448 }; 449 450 #ifdef _KERNEL 451 452 extern caddr_t CADDR1; 453 extern pt_entry_t *CMAP1; 454 extern vm_paddr_t phys_avail[]; 455 extern vm_paddr_t dump_avail[]; 456 extern int pseflag; 457 extern int pgeflag; 458 extern char *ptvmmap; /* poor name! */ 459 extern vm_offset_t virtual_avail; 460 extern vm_offset_t virtual_end; 461 462 #define pmap_page_get_memattr(m) ((vm_memattr_t)(m)->md.pat_mode) 463 #define pmap_unmapbios(va, sz) pmap_unmapdev((va), (sz)) 464 465 void pmap_bootstrap(vm_paddr_t); 466 int pmap_cache_bits(int mode, boolean_t is_pde); 467 int pmap_change_attr(vm_offset_t, vm_size_t, int); 468 void pmap_init_pat(void); 469 void pmap_kenter(vm_offset_t va, vm_paddr_t pa); 470 void *pmap_kenter_temporary(vm_paddr_t pa, int i); 471 void pmap_kremove(vm_offset_t); 472 void *pmap_mapbios(vm_paddr_t, vm_size_t); 473 void *pmap_mapdev(vm_paddr_t, vm_size_t); 474 void *pmap_mapdev_attr(vm_paddr_t, vm_size_t, int); 475 boolean_t pmap_page_is_mapped(vm_page_t m); 476 void pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma); 477 void pmap_unmapdev(vm_offset_t, vm_size_t); 478 pt_entry_t *pmap_pte(pmap_t, vm_offset_t) __pure2; 479 void pmap_set_pg(void); 480 void pmap_invalidate_page(pmap_t, vm_offset_t); 481 void pmap_invalidate_range(pmap_t, vm_offset_t, vm_offset_t); 482 void pmap_invalidate_all(pmap_t); 483 void pmap_invalidate_cache(void); 484 void pmap_invalidate_cache_range(vm_offset_t, vm_offset_t); 485 486 #endif /* _KERNEL */ 487 488 #endif /* !LOCORE */ 489 490 #endif /* !_MACHINE_PMAP_H_ */ 491