xref: /freebsd/sys/i386/include/pmap.h (revision 35a04710d7286aa9538917fd7f8e417dbee95b82)
1 /*-
2  * Copyright (c) 1991 Regents of the University of California.
3  * All rights reserved.
4  *
5  * This code is derived from software contributed to Berkeley by
6  * the Systems Programming Group of the University of Utah Computer
7  * Science Department and William Jolitz of UUNET Technologies Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 4. Neither the name of the University nor the names of its contributors
18  *    may be used to endorse or promote products derived from this software
19  *    without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31  * SUCH DAMAGE.
32  *
33  * Derived from hp300 version by Mike Hibler, this version by William
34  * Jolitz uses a recursive map [a pde points to the page directory] to
35  * map the page tables using the pagetables themselves. This is done to
36  * reduce the impact on kernel virtual memory for lots of sparse address
37  * space, and to reduce the cost of memory to each process.
38  *
39  *	from: hp300: @(#)pmap.h	7.2 (Berkeley) 12/16/90
40  *	from: @(#)pmap.h	7.4 (Berkeley) 5/12/91
41  * $FreeBSD$
42  */
43 
44 #ifndef _MACHINE_PMAP_H_
45 #define	_MACHINE_PMAP_H_
46 
47 /*
48  * Page-directory and page-table entries follow this format, with a few
49  * of the fields not present here and there, depending on a lot of things.
50  */
51 				/* ---- Intel Nomenclature ---- */
52 #define	PG_V		0x001	/* P	Valid			*/
53 #define PG_RW		0x002	/* R/W	Read/Write		*/
54 #define PG_U		0x004	/* U/S  User/Supervisor		*/
55 #define	PG_NC_PWT	0x008	/* PWT	Write through		*/
56 #define	PG_NC_PCD	0x010	/* PCD	Cache disable		*/
57 #define PG_A		0x020	/* A	Accessed		*/
58 #define	PG_M		0x040	/* D	Dirty			*/
59 #define	PG_PS		0x080	/* PS	Page size (0=4k,1=4M)	*/
60 #define	PG_PTE_PAT	0x080	/* PAT	PAT index		*/
61 #define	PG_G		0x100	/* G	Global			*/
62 #define	PG_AVAIL1	0x200	/*    /	Available for system	*/
63 #define	PG_AVAIL2	0x400	/*   <	programmers use		*/
64 #define	PG_AVAIL3	0x800	/*    \				*/
65 #define	PG_PDE_PAT	0x1000	/* PAT	PAT index		*/
66 #ifdef PAE
67 #define	PG_NX		(1ull<<63) /* No-execute */
68 #endif
69 
70 
71 /* Our various interpretations of the above */
72 #define PG_W		PG_AVAIL1	/* "Wired" pseudoflag */
73 #define	PG_MANAGED	PG_AVAIL2
74 #ifdef PAE
75 #define	PG_FRAME	(0x000ffffffffff000ull)
76 #define	PG_PS_FRAME	(0x000fffffffe00000ull)
77 #else
78 #define	PG_FRAME	(~PAGE_MASK)
79 #define	PG_PS_FRAME	(0xffc00000)
80 #endif
81 #define	PG_PROT		(PG_RW|PG_U)	/* all protection bits . */
82 #define PG_N		(PG_NC_PWT|PG_NC_PCD)	/* Non-cacheable */
83 
84 /*
85  * Page Protection Exception bits
86  */
87 
88 #define PGEX_P		0x01	/* Protection violation vs. not present */
89 #define PGEX_W		0x02	/* during a Write cycle */
90 #define PGEX_U		0x04	/* access from User mode (UPL) */
91 #define PGEX_RSV	0x08	/* reserved PTE field is non-zero */
92 #define PGEX_I		0x10	/* during an instruction fetch */
93 
94 /*
95  * Size of Kernel address space.  This is the number of page table pages
96  * (4MB each) to use for the kernel.  256 pages == 1 Gigabyte.
97  * This **MUST** be a multiple of 4 (eg: 252, 256, 260, etc).
98  */
99 #ifndef KVA_PAGES
100 #ifdef PAE
101 #define KVA_PAGES	512
102 #else
103 #define KVA_PAGES	256
104 #endif
105 #endif
106 
107 /*
108  * Pte related macros
109  */
110 #define VADDR(pdi, pti) ((vm_offset_t)(((pdi)<<PDRSHIFT)|((pti)<<PAGE_SHIFT)))
111 
112 /* Initial number of kernel page tables. */
113 #ifndef NKPT
114 #ifdef PAE
115 /* 152 page tables needed to map 16G (76B "struct vm_page", 2M page tables). */
116 #define	NKPT		240
117 #else
118 /* 18 page tables needed to map 4G (72B "struct vm_page", 4M page tables). */
119 #define	NKPT		30
120 #endif
121 #endif
122 
123 #ifndef NKPDE
124 #define NKPDE	(KVA_PAGES)	/* number of page tables/pde's */
125 #endif
126 
127 /*
128  * The *PTDI values control the layout of virtual memory
129  *
130  * XXX This works for now, but I am not real happy with it, I'll fix it
131  * right after I fix locore.s and the magic 28K hole
132  */
133 #define	KPTDI		(NPDEPTD-NKPDE)	/* start of kernel virtual pde's */
134 #define	PTDPTDI		(KPTDI-NPGPTD)	/* ptd entry that points to ptd! */
135 
136 /*
137  * XXX doesn't really belong here I guess...
138  */
139 #define ISA_HOLE_START    0xa0000
140 #define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START)
141 
142 #ifndef LOCORE
143 
144 #include <sys/queue.h>
145 #include <sys/_lock.h>
146 #include <sys/_mutex.h>
147 
148 #ifdef PAE
149 
150 typedef uint64_t pdpt_entry_t;
151 typedef uint64_t pd_entry_t;
152 typedef uint64_t pt_entry_t;
153 
154 #define	PTESHIFT	(3)
155 #define	PDESHIFT	(3)
156 
157 #else
158 
159 typedef uint32_t pd_entry_t;
160 typedef uint32_t pt_entry_t;
161 
162 #define	PTESHIFT	(2)
163 #define	PDESHIFT	(2)
164 
165 #endif
166 
167 /*
168  * Address of current and alternate address space page table maps
169  * and directories.
170  */
171 #ifdef _KERNEL
172 extern pt_entry_t PTmap[];
173 extern pd_entry_t PTD[];
174 extern pd_entry_t PTDpde[];
175 
176 #ifdef PAE
177 extern pdpt_entry_t *IdlePDPT;
178 #endif
179 extern pd_entry_t *IdlePTD;	/* physical address of "Idle" state directory */
180 #endif
181 
182 #ifdef _KERNEL
183 /*
184  * virtual address to page table entry and
185  * to physical address.
186  * Note: these work recursively, thus vtopte of a pte will give
187  * the corresponding pde that in turn maps it.
188  */
189 #define	vtopte(va)	(PTmap + i386_btop(va))
190 #define	vtophys(va)	pmap_kextract((vm_offset_t)(va))
191 
192 /*
193  *	Routine:	pmap_kextract
194  *	Function:
195  *		Extract the physical page address associated
196  *		kernel virtual address.
197  */
198 static __inline vm_paddr_t
199 pmap_kextract(vm_offset_t va)
200 {
201 	vm_paddr_t pa;
202 
203 	if ((pa = PTD[va >> PDRSHIFT]) & PG_PS) {
204 		pa = (pa & PG_PS_FRAME) | (va & PDRMASK);
205 	} else {
206 		pa = *vtopte(va);
207 		pa = (pa & PG_FRAME) | (va & PAGE_MASK);
208 	}
209 	return pa;
210 }
211 
212 #ifdef PAE
213 
214 static __inline pt_entry_t
215 pte_load(pt_entry_t *ptep)
216 {
217 	pt_entry_t r;
218 
219 	__asm __volatile(
220 	    "lock; cmpxchg8b %1"
221 	    : "=A" (r)
222 	    : "m" (*ptep), "a" (0), "d" (0), "b" (0), "c" (0));
223 	return (r);
224 }
225 
226 static __inline pt_entry_t
227 pte_load_store(pt_entry_t *ptep, pt_entry_t v)
228 {
229 	pt_entry_t r;
230 
231 	r = *ptep;
232 	__asm __volatile(
233 	    "1:\n"
234 	    "\tlock; cmpxchg8b %1\n"
235 	    "\tjnz 1b"
236 	    : "+A" (r)
237 	    : "m" (*ptep), "b" ((uint32_t)v), "c" ((uint32_t)(v >> 32)));
238 	return (r);
239 }
240 
241 /* XXXRU move to atomic.h? */
242 static __inline int
243 atomic_cmpset_64(volatile uint64_t *dst, uint64_t exp, uint64_t src)
244 {
245 	int64_t res = exp;
246 
247 	__asm __volatile (
248 	"	lock ;			"
249 	"	cmpxchg8b %2 ;		"
250 	"	setz	%%al ;		"
251 	"	movzbl	%%al,%0 ;	"
252 	"# atomic_cmpset_64"
253 	: "+A" (res),			/* 0 (result) */
254 	  "=m" (*dst)			/* 1 */
255 	: "m" (*dst),			/* 2 */
256 	  "b" ((uint32_t)src),
257 	  "c" ((uint32_t)(src >> 32)));
258 
259 	return (res);
260 }
261 
262 #define	pte_load_clear(ptep)	pte_load_store((ptep), (pt_entry_t)0ULL)
263 
264 #define	pte_store(ptep, pte)	pte_load_store((ptep), (pt_entry_t)pte)
265 
266 extern pt_entry_t pg_nx;
267 
268 #else /* PAE */
269 
270 static __inline pt_entry_t
271 pte_load(pt_entry_t *ptep)
272 {
273 	pt_entry_t r;
274 
275 	r = *ptep;
276 	return (r);
277 }
278 
279 static __inline pt_entry_t
280 pte_load_store(pt_entry_t *ptep, pt_entry_t pte)
281 {
282 	pt_entry_t r;
283 
284 	__asm __volatile(
285 	    "xchgl %0,%1"
286 	    : "=m" (*ptep),
287 	      "=r" (r)
288 	    : "1" (pte),
289 	      "m" (*ptep));
290 	return (r);
291 }
292 
293 #define	pte_load_clear(pte)	atomic_readandclear_int(pte)
294 
295 static __inline void
296 pte_store(pt_entry_t *ptep, pt_entry_t pte)
297 {
298 
299 	*ptep = pte;
300 }
301 
302 #endif /* PAE */
303 
304 #define	pte_clear(ptep)		pte_store((ptep), (pt_entry_t)0ULL)
305 
306 #define	pde_store(pdep, pde)	pte_store((pdep), (pde))
307 
308 #endif /* _KERNEL */
309 
310 /*
311  * Pmap stuff
312  */
313 struct	pv_entry;
314 struct	pv_chunk;
315 
316 struct md_page {
317 	int pv_list_count;
318 	TAILQ_HEAD(,pv_entry)	pv_list;
319 };
320 
321 struct pmap {
322 	struct mtx		pm_mtx;
323 	pd_entry_t		*pm_pdir;	/* KVA of page directory */
324 	TAILQ_HEAD(,pv_chunk)	pm_pvchunk;	/* list of mappings in pmap */
325 	u_int			pm_active;	/* active on cpus */
326 	struct pmap_statistics	pm_stats;	/* pmap statistics */
327 	LIST_ENTRY(pmap) 	pm_list;	/* List of all pmaps */
328 #ifdef PAE
329 	pdpt_entry_t		*pm_pdpt;	/* KVA of page director pointer
330 						   table */
331 #endif
332 };
333 
334 typedef struct pmap	*pmap_t;
335 
336 #ifdef _KERNEL
337 extern struct pmap	kernel_pmap_store;
338 #define kernel_pmap	(&kernel_pmap_store)
339 
340 #define	PMAP_LOCK(pmap)		mtx_lock(&(pmap)->pm_mtx)
341 #define	PMAP_LOCK_ASSERT(pmap, type) \
342 				mtx_assert(&(pmap)->pm_mtx, (type))
343 #define	PMAP_LOCK_DESTROY(pmap)	mtx_destroy(&(pmap)->pm_mtx)
344 #define	PMAP_LOCK_INIT(pmap)	mtx_init(&(pmap)->pm_mtx, "pmap", \
345 				    NULL, MTX_DEF | MTX_DUPOK)
346 #define	PMAP_LOCKED(pmap)	mtx_owned(&(pmap)->pm_mtx)
347 #define	PMAP_MTX(pmap)		(&(pmap)->pm_mtx)
348 #define	PMAP_TRYLOCK(pmap)	mtx_trylock(&(pmap)->pm_mtx)
349 #define	PMAP_UNLOCK(pmap)	mtx_unlock(&(pmap)->pm_mtx)
350 #endif
351 
352 /*
353  * For each vm_page_t, there is a list of all currently valid virtual
354  * mappings of that page.  An entry is a pv_entry_t, the list is pv_list.
355  */
356 typedef struct pv_entry {
357 	vm_offset_t	pv_va;		/* virtual address for mapping */
358 	TAILQ_ENTRY(pv_entry)	pv_list;
359 } *pv_entry_t;
360 
361 /*
362  * pv_entries are allocated in chunks per-process.  This avoids the
363  * need to track per-pmap assignments.
364  */
365 #define	_NPCM	11
366 #define	_NPCPV	336
367 struct pv_chunk {
368 	pmap_t			pc_pmap;
369 	TAILQ_ENTRY(pv_chunk)	pc_list;
370 	uint32_t		pc_map[_NPCM];	/* bitmap; 1 = free */
371 	uint32_t		pc_spare[2];
372 	struct pv_entry		pc_pventry[_NPCPV];
373 };
374 
375 #ifdef	_KERNEL
376 
377 #define NPPROVMTRR		8
378 #define PPRO_VMTRRphysBase0	0x200
379 #define PPRO_VMTRRphysMask0	0x201
380 struct ppro_vmtrr {
381 	u_int64_t base, mask;
382 };
383 extern struct ppro_vmtrr PPro_vmtrr[NPPROVMTRR];
384 
385 extern caddr_t	CADDR1;
386 extern pt_entry_t *CMAP1;
387 extern vm_paddr_t phys_avail[];
388 extern vm_paddr_t dump_avail[];
389 extern int pseflag;
390 extern int pgeflag;
391 extern char *ptvmmap;		/* poor name! */
392 extern vm_offset_t virtual_avail;
393 extern vm_offset_t virtual_end;
394 
395 #define	pmap_page_is_mapped(m)	(!TAILQ_EMPTY(&(m)->md.pv_list))
396 #define	pmap_unmapbios(va, sz)	pmap_unmapdev((va), (sz))
397 
398 void	pmap_bootstrap(vm_paddr_t);
399 int	pmap_change_attr(vm_offset_t, vm_size_t, int);
400 void	pmap_init_pat(void);
401 void	pmap_kenter(vm_offset_t va, vm_paddr_t pa);
402 void	pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode);
403 void	*pmap_kenter_temporary(vm_paddr_t pa, int i);
404 void	pmap_kremove(vm_offset_t);
405 void	*pmap_mapbios(vm_paddr_t, vm_size_t);
406 void	*pmap_mapdev(vm_paddr_t, vm_size_t);
407 void	*pmap_mapdev_attr(vm_paddr_t, vm_size_t, int);
408 void	pmap_unmapdev(vm_offset_t, vm_size_t);
409 pt_entry_t *pmap_pte(pmap_t, vm_offset_t) __pure2;
410 void	pmap_set_pg(void);
411 void	pmap_invalidate_page(pmap_t, vm_offset_t);
412 void	pmap_invalidate_range(pmap_t, vm_offset_t, vm_offset_t);
413 void	pmap_invalidate_all(pmap_t);
414 void	pmap_invalidate_cache(void);
415 
416 #endif /* _KERNEL */
417 
418 #endif /* !LOCORE */
419 
420 #endif /* !_MACHINE_PMAP_H_ */
421