1 /*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * the Systems Programming Group of the University of Utah Computer 7 * Science Department and William Jolitz of UUNET Technologies Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * Derived from hp300 version by Mike Hibler, this version by William 34 * Jolitz uses a recursive map [a pde points to the page directory] to 35 * map the page tables using the pagetables themselves. This is done to 36 * reduce the impact on kernel virtual memory for lots of sparse address 37 * space, and to reduce the cost of memory to each process. 38 * 39 * from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90 40 * from: @(#)pmap.h 7.4 (Berkeley) 5/12/91 41 * $FreeBSD$ 42 */ 43 44 #ifndef _MACHINE_PMAP_H_ 45 #define _MACHINE_PMAP_H_ 46 47 /* 48 * Page-directory and page-table entries follow this format, with a few 49 * of the fields not present here and there, depending on a lot of things. 50 */ 51 /* ---- Intel Nomenclature ---- */ 52 #define PG_V 0x001 /* P Valid */ 53 #define PG_RW 0x002 /* R/W Read/Write */ 54 #define PG_U 0x004 /* U/S User/Supervisor */ 55 #define PG_NC_PWT 0x008 /* PWT Write through */ 56 #define PG_NC_PCD 0x010 /* PCD Cache disable */ 57 #define PG_A 0x020 /* A Accessed */ 58 #define PG_M 0x040 /* D Dirty */ 59 #define PG_PS 0x080 /* PS Page size (0=4k,1=4M) */ 60 #define PG_PTE_PAT 0x080 /* PAT PAT index */ 61 #define PG_G 0x100 /* G Global */ 62 #define PG_AVAIL1 0x200 /* / Available for system */ 63 #define PG_AVAIL2 0x400 /* < programmers use */ 64 #define PG_AVAIL3 0x800 /* \ */ 65 #define PG_PDE_PAT 0x1000 /* PAT PAT index */ 66 #ifdef PAE 67 #define PG_NX (1ull<<63) /* No-execute */ 68 #endif 69 70 71 /* Our various interpretations of the above */ 72 #define PG_W PG_AVAIL1 /* "Wired" pseudoflag */ 73 #define PG_MANAGED PG_AVAIL2 74 #ifdef PAE 75 #define PG_FRAME (0x000ffffffffff000ull) 76 #define PG_PS_FRAME (0x000fffffffe00000ull) 77 #else 78 #define PG_FRAME (~PAGE_MASK) 79 #define PG_PS_FRAME (0xffc00000) 80 #endif 81 #define PG_PROT (PG_RW|PG_U) /* all protection bits . */ 82 #define PG_N (PG_NC_PWT|PG_NC_PCD) /* Non-cacheable */ 83 84 /* 85 * Promotion to a 2 or 4MB (PDE) page mapping requires that the corresponding 86 * 4KB (PTE) page mappings have identical settings for the following fields: 87 */ 88 #define PG_PTE_PROMOTE (PG_MANAGED | PG_W | PG_G | PG_PTE_PAT | \ 89 PG_M | PG_A | PG_NC_PCD | PG_NC_PWT | PG_U | PG_RW | PG_V) 90 91 /* 92 * Page Protection Exception bits 93 */ 94 95 #define PGEX_P 0x01 /* Protection violation vs. not present */ 96 #define PGEX_W 0x02 /* during a Write cycle */ 97 #define PGEX_U 0x04 /* access from User mode (UPL) */ 98 #define PGEX_RSV 0x08 /* reserved PTE field is non-zero */ 99 #define PGEX_I 0x10 /* during an instruction fetch */ 100 101 /* 102 * Size of Kernel address space. This is the number of page table pages 103 * (4MB each) to use for the kernel. 256 pages == 1 Gigabyte. 104 * This **MUST** be a multiple of 4 (eg: 252, 256, 260, etc). 105 * For PAE, the page table page unit size is 2MB. This means that 512 pages 106 * is 1 Gigabyte. Double everything. It must be a multiple of 8 for PAE. 107 */ 108 #ifndef KVA_PAGES 109 #ifdef PAE 110 #define KVA_PAGES 512 111 #else 112 #define KVA_PAGES 256 113 #endif 114 #endif 115 116 /* 117 * Pte related macros 118 */ 119 #define VADDR(pdi, pti) ((vm_offset_t)(((pdi)<<PDRSHIFT)|((pti)<<PAGE_SHIFT))) 120 121 /* Initial number of kernel page tables. */ 122 #ifndef NKPT 123 #ifdef PAE 124 /* 152 page tables needed to map 16G (76B "struct vm_page", 2M page tables). */ 125 #define NKPT 240 126 #else 127 /* 18 page tables needed to map 4G (72B "struct vm_page", 4M page tables). */ 128 #define NKPT 30 129 #endif 130 #endif 131 132 #ifndef NKPDE 133 #define NKPDE (KVA_PAGES) /* number of page tables/pde's */ 134 #endif 135 136 /* 137 * The *PTDI values control the layout of virtual memory 138 * 139 * XXX This works for now, but I am not real happy with it, I'll fix it 140 * right after I fix locore.s and the magic 28K hole 141 */ 142 #define KPTDI (NPDEPTD-NKPDE) /* start of kernel virtual pde's */ 143 #define PTDPTDI (KPTDI-NPGPTD) /* ptd entry that points to ptd! */ 144 145 /* 146 * XXX doesn't really belong here I guess... 147 */ 148 #define ISA_HOLE_START 0xa0000 149 #define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START) 150 151 #ifndef LOCORE 152 153 #include <sys/queue.h> 154 #include <sys/_lock.h> 155 #include <sys/_mutex.h> 156 157 #ifdef PAE 158 159 typedef uint64_t pdpt_entry_t; 160 typedef uint64_t pd_entry_t; 161 typedef uint64_t pt_entry_t; 162 163 #define PTESHIFT (3) 164 #define PDESHIFT (3) 165 166 #else 167 168 typedef uint32_t pd_entry_t; 169 typedef uint32_t pt_entry_t; 170 171 #define PTESHIFT (2) 172 #define PDESHIFT (2) 173 174 #endif 175 176 /* 177 * Address of current and alternate address space page table maps 178 * and directories. 179 */ 180 #ifdef _KERNEL 181 extern pt_entry_t PTmap[]; 182 extern pd_entry_t PTD[]; 183 extern pd_entry_t PTDpde[]; 184 185 #ifdef PAE 186 extern pdpt_entry_t *IdlePDPT; 187 #endif 188 extern pd_entry_t *IdlePTD; /* physical address of "Idle" state directory */ 189 #endif 190 191 #ifdef _KERNEL 192 /* 193 * virtual address to page table entry and 194 * to physical address. 195 * Note: these work recursively, thus vtopte of a pte will give 196 * the corresponding pde that in turn maps it. 197 */ 198 #define vtopte(va) (PTmap + i386_btop(va)) 199 #define vtophys(va) pmap_kextract((vm_offset_t)(va)) 200 201 /* 202 * Routine: pmap_kextract 203 * Function: 204 * Extract the physical page address associated 205 * kernel virtual address. 206 */ 207 static __inline vm_paddr_t 208 pmap_kextract(vm_offset_t va) 209 { 210 vm_paddr_t pa; 211 212 if ((pa = PTD[va >> PDRSHIFT]) & PG_PS) { 213 pa = (pa & PG_PS_FRAME) | (va & PDRMASK); 214 } else { 215 pa = *vtopte(va); 216 pa = (pa & PG_FRAME) | (va & PAGE_MASK); 217 } 218 return pa; 219 } 220 221 #ifdef PAE 222 223 #define pde_cmpset(pdep, old, new) \ 224 atomic_cmpset_64((pdep), (old), (new)) 225 226 static __inline pt_entry_t 227 pte_load(pt_entry_t *ptep) 228 { 229 pt_entry_t r; 230 231 __asm __volatile( 232 "lock; cmpxchg8b %1" 233 : "=A" (r) 234 : "m" (*ptep), "a" (0), "d" (0), "b" (0), "c" (0)); 235 return (r); 236 } 237 238 static __inline pt_entry_t 239 pte_load_store(pt_entry_t *ptep, pt_entry_t v) 240 { 241 pt_entry_t r; 242 243 r = *ptep; 244 __asm __volatile( 245 "1:\n" 246 "\tlock; cmpxchg8b %1\n" 247 "\tjnz 1b" 248 : "+A" (r) 249 : "m" (*ptep), "b" ((uint32_t)v), "c" ((uint32_t)(v >> 32))); 250 return (r); 251 } 252 253 /* XXXRU move to atomic.h? */ 254 static __inline int 255 atomic_cmpset_64(volatile uint64_t *dst, uint64_t exp, uint64_t src) 256 { 257 int64_t res = exp; 258 259 __asm __volatile ( 260 " lock ; " 261 " cmpxchg8b %2 ; " 262 " setz %%al ; " 263 " movzbl %%al,%0 ; " 264 "# atomic_cmpset_64" 265 : "+A" (res), /* 0 (result) */ 266 "=m" (*dst) /* 1 */ 267 : "m" (*dst), /* 2 */ 268 "b" ((uint32_t)src), 269 "c" ((uint32_t)(src >> 32))); 270 271 return (res); 272 } 273 274 #define pte_load_clear(ptep) pte_load_store((ptep), (pt_entry_t)0ULL) 275 276 #define pte_store(ptep, pte) pte_load_store((ptep), (pt_entry_t)pte) 277 278 extern pt_entry_t pg_nx; 279 280 #else /* PAE */ 281 282 #define pde_cmpset(pdep, old, new) \ 283 atomic_cmpset_int((pdep), (old), (new)) 284 285 static __inline pt_entry_t 286 pte_load(pt_entry_t *ptep) 287 { 288 pt_entry_t r; 289 290 r = *ptep; 291 return (r); 292 } 293 294 static __inline pt_entry_t 295 pte_load_store(pt_entry_t *ptep, pt_entry_t pte) 296 { 297 pt_entry_t r; 298 299 __asm __volatile( 300 "xchgl %0,%1" 301 : "=m" (*ptep), 302 "=r" (r) 303 : "1" (pte), 304 "m" (*ptep)); 305 return (r); 306 } 307 308 #define pte_load_clear(pte) atomic_readandclear_int(pte) 309 310 static __inline void 311 pte_store(pt_entry_t *ptep, pt_entry_t pte) 312 { 313 314 *ptep = pte; 315 } 316 317 #endif /* PAE */ 318 319 #define pte_clear(ptep) pte_store((ptep), (pt_entry_t)0ULL) 320 321 #define pde_store(pdep, pde) pte_store((pdep), (pde)) 322 323 #endif /* _KERNEL */ 324 325 /* 326 * Pmap stuff 327 */ 328 struct pv_entry; 329 struct pv_chunk; 330 331 struct md_page { 332 TAILQ_HEAD(,pv_entry) pv_list; 333 }; 334 335 struct pmap { 336 struct mtx pm_mtx; 337 pd_entry_t *pm_pdir; /* KVA of page directory */ 338 TAILQ_HEAD(,pv_chunk) pm_pvchunk; /* list of mappings in pmap */ 339 u_int pm_active; /* active on cpus */ 340 struct pmap_statistics pm_stats; /* pmap statistics */ 341 LIST_ENTRY(pmap) pm_list; /* List of all pmaps */ 342 #ifdef PAE 343 pdpt_entry_t *pm_pdpt; /* KVA of page director pointer 344 table */ 345 #endif 346 vm_page_t pm_root; /* spare page table pages */ 347 }; 348 349 typedef struct pmap *pmap_t; 350 351 #ifdef _KERNEL 352 extern struct pmap kernel_pmap_store; 353 #define kernel_pmap (&kernel_pmap_store) 354 355 #define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx) 356 #define PMAP_LOCK_ASSERT(pmap, type) \ 357 mtx_assert(&(pmap)->pm_mtx, (type)) 358 #define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx) 359 #define PMAP_LOCK_INIT(pmap) mtx_init(&(pmap)->pm_mtx, "pmap", \ 360 NULL, MTX_DEF | MTX_DUPOK) 361 #define PMAP_LOCKED(pmap) mtx_owned(&(pmap)->pm_mtx) 362 #define PMAP_MTX(pmap) (&(pmap)->pm_mtx) 363 #define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx) 364 #define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx) 365 #endif 366 367 /* 368 * For each vm_page_t, there is a list of all currently valid virtual 369 * mappings of that page. An entry is a pv_entry_t, the list is pv_list. 370 */ 371 typedef struct pv_entry { 372 vm_offset_t pv_va; /* virtual address for mapping */ 373 TAILQ_ENTRY(pv_entry) pv_list; 374 } *pv_entry_t; 375 376 /* 377 * pv_entries are allocated in chunks per-process. This avoids the 378 * need to track per-pmap assignments. 379 */ 380 #define _NPCM 11 381 #define _NPCPV 336 382 struct pv_chunk { 383 pmap_t pc_pmap; 384 TAILQ_ENTRY(pv_chunk) pc_list; 385 uint32_t pc_map[_NPCM]; /* bitmap; 1 = free */ 386 uint32_t pc_spare[2]; 387 struct pv_entry pc_pventry[_NPCPV]; 388 }; 389 390 #ifdef _KERNEL 391 392 #define NPPROVMTRR 8 393 #define PPRO_VMTRRphysBase0 0x200 394 #define PPRO_VMTRRphysMask0 0x201 395 struct ppro_vmtrr { 396 u_int64_t base, mask; 397 }; 398 extern struct ppro_vmtrr PPro_vmtrr[NPPROVMTRR]; 399 400 extern caddr_t CADDR1; 401 extern pt_entry_t *CMAP1; 402 extern vm_paddr_t phys_avail[]; 403 extern vm_paddr_t dump_avail[]; 404 extern int pseflag; 405 extern int pgeflag; 406 extern char *ptvmmap; /* poor name! */ 407 extern vm_offset_t virtual_avail; 408 extern vm_offset_t virtual_end; 409 410 #define pmap_unmapbios(va, sz) pmap_unmapdev((va), (sz)) 411 412 void pmap_bootstrap(vm_paddr_t); 413 int pmap_change_attr(vm_offset_t, vm_size_t, int); 414 void pmap_init_pat(void); 415 void pmap_kenter(vm_offset_t va, vm_paddr_t pa); 416 void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode); 417 void *pmap_kenter_temporary(vm_paddr_t pa, int i); 418 void pmap_kremove(vm_offset_t); 419 void *pmap_mapbios(vm_paddr_t, vm_size_t); 420 void *pmap_mapdev(vm_paddr_t, vm_size_t); 421 void *pmap_mapdev_attr(vm_paddr_t, vm_size_t, int); 422 boolean_t pmap_page_is_mapped(vm_page_t m); 423 void pmap_unmapdev(vm_offset_t, vm_size_t); 424 pt_entry_t *pmap_pte(pmap_t, vm_offset_t) __pure2; 425 void pmap_set_pg(void); 426 void pmap_invalidate_page(pmap_t, vm_offset_t); 427 void pmap_invalidate_range(pmap_t, vm_offset_t, vm_offset_t); 428 void pmap_invalidate_all(pmap_t); 429 void pmap_invalidate_cache(void); 430 431 #endif /* _KERNEL */ 432 433 #endif /* !LOCORE */ 434 435 #endif /* !_MACHINE_PMAP_H_ */ 436