1 /*- 2 * Copyright (c) 1993 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Berkeley and its contributors. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $FreeBSD$ 34 */ 35 36 /* 37 * Functions to provide access to special i386 instructions. 38 */ 39 40 #ifndef _MACHINE_CPUFUNC_H_ 41 #define _MACHINE_CPUFUNC_H_ 42 43 #include <sys/cdefs.h> 44 #include <machine/psl.h> 45 46 __BEGIN_DECLS 47 #define readb(va) (*(volatile u_int8_t *) (va)) 48 #define readw(va) (*(volatile u_int16_t *) (va)) 49 #define readl(va) (*(volatile u_int32_t *) (va)) 50 51 #define writeb(va, d) (*(volatile u_int8_t *) (va) = (d)) 52 #define writew(va, d) (*(volatile u_int16_t *) (va) = (d)) 53 #define writel(va, d) (*(volatile u_int32_t *) (va) = (d)) 54 55 #define CRITICAL_FORK (read_eflags() | PSL_I) 56 57 #ifdef __GNUC__ 58 59 #ifdef SWTCH_OPTIM_STATS 60 extern int tlb_flush_count; /* XXX */ 61 #endif 62 63 static __inline void 64 breakpoint(void) 65 { 66 __asm __volatile("int $3"); 67 } 68 69 static __inline u_int 70 bsfl(u_int mask) 71 { 72 u_int result; 73 74 __asm __volatile("bsfl %1,%0" : "=r" (result) : "rm" (mask)); 75 return (result); 76 } 77 78 static __inline u_int 79 bsrl(u_int mask) 80 { 81 u_int result; 82 83 __asm __volatile("bsrl %1,%0" : "=r" (result) : "rm" (mask)); 84 return (result); 85 } 86 87 static __inline void 88 disable_intr(void) 89 { 90 __asm __volatile("cli" : : : "memory"); 91 } 92 93 static __inline void 94 enable_intr(void) 95 { 96 __asm __volatile("sti"); 97 } 98 99 #define HAVE_INLINE_FFS 100 101 static __inline int 102 ffs(int mask) 103 { 104 /* 105 * Note that gcc-2's builtin ffs would be used if we didn't declare 106 * this inline or turn off the builtin. The builtin is faster but 107 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and later 108 * versions. 109 */ 110 return (mask == 0 ? mask : bsfl((u_int)mask) + 1); 111 } 112 113 #define HAVE_INLINE_FLS 114 115 static __inline int 116 fls(int mask) 117 { 118 return (mask == 0 ? mask : bsrl((u_int)mask) + 1); 119 } 120 121 #if __GNUC__ < 2 122 123 #define inb(port) inbv(port) 124 #define outb(port, data) outbv(port, data) 125 126 #else /* __GNUC >= 2 */ 127 128 /* 129 * The following complications are to get around gcc not having a 130 * constraint letter for the range 0..255. We still put "d" in the 131 * constraint because "i" isn't a valid constraint when the port 132 * isn't constant. This only matters for -O0 because otherwise 133 * the non-working version gets optimized away. 134 * 135 * Use an expression-statement instead of a conditional expression 136 * because gcc-2.6.0 would promote the operands of the conditional 137 * and produce poor code for "if ((inb(var) & const1) == const2)". 138 * 139 * The unnecessary test `(port) < 0x10000' is to generate a warning if 140 * the `port' has type u_short or smaller. Such types are pessimal. 141 * This actually only works for signed types. The range check is 142 * careful to avoid generating warnings. 143 */ 144 #define inb(port) __extension__ ({ \ 145 u_char _data; \ 146 if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \ 147 && (port) < 0x10000) \ 148 _data = inbc(port); \ 149 else \ 150 _data = inbv(port); \ 151 _data; }) 152 153 #define outb(port, data) ( \ 154 __builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \ 155 && (port) < 0x10000 \ 156 ? outbc(port, data) : outbv(port, data)) 157 158 static __inline u_char 159 inbc(u_int port) 160 { 161 u_char data; 162 163 __asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port))); 164 return (data); 165 } 166 167 static __inline void 168 outbc(u_int port, u_char data) 169 { 170 __asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port))); 171 } 172 173 #endif /* __GNUC <= 2 */ 174 175 static __inline u_char 176 inbv(u_int port) 177 { 178 u_char data; 179 /* 180 * We use %%dx and not %1 here because i/o is done at %dx and not at 181 * %edx, while gcc generates inferior code (movw instead of movl) 182 * if we tell it to load (u_short) port. 183 */ 184 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 185 return (data); 186 } 187 188 static __inline u_int 189 inl(u_int port) 190 { 191 u_int data; 192 193 __asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port)); 194 return (data); 195 } 196 197 static __inline void 198 insb(u_int port, void *addr, size_t cnt) 199 { 200 __asm __volatile("cld; rep; insb" 201 : "+D" (addr), "+c" (cnt) 202 : "d" (port) 203 : "memory"); 204 } 205 206 static __inline void 207 insw(u_int port, void *addr, size_t cnt) 208 { 209 __asm __volatile("cld; rep; insw" 210 : "+D" (addr), "+c" (cnt) 211 : "d" (port) 212 : "memory"); 213 } 214 215 static __inline void 216 insl(u_int port, void *addr, size_t cnt) 217 { 218 __asm __volatile("cld; rep; insl" 219 : "+D" (addr), "+c" (cnt) 220 : "d" (port) 221 : "memory"); 222 } 223 224 static __inline void 225 invd(void) 226 { 227 __asm __volatile("invd"); 228 } 229 230 #if defined(SMP) && defined(_KERNEL) 231 232 /* 233 * When using APIC IPI's, invlpg() is not simply the invlpg instruction 234 * (this is a bug) and the inlining cost is prohibitive since the call 235 * executes into the IPI transmission system. 236 */ 237 void invlpg __P((u_int addr)); 238 void invltlb __P((void)); 239 240 static __inline void 241 cpu_invlpg(void *addr) 242 { 243 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory"); 244 } 245 246 static __inline void 247 cpu_invltlb(void) 248 { 249 u_int temp; 250 /* 251 * This should be implemented as load_cr3(rcr3()) when load_cr3() 252 * is inlined. 253 */ 254 __asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp) 255 : : "memory"); 256 #if defined(SWTCH_OPTIM_STATS) 257 ++tlb_flush_count; 258 #endif 259 } 260 261 #else /* !(SMP && _KERNEL) */ 262 263 static __inline void 264 invlpg(u_int addr) 265 { 266 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory"); 267 } 268 269 static __inline void 270 invltlb(void) 271 { 272 u_int temp; 273 /* 274 * This should be implemented as load_cr3(rcr3()) when load_cr3() 275 * is inlined. 276 */ 277 __asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp) 278 : : "memory"); 279 #ifdef SWTCH_OPTIM_STATS 280 ++tlb_flush_count; 281 #endif 282 } 283 284 #endif /* SMP && _KERNEL */ 285 286 static __inline u_short 287 inw(u_int port) 288 { 289 u_short data; 290 291 __asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port)); 292 return (data); 293 } 294 295 static __inline void 296 outbv(u_int port, u_char data) 297 { 298 u_char al; 299 /* 300 * Use an unnecessary assignment to help gcc's register allocator. 301 * This make a large difference for gcc-1.40 and a tiny difference 302 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 303 * best results. gcc-2.6.0 can't handle this. 304 */ 305 al = data; 306 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 307 } 308 309 static __inline void 310 outl(u_int port, u_int data) 311 { 312 /* 313 * outl() and outw() aren't used much so we haven't looked at 314 * possible micro-optimizations such as the unnecessary 315 * assignment for them. 316 */ 317 __asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port)); 318 } 319 320 static __inline void 321 outsb(u_int port, const void *addr, size_t cnt) 322 { 323 __asm __volatile("cld; rep; outsb" 324 : "+S" (addr), "+c" (cnt) 325 : "d" (port)); 326 } 327 328 static __inline void 329 outsw(u_int port, const void *addr, size_t cnt) 330 { 331 __asm __volatile("cld; rep; outsw" 332 : "+S" (addr), "+c" (cnt) 333 : "d" (port)); 334 } 335 336 static __inline void 337 outsl(u_int port, const void *addr, size_t cnt) 338 { 339 __asm __volatile("cld; rep; outsl" 340 : "+S" (addr), "+c" (cnt) 341 : "d" (port)); 342 } 343 344 static __inline void 345 outw(u_int port, u_short data) 346 { 347 __asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port)); 348 } 349 350 static __inline u_int 351 rcr2(void) 352 { 353 u_int data; 354 355 __asm __volatile("movl %%cr2,%0" : "=r" (data)); 356 return (data); 357 } 358 359 static __inline u_int 360 read_eflags(void) 361 { 362 u_int ef; 363 364 __asm __volatile("pushfl; popl %0" : "=r" (ef)); 365 return (ef); 366 } 367 368 static __inline void 369 do_cpuid(u_int ax, u_int *p) 370 { 371 __asm __volatile( 372 "cpuid" 373 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3]) 374 : "0" (ax) 375 ); 376 } 377 378 static __inline u_int64_t 379 rdmsr(u_int msr) 380 { 381 u_int64_t rv; 382 383 __asm __volatile("rdmsr" : "=A" (rv) : "c" (msr)); 384 return (rv); 385 } 386 387 static __inline u_int64_t 388 rdpmc(u_int pmc) 389 { 390 u_int64_t rv; 391 392 __asm __volatile("rdpmc" : "=A" (rv) : "c" (pmc)); 393 return (rv); 394 } 395 396 static __inline u_int64_t 397 rdtsc(void) 398 { 399 u_int64_t rv; 400 401 __asm __volatile("rdtsc" : "=A" (rv)); 402 return (rv); 403 } 404 405 static __inline void 406 wbinvd(void) 407 { 408 __asm __volatile("wbinvd"); 409 } 410 411 static __inline void 412 write_eflags(u_int ef) 413 { 414 __asm __volatile("pushl %0; popfl" : : "r" (ef)); 415 } 416 417 static __inline void 418 wrmsr(u_int msr, u_int64_t newval) 419 { 420 __asm __volatile("wrmsr" : : "A" (newval), "c" (msr)); 421 } 422 423 static __inline u_int 424 rfs(void) 425 { 426 u_int sel; 427 __asm __volatile("movl %%fs,%0" : "=rm" (sel)); 428 return (sel); 429 } 430 431 static __inline u_int 432 rgs(void) 433 { 434 u_int sel; 435 __asm __volatile("movl %%gs,%0" : "=rm" (sel)); 436 return (sel); 437 } 438 439 static __inline void 440 load_fs(u_int sel) 441 { 442 __asm __volatile("movl %0,%%fs" : : "rm" (sel)); 443 } 444 445 static __inline void 446 load_gs(u_int sel) 447 { 448 __asm __volatile("movl %0,%%gs" : : "rm" (sel)); 449 } 450 451 static __inline u_int 452 rdr0(void) 453 { 454 u_int data; 455 __asm __volatile("movl %%dr0,%0" : "=r" (data)); 456 return (data); 457 } 458 459 static __inline void 460 load_dr0(u_int sel) 461 { 462 __asm __volatile("movl %0,%%dr0" : : "r" (sel)); 463 } 464 465 static __inline u_int 466 rdr1(void) 467 { 468 u_int data; 469 __asm __volatile("movl %%dr1,%0" : "=r" (data)); 470 return (data); 471 } 472 473 static __inline void 474 load_dr1(u_int sel) 475 { 476 __asm __volatile("movl %0,%%dr1" : : "r" (sel)); 477 } 478 479 static __inline u_int 480 rdr2(void) 481 { 482 u_int data; 483 __asm __volatile("movl %%dr2,%0" : "=r" (data)); 484 return (data); 485 } 486 487 static __inline void 488 load_dr2(u_int sel) 489 { 490 __asm __volatile("movl %0,%%dr2" : : "r" (sel)); 491 } 492 493 static __inline u_int 494 rdr3(void) 495 { 496 u_int data; 497 __asm __volatile("movl %%dr3,%0" : "=r" (data)); 498 return (data); 499 } 500 501 static __inline void 502 load_dr3(u_int sel) 503 { 504 __asm __volatile("movl %0,%%dr3" : : "r" (sel)); 505 } 506 507 static __inline u_int 508 rdr4(void) 509 { 510 u_int data; 511 __asm __volatile("movl %%dr4,%0" : "=r" (data)); 512 return (data); 513 } 514 515 static __inline void 516 load_dr4(u_int sel) 517 { 518 __asm __volatile("movl %0,%%dr4" : : "r" (sel)); 519 } 520 521 static __inline u_int 522 rdr5(void) 523 { 524 u_int data; 525 __asm __volatile("movl %%dr5,%0" : "=r" (data)); 526 return (data); 527 } 528 529 static __inline void 530 load_dr5(u_int sel) 531 { 532 __asm __volatile("movl %0,%%dr5" : : "r" (sel)); 533 } 534 535 static __inline u_int 536 rdr6(void) 537 { 538 u_int data; 539 __asm __volatile("movl %%dr6,%0" : "=r" (data)); 540 return (data); 541 } 542 543 static __inline void 544 load_dr6(u_int sel) 545 { 546 __asm __volatile("movl %0,%%dr6" : : "r" (sel)); 547 } 548 549 static __inline u_int 550 rdr7(void) 551 { 552 u_int data; 553 __asm __volatile("movl %%dr7,%0" : "=r" (data)); 554 return (data); 555 } 556 557 static __inline void 558 load_dr7(u_int sel) 559 { 560 __asm __volatile("movl %0,%%dr7" : : "r" (sel)); 561 } 562 563 static __inline critical_t 564 cpu_critical_enter(void) 565 { 566 critical_t eflags; 567 568 eflags = read_eflags(); 569 disable_intr(); 570 return (eflags); 571 } 572 573 static __inline void 574 cpu_critical_exit(critical_t eflags) 575 { 576 write_eflags(eflags); 577 } 578 579 #else /* !__GNUC__ */ 580 581 int breakpoint __P((void)); 582 u_int bsfl __P((u_int mask)); 583 u_int bsrl __P((u_int mask)); 584 void disable_intr __P((void)); 585 void do_cpuid __P((u_int ax, u_int *p)); 586 void enable_intr __P((void)); 587 u_char inb __P((u_int port)); 588 u_int inl __P((u_int port)); 589 void insb __P((u_int port, void *addr, size_t cnt)); 590 void insl __P((u_int port, void *addr, size_t cnt)); 591 void insw __P((u_int port, void *addr, size_t cnt)); 592 void invd __P((void)); 593 void invlpg __P((u_int addr)); 594 void invltlb __P((void)); 595 u_short inw __P((u_int port)); 596 void outb __P((u_int port, u_char data)); 597 void outl __P((u_int port, u_int data)); 598 void outsb __P((u_int port, void *addr, size_t cnt)); 599 void outsl __P((u_int port, void *addr, size_t cnt)); 600 void outsw __P((u_int port, void *addr, size_t cnt)); 601 void outw __P((u_int port, u_short data)); 602 u_int rcr2 __P((void)); 603 u_int64_t rdmsr __P((u_int msr)); 604 u_int64_t rdpmc __P((u_int pmc)); 605 u_int64_t rdtsc __P((void)); 606 u_int read_eflags __P((void)); 607 void wbinvd __P((void)); 608 void write_eflags __P((u_int ef)); 609 void wrmsr __P((u_int msr, u_int64_t newval)); 610 u_int rfs __P((void)); 611 u_int rgs __P((void)); 612 void load_fs __P((u_int sel)); 613 void load_gs __P((u_int sel)); 614 critical_t cpu_critical_enter __P((void)); 615 void cpu_critical_exit __P((critical_t eflags)); 616 617 #endif /* __GNUC__ */ 618 619 void load_cr0 __P((u_int cr0)); 620 void load_cr3 __P((u_int cr3)); 621 void load_cr4 __P((u_int cr4)); 622 void ltr __P((u_short sel)); 623 u_int rcr0 __P((void)); 624 u_int rcr3 __P((void)); 625 u_int rcr4 __P((void)); 626 void reset_dbregs __P((void)); 627 __END_DECLS 628 629 #endif /* !_MACHINE_CPUFUNC_H_ */ 630