xref: /freebsd/sys/i386/include/cpufunc.h (revision e627b39baccd1ec9129690167cf5e6d860509655)
1 /*-
2  * Copyright (c) 1993 The Regents of the University of California.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  * 3. All advertising materials mentioning features or use of this software
14  *    must display the following acknowledgement:
15  *	This product includes software developed by the University of
16  *	California, Berkeley and its contributors.
17  * 4. Neither the name of the University nor the names of its contributors
18  *    may be used to endorse or promote products derived from this software
19  *    without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31  * SUCH DAMAGE.
32  *
33  *	$Id: cpufunc.h,v 1.58 1996/09/28 22:37:57 dyson Exp $
34  */
35 
36 /*
37  * Functions to provide access to special i386 instructions.
38  */
39 
40 #ifndef _MACHINE_CPUFUNC_H_
41 #define	_MACHINE_CPUFUNC_H_
42 
43 #include <sys/cdefs.h>
44 #include <sys/types.h>
45 
46 #ifdef	__GNUC__
47 
48 static __inline void
49 breakpoint(void)
50 {
51 	__asm __volatile("int $3");
52 }
53 
54 static __inline void
55 disable_intr(void)
56 {
57 	__asm __volatile("cli" : : : "memory");
58 }
59 
60 static __inline void
61 enable_intr(void)
62 {
63 	__asm __volatile("sti");
64 }
65 
66 #define	HAVE_INLINE_FFS
67 
68 static __inline int
69 ffs(int mask)
70 {
71 	int	result;
72 	/*
73 	 * bsfl turns out to be not all that slow on 486's.  It can beaten
74 	 * using a binary search to reduce to 4 bits and then a table lookup,
75 	 * but only if the code is inlined and in the cache, and the code
76 	 * is quite large so inlining it probably busts the cache.
77 	 *
78 	 * Note that gcc-2's builtin ffs would be used if we didn't declare
79 	 * this inline or turn off the builtin.  The builtin is faster but
80 	 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and 2.6.
81 	 */
82 	__asm __volatile("testl %0,%0; je 1f; bsfl %0,%0; incl %0; 1:"
83 			 : "=r" (result) : "0" (mask));
84 	return (result);
85 }
86 
87 #define	HAVE_INLINE_FLS
88 
89 static __inline int
90 fls(int mask)
91 {
92 	int	result;
93 	__asm __volatile("testl %0,%0; je 1f; bsrl %0,%0; incl %0; 1:"
94 			 : "=r" (result) : "0" (mask));
95 	return (result);
96 }
97 
98 #if __GNUC__ < 2
99 
100 #define	inb(port)		inbv(port)
101 #define	outb(port, data)	outbv(port, data)
102 
103 #else /* __GNUC >= 2 */
104 
105 /*
106  * The following complications are to get around gcc not having a
107  * constraint letter for the range 0..255.  We still put "d" in the
108  * constraint because "i" isn't a valid constraint when the port
109  * isn't constant.  This only matters for -O0 because otherwise
110  * the non-working version gets optimized away.
111  *
112  * Use an expression-statement instead of a conditional expression
113  * because gcc-2.6.0 would promote the operands of the conditional
114  * and produce poor code for "if ((inb(var) & const1) == const2)".
115  *
116  * The unnecessary test `(port) < 0x10000' is to generate a warning if
117  * the `port' has type u_short or smaller.  Such types are pessimal.
118  * This actually only works for signed types.  The range check is
119  * careful to avoid generating warnings.
120  */
121 #define	inb(port) __extension__ ({					\
122 	u_char	_data;							\
123 	if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100	\
124 	    && (port) < 0x10000)					\
125 		_data = inbc(port);					\
126 	else								\
127 		_data = inbv(port);					\
128 	_data; })
129 
130 #define	outb(port, data) (						\
131 	__builtin_constant_p(port) && ((port) & 0xffff) < 0x100		\
132 	&& (port) < 0x10000						\
133 	? outbc(port, data) : outbv(port, data))
134 
135 static __inline u_char
136 inbc(u_int port)
137 {
138 	u_char	data;
139 
140 	__asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port)));
141 	return (data);
142 }
143 
144 static __inline void
145 outbc(u_int port, u_char data)
146 {
147 	__asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port)));
148 }
149 
150 #endif /* __GNUC <= 2 */
151 
152 static __inline u_char
153 inbv(u_int port)
154 {
155 	u_char	data;
156 	/*
157 	 * We use %%dx and not %1 here because i/o is done at %dx and not at
158 	 * %edx, while gcc generates inferior code (movw instead of movl)
159 	 * if we tell it to load (u_short) port.
160 	 */
161 	__asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
162 	return (data);
163 }
164 
165 static __inline u_long
166 inl(u_int port)
167 {
168 	u_long	data;
169 
170 	__asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port));
171 	return (data);
172 }
173 
174 static __inline void
175 insb(u_int port, void *addr, size_t cnt)
176 {
177 	__asm __volatile("cld; rep; insb"
178 			 : : "d" (port), "D" (addr), "c" (cnt)
179 			 : "di", "cx", "memory");
180 }
181 
182 static __inline void
183 insw(u_int port, void *addr, size_t cnt)
184 {
185 	__asm __volatile("cld; rep; insw"
186 			 : : "d" (port), "D" (addr), "c" (cnt)
187 			 : "di", "cx", "memory");
188 }
189 
190 static __inline void
191 insl(u_int port, void *addr, size_t cnt)
192 {
193 	__asm __volatile("cld; rep; insl"
194 			 : : "d" (port), "D" (addr), "c" (cnt)
195 			 : "di", "cx", "memory");
196 }
197 
198 static __inline void
199 invlpg(u_int addr)
200 {
201 	__asm __volatile("invlpg (%0)" : : "r" (addr) : "memory");
202 }
203 
204 static __inline void
205 invltlb(void)
206 {
207 	u_long	temp;
208 	/*
209 	 * This should be implemented as load_cr3(rcr3()) when load_cr3()
210 	 * is inlined.
211 	 */
212 	__asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp)
213 			 : : "memory");
214 }
215 
216 static __inline u_short
217 inw(u_int port)
218 {
219 	u_short	data;
220 
221 	__asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port));
222 	return (data);
223 }
224 
225 static __inline u_int
226 loadandclear(u_int *addr)
227 {
228 	u_int	result;
229 
230 	__asm __volatile("xorl %0,%0; xchgl %1,%0"
231 			 : "=&r" (result) : "m" (*addr));
232 	return (result);
233 }
234 
235 static __inline void
236 outbv(u_int port, u_char data)
237 {
238 	u_char	al;
239 	/*
240 	 * Use an unnecessary assignment to help gcc's register allocator.
241 	 * This make a large difference for gcc-1.40 and a tiny difference
242 	 * for gcc-2.6.0.  For gcc-1.40, al had to be ``asm("ax")'' for
243 	 * best results.  gcc-2.6.0 can't handle this.
244 	 */
245 	al = data;
246 	__asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
247 }
248 
249 static __inline void
250 outl(u_int port, u_long data)
251 {
252 	/*
253 	 * outl() and outw() aren't used much so we haven't looked at
254 	 * possible micro-optimizations such as the unnecessary
255 	 * assignment for them.
256 	 */
257 	__asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port));
258 }
259 
260 static __inline void
261 outsb(u_int port, void *addr, size_t cnt)
262 {
263 	__asm __volatile("cld; rep; outsb"
264 			 : : "d" (port), "S" (addr), "c" (cnt)
265 			 : "si", "cx");
266 }
267 
268 static __inline void
269 outsw(u_int port, void *addr, size_t cnt)
270 {
271 	__asm __volatile("cld; rep; outsw"
272 			 : : "d" (port), "S" (addr), "c" (cnt)
273 			 : "si", "cx");
274 }
275 
276 static __inline void
277 outsl(u_int port, void *addr, size_t cnt)
278 {
279 	__asm __volatile("cld; rep; outsl"
280 			 : : "d" (port), "S" (addr), "c" (cnt)
281 			 : "si", "cx");
282 }
283 
284 static __inline void
285 outw(u_int port, u_short data)
286 {
287 	__asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port));
288 }
289 
290 static __inline u_long
291 rcr2(void)
292 {
293 	u_long	data;
294 
295 	__asm __volatile("movl %%cr2,%0" : "=r" (data));
296 	return (data);
297 }
298 
299 static __inline u_long
300 read_eflags(void)
301 {
302 	u_long	ef;
303 
304 	__asm __volatile("pushfl; popl %0" : "=r" (ef));
305 	return (ef);
306 }
307 
308 static __inline quad_t
309 rdmsr(u_int msr)
310 {
311 	quad_t rv;
312 
313 	__asm __volatile(".byte 0x0f, 0x32" : "=A" (rv) : "c" (msr));
314 	return (rv);
315 }
316 
317 static __inline quad_t
318 rdpmc(u_int pmc)
319 {
320 	quad_t rv;
321 
322 	__asm __volatile(".byte 0x0f, 0x33" : "=A" (rv) : "c" (pmc));
323 	return (rv);
324 }
325 
326 static __inline quad_t
327 rdtsc(void)
328 {
329 	quad_t rv;
330 
331 	__asm __volatile(".byte 0x0f, 0x31" : "=A" (rv));
332 	return (rv);
333 }
334 
335 static __inline void
336 setbits(volatile unsigned *addr, u_int bits)
337 {
338 	__asm __volatile("orl %1,%0" : "=m" (*addr) : "ir" (bits));
339 }
340 
341 static __inline void
342 write_eflags(u_long ef)
343 {
344 	__asm __volatile("pushl %0; popfl" : : "r" (ef));
345 }
346 
347 static __inline void
348 wrmsr(u_int msr, quad_t newval)
349 {
350 	__asm __volatile(".byte 0x0f, 0x30" : : "A" (newval), "c" (msr));
351 }
352 
353 #else /* !__GNUC__ */
354 
355 int	breakpoint	__P((void));
356 void	disable_intr	__P((void));
357 void	enable_intr	__P((void));
358 u_char	inb		__P((u_int port));
359 u_long	inl		__P((u_int port));
360 void	insb		__P((u_int port, void *addr, size_t cnt));
361 void	insl		__P((u_int port, void *addr, size_t cnt));
362 void	insw		__P((u_int port, void *addr, size_t cnt));
363 void	invlpg		__P((u_int addr));
364 void	invltlb		__P((void));
365 u_short	inw		__P((u_int port));
366 u_int	loadandclear	__P((u_int *addr));
367 void	outb		__P((u_int port, u_char data));
368 void	outl		__P((u_int port, u_long data));
369 void	outsb		__P((u_int port, void *addr, size_t cnt));
370 void	outsl		__P((u_int port, void *addr, size_t cnt));
371 void	outsw		__P((u_int port, void *addr, size_t cnt));
372 void	outw		__P((u_int port, u_short data));
373 u_long	rcr2		__P((void));
374 quad_t	rdmsr		__P((u_int msr));
375 quad_t	rdpmc		__P((u_int pmc));
376 quad_t	rdtsc		__P((void));
377 u_long	read_eflags	__P((void));
378 void	setbits		__P((volatile unsigned *addr, u_int bits));
379 void	write_eflags	__P((u_long ef));
380 void	wrmsr		__P((u_int msr, quad_t newval));
381 
382 #endif	/* __GNUC__ */
383 
384 void	load_cr0	__P((u_long cr0));
385 void	load_cr3	__P((u_long cr3));
386 void	ltr		__P((u_short sel));
387 u_int	rcr0		__P((void));
388 u_long	rcr3		__P((void));
389 
390 #include <machine/spl.h>	/* XXX belongs elsewhere */
391 
392 #endif /* !_MACHINE_CPUFUNC_H_ */
393