1 /*- 2 * Copyright (c) 1993 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Berkeley and its contributors. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $FreeBSD$ 34 */ 35 36 /* 37 * Functions to provide access to special i386 instructions. 38 */ 39 40 #ifndef _MACHINE_CPUFUNC_H_ 41 #define _MACHINE_CPUFUNC_H_ 42 43 #define readb(va) (*(volatile u_int8_t *) (va)) 44 #define readw(va) (*(volatile u_int16_t *) (va)) 45 #define readl(va) (*(volatile u_int32_t *) (va)) 46 47 #define writeb(va, d) (*(volatile u_int8_t *) (va) = (d)) 48 #define writew(va, d) (*(volatile u_int16_t *) (va) = (d)) 49 #define writel(va, d) (*(volatile u_int32_t *) (va) = (d)) 50 51 #ifdef __GNUC__ 52 53 #ifdef SWTCH_OPTIM_STATS 54 extern int tlb_flush_count; /* XXX */ 55 #endif 56 57 static __inline void 58 breakpoint(void) 59 { 60 __asm __volatile("int $3"); 61 } 62 63 static __inline u_int 64 bsfl(u_int mask) 65 { 66 u_int result; 67 68 __asm __volatile("bsfl %0,%0" : "=r" (result) : "0" (mask)); 69 return (result); 70 } 71 72 static __inline u_int 73 bsrl(u_int mask) 74 { 75 u_int result; 76 77 __asm __volatile("bsrl %0,%0" : "=r" (result) : "0" (mask)); 78 return (result); 79 } 80 81 static __inline void 82 disable_intr(void) 83 { 84 __asm __volatile("cli" : : : "memory"); 85 } 86 87 static __inline void 88 enable_intr(void) 89 { 90 __asm __volatile("sti"); 91 } 92 93 static __inline u_int 94 save_intr(void) 95 { 96 u_int ef; 97 98 __asm __volatile("pushfl; popl %0" : "=r" (ef)); 99 return (ef); 100 } 101 102 static __inline void 103 restore_intr(u_int ef) 104 { 105 __asm __volatile("pushl %0; popfl" : : "r" (ef) : "memory" ); 106 } 107 108 #define HAVE_INLINE_FFS 109 110 static __inline int 111 ffs(int mask) 112 { 113 /* 114 * Note that gcc-2's builtin ffs would be used if we didn't declare 115 * this inline or turn off the builtin. The builtin is faster but 116 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and later 117 * versions. 118 */ 119 return (mask == 0 ? mask : bsfl((u_int)mask) + 1); 120 } 121 122 #define HAVE_INLINE_FLS 123 124 static __inline int 125 fls(int mask) 126 { 127 return (mask == 0 ? mask : bsrl((u_int)mask) + 1); 128 } 129 130 #if __GNUC__ < 2 131 132 #define inb(port) inbv(port) 133 #define outb(port, data) outbv(port, data) 134 135 #else /* __GNUC >= 2 */ 136 137 /* 138 * The following complications are to get around gcc not having a 139 * constraint letter for the range 0..255. We still put "d" in the 140 * constraint because "i" isn't a valid constraint when the port 141 * isn't constant. This only matters for -O0 because otherwise 142 * the non-working version gets optimized away. 143 * 144 * Use an expression-statement instead of a conditional expression 145 * because gcc-2.6.0 would promote the operands of the conditional 146 * and produce poor code for "if ((inb(var) & const1) == const2)". 147 * 148 * The unnecessary test `(port) < 0x10000' is to generate a warning if 149 * the `port' has type u_short or smaller. Such types are pessimal. 150 * This actually only works for signed types. The range check is 151 * careful to avoid generating warnings. 152 */ 153 #define inb(port) __extension__ ({ \ 154 u_char _data; \ 155 if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \ 156 && (port) < 0x10000) \ 157 _data = inbc(port); \ 158 else \ 159 _data = inbv(port); \ 160 _data; }) 161 162 #define outb(port, data) ( \ 163 __builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \ 164 && (port) < 0x10000 \ 165 ? outbc(port, data) : outbv(port, data)) 166 167 static __inline u_char 168 inbc(u_int port) 169 { 170 u_char data; 171 172 __asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port))); 173 return (data); 174 } 175 176 static __inline void 177 outbc(u_int port, u_char data) 178 { 179 __asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port))); 180 } 181 182 #endif /* __GNUC <= 2 */ 183 184 static __inline u_char 185 inbv(u_int port) 186 { 187 u_char data; 188 /* 189 * We use %%dx and not %1 here because i/o is done at %dx and not at 190 * %edx, while gcc generates inferior code (movw instead of movl) 191 * if we tell it to load (u_short) port. 192 */ 193 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 194 return (data); 195 } 196 197 static __inline u_int 198 inl(u_int port) 199 { 200 u_int data; 201 202 __asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port)); 203 return (data); 204 } 205 206 static __inline void 207 insb(u_int port, void *addr, size_t cnt) 208 { 209 __asm __volatile("cld; rep; insb" 210 : "=D" (addr), "=c" (cnt) 211 : "0" (addr), "1" (cnt), "d" (port) 212 : "memory"); 213 } 214 215 static __inline void 216 insw(u_int port, void *addr, size_t cnt) 217 { 218 __asm __volatile("cld; rep; insw" 219 : "=D" (addr), "=c" (cnt) 220 : "0" (addr), "1" (cnt), "d" (port) 221 : "memory"); 222 } 223 224 static __inline void 225 insl(u_int port, void *addr, size_t cnt) 226 { 227 __asm __volatile("cld; rep; insl" 228 : "=D" (addr), "=c" (cnt) 229 : "0" (addr), "1" (cnt), "d" (port) 230 : "memory"); 231 } 232 233 static __inline void 234 invd(void) 235 { 236 __asm __volatile("invd"); 237 } 238 239 #if defined(SMP) && defined(_KERNEL) 240 241 /* 242 * When using APIC IPI's, invlpg() is not simply the invlpg instruction 243 * (this is a bug) and the inlining cost is prohibitive since the call 244 * executes into the IPI transmission system. 245 */ 246 void invlpg __P((u_int addr)); 247 void invltlb __P((void)); 248 249 static __inline void 250 cpu_invlpg(void *addr) 251 { 252 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory"); 253 } 254 255 static __inline void 256 cpu_invltlb(void) 257 { 258 u_int temp; 259 /* 260 * This should be implemented as load_cr3(rcr3()) when load_cr3() 261 * is inlined. 262 */ 263 __asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp) 264 : : "memory"); 265 #if defined(SWTCH_OPTIM_STATS) 266 ++tlb_flush_count; 267 #endif 268 } 269 270 #else /* !(SMP && _KERNEL) */ 271 272 static __inline void 273 invlpg(u_int addr) 274 { 275 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory"); 276 } 277 278 static __inline void 279 invltlb(void) 280 { 281 u_int temp; 282 /* 283 * This should be implemented as load_cr3(rcr3()) when load_cr3() 284 * is inlined. 285 */ 286 __asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp) 287 : : "memory"); 288 #ifdef SWTCH_OPTIM_STATS 289 ++tlb_flush_count; 290 #endif 291 } 292 293 #endif /* SMP && _KERNEL */ 294 295 static __inline u_short 296 inw(u_int port) 297 { 298 u_short data; 299 300 __asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port)); 301 return (data); 302 } 303 304 static __inline void 305 outbv(u_int port, u_char data) 306 { 307 u_char al; 308 /* 309 * Use an unnecessary assignment to help gcc's register allocator. 310 * This make a large difference for gcc-1.40 and a tiny difference 311 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 312 * best results. gcc-2.6.0 can't handle this. 313 */ 314 al = data; 315 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 316 } 317 318 static __inline void 319 outl(u_int port, u_int data) 320 { 321 /* 322 * outl() and outw() aren't used much so we haven't looked at 323 * possible micro-optimizations such as the unnecessary 324 * assignment for them. 325 */ 326 __asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port)); 327 } 328 329 static __inline void 330 outsb(u_int port, const void *addr, size_t cnt) 331 { 332 __asm __volatile("cld; rep; outsb" 333 : "=S" (addr), "=c" (cnt) 334 : "0" (addr), "1" (cnt), "d" (port)); 335 } 336 337 static __inline void 338 outsw(u_int port, const void *addr, size_t cnt) 339 { 340 __asm __volatile("cld; rep; outsw" 341 : "=S" (addr), "=c" (cnt) 342 : "0" (addr), "1" (cnt), "d" (port)); 343 } 344 345 static __inline void 346 outsl(u_int port, const void *addr, size_t cnt) 347 { 348 __asm __volatile("cld; rep; outsl" 349 : "=S" (addr), "=c" (cnt) 350 : "0" (addr), "1" (cnt), "d" (port)); 351 } 352 353 static __inline void 354 outw(u_int port, u_short data) 355 { 356 __asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port)); 357 } 358 359 static __inline u_int 360 rcr2(void) 361 { 362 u_int data; 363 364 __asm __volatile("movl %%cr2,%0" : "=r" (data)); 365 return (data); 366 } 367 368 static __inline u_int 369 read_eflags(void) 370 { 371 u_int ef; 372 373 __asm __volatile("pushfl; popl %0" : "=r" (ef)); 374 return (ef); 375 } 376 377 static __inline u_int64_t 378 rdmsr(u_int msr) 379 { 380 u_int64_t rv; 381 382 __asm __volatile("rdmsr" : "=A" (rv) : "c" (msr)); 383 return (rv); 384 } 385 386 static __inline u_int64_t 387 rdpmc(u_int pmc) 388 { 389 u_int64_t rv; 390 391 __asm __volatile("rdpmc" : "=A" (rv) : "c" (pmc)); 392 return (rv); 393 } 394 395 static __inline u_int64_t 396 rdtsc(void) 397 { 398 u_int64_t rv; 399 400 __asm __volatile("rdtsc" : "=A" (rv)); 401 return (rv); 402 } 403 404 static __inline void 405 wbinvd(void) 406 { 407 __asm __volatile("wbinvd"); 408 } 409 410 static __inline void 411 write_eflags(u_int ef) 412 { 413 __asm __volatile("pushl %0; popfl" : : "r" (ef)); 414 } 415 416 static __inline void 417 wrmsr(u_int msr, u_int64_t newval) 418 { 419 __asm __volatile("wrmsr" : : "A" (newval), "c" (msr)); 420 } 421 422 static __inline u_int 423 rfs(void) 424 { 425 u_int sel; 426 __asm __volatile("movl %%fs,%0" : "=rm" (sel)); 427 return (sel); 428 } 429 430 static __inline u_int 431 rgs(void) 432 { 433 u_int sel; 434 __asm __volatile("movl %%gs,%0" : "=rm" (sel)); 435 return (sel); 436 } 437 438 static __inline void 439 load_fs(u_int sel) 440 { 441 __asm __volatile("movl %0,%%fs" : : "rm" (sel)); 442 } 443 444 static __inline void 445 load_gs(u_int sel) 446 { 447 __asm __volatile("movl %0,%%gs" : : "rm" (sel)); 448 } 449 450 static __inline u_int 451 rdr0(void) 452 { 453 u_int data; 454 __asm __volatile("movl %%dr0,%0" : "=r" (data)); 455 return (data); 456 } 457 458 static __inline u_int 459 rdr1(void) 460 { 461 u_int data; 462 __asm __volatile("movl %%dr1,%0" : "=r" (data)); 463 return (data); 464 } 465 466 static __inline u_int 467 rdr2(void) 468 { 469 u_int data; 470 __asm __volatile("movl %%dr2,%0" : "=r" (data)); 471 return (data); 472 } 473 474 static __inline u_int 475 rdr3(void) 476 { 477 u_int data; 478 __asm __volatile("movl %%dr3,%0" : "=r" (data)); 479 return (data); 480 } 481 482 static __inline u_int 483 rdr6(void) 484 { 485 u_int data; 486 __asm __volatile("movl %%dr6,%0" : "=r" (data)); 487 return (data); 488 } 489 490 static __inline u_int 491 rdr7(void) 492 { 493 u_int data; 494 __asm __volatile("movl %%dr7,%0" : "=r" (data)); 495 return (data); 496 } 497 498 #else /* !__GNUC__ */ 499 500 int breakpoint __P((void)); 501 u_int bsfl __P((u_int mask)); 502 u_int bsrl __P((u_int mask)); 503 void disable_intr __P((void)); 504 void enable_intr __P((void)); 505 u_char inb __P((u_int port)); 506 u_int inl __P((u_int port)); 507 void insb __P((u_int port, void *addr, size_t cnt)); 508 void insl __P((u_int port, void *addr, size_t cnt)); 509 void insw __P((u_int port, void *addr, size_t cnt)); 510 void invd __P((void)); 511 void invlpg __P((u_int addr)); 512 void invltlb __P((void)); 513 u_short inw __P((u_int port)); 514 void outb __P((u_int port, u_char data)); 515 void outl __P((u_int port, u_int data)); 516 void outsb __P((u_int port, void *addr, size_t cnt)); 517 void outsl __P((u_int port, void *addr, size_t cnt)); 518 void outsw __P((u_int port, void *addr, size_t cnt)); 519 void outw __P((u_int port, u_short data)); 520 u_int rcr2 __P((void)); 521 u_int64_t rdmsr __P((u_int msr)); 522 u_int64_t rdpmc __P((u_int pmc)); 523 u_int64_t rdtsc __P((void)); 524 u_int read_eflags __P((void)); 525 void wbinvd __P((void)); 526 void write_eflags __P((u_int ef)); 527 void wrmsr __P((u_int msr, u_int64_t newval)); 528 u_int rfs __P((void)); 529 u_int rgs __P((void)); 530 void load_fs __P((u_int sel)); 531 void load_gs __P((u_int sel)); 532 533 #endif /* __GNUC__ */ 534 535 void load_cr0 __P((u_int cr0)); 536 void load_cr3 __P((u_int cr3)); 537 void load_cr4 __P((u_int cr4)); 538 void ltr __P((u_short sel)); 539 u_int rcr0 __P((void)); 540 u_int rcr3 __P((void)); 541 u_int rcr4 __P((void)); 542 void load_dr6 __P((u_int dr6)); 543 void reset_dbregs __P((void)); 544 545 #endif /* !_MACHINE_CPUFUNC_H_ */ 546