1 /*- 2 * Copyright (c) 1993 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 4. Neither the name of the University nor the names of its contributors 14 * may be used to endorse or promote products derived from this software 15 * without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD$ 30 */ 31 32 /* 33 * Functions to provide access to special i386 instructions. 34 * This in included in sys/systm.h, and that file should be 35 * used in preference to this. 36 */ 37 38 #ifndef _MACHINE_CPUFUNC_H_ 39 #define _MACHINE_CPUFUNC_H_ 40 41 #ifndef _SYS_CDEFS_H_ 42 #error this file needs sys/cdefs.h as a prerequisite 43 #endif 44 45 struct region_descriptor; 46 47 #define readb(va) (*(volatile uint8_t *) (va)) 48 #define readw(va) (*(volatile uint16_t *) (va)) 49 #define readl(va) (*(volatile uint32_t *) (va)) 50 51 #define writeb(va, d) (*(volatile uint8_t *) (va) = (d)) 52 #define writew(va, d) (*(volatile uint16_t *) (va) = (d)) 53 #define writel(va, d) (*(volatile uint32_t *) (va) = (d)) 54 55 #if defined(__GNUCLIKE_ASM) && defined(__CC_SUPPORTS___INLINE) 56 57 static __inline void 58 breakpoint(void) 59 { 60 __asm __volatile("int $3"); 61 } 62 63 static __inline u_int 64 bsfl(u_int mask) 65 { 66 u_int result; 67 68 __asm("bsfl %1,%0" : "=r" (result) : "rm" (mask) : "cc"); 69 return (result); 70 } 71 72 static __inline u_int 73 bsrl(u_int mask) 74 { 75 u_int result; 76 77 __asm("bsrl %1,%0" : "=r" (result) : "rm" (mask) : "cc"); 78 return (result); 79 } 80 81 static __inline void 82 clflush(u_long addr) 83 { 84 85 __asm __volatile("clflush %0" : : "m" (*(char *)addr)); 86 } 87 88 static __inline void 89 clts(void) 90 { 91 92 __asm __volatile("clts"); 93 } 94 95 static __inline void 96 disable_intr(void) 97 { 98 99 __asm __volatile("cli" : : : "memory"); 100 } 101 102 static __inline void 103 do_cpuid(u_int ax, u_int *p) 104 { 105 __asm __volatile("cpuid" 106 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3]) 107 : "0" (ax)); 108 } 109 110 static __inline void 111 cpuid_count(u_int ax, u_int cx, u_int *p) 112 { 113 __asm __volatile("cpuid" 114 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3]) 115 : "0" (ax), "c" (cx)); 116 } 117 118 static __inline void 119 enable_intr(void) 120 { 121 122 __asm __volatile("sti"); 123 } 124 125 static __inline void 126 cpu_monitor(const void *addr, u_long extensions, u_int hints) 127 { 128 129 __asm __volatile("monitor" 130 : : "a" (addr), "c" (extensions), "d" (hints)); 131 } 132 133 static __inline void 134 cpu_mwait(u_long extensions, u_int hints) 135 { 136 137 __asm __volatile("mwait" : : "a" (hints), "c" (extensions)); 138 } 139 140 static __inline void 141 lfence(void) 142 { 143 144 __asm __volatile("lfence" : : : "memory"); 145 } 146 147 static __inline void 148 mfence(void) 149 { 150 151 __asm __volatile("mfence" : : : "memory"); 152 } 153 154 #ifdef _KERNEL 155 156 #define HAVE_INLINE_FFS 157 158 static __inline int 159 ffs(int mask) 160 { 161 /* 162 * Note that gcc-2's builtin ffs would be used if we didn't declare 163 * this inline or turn off the builtin. The builtin is faster but 164 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and later 165 * versions. 166 */ 167 return (mask == 0 ? mask : (int)bsfl((u_int)mask) + 1); 168 } 169 170 #define HAVE_INLINE_FFSL 171 172 static __inline int 173 ffsl(long mask) 174 { 175 return (ffs((int)mask)); 176 } 177 178 #define HAVE_INLINE_FLS 179 180 static __inline int 181 fls(int mask) 182 { 183 return (mask == 0 ? mask : (int)bsrl((u_int)mask) + 1); 184 } 185 186 #define HAVE_INLINE_FLSL 187 188 static __inline int 189 flsl(long mask) 190 { 191 return (fls((int)mask)); 192 } 193 194 #endif /* _KERNEL */ 195 196 static __inline void 197 halt(void) 198 { 199 __asm __volatile("hlt"); 200 } 201 202 static __inline u_char 203 inb(u_int port) 204 { 205 u_char data; 206 207 __asm __volatile("inb %w1, %0" : "=a" (data) : "Nd" (port)); 208 return (data); 209 } 210 211 static __inline u_int 212 inl(u_int port) 213 { 214 u_int data; 215 216 __asm __volatile("inl %w1, %0" : "=a" (data) : "Nd" (port)); 217 return (data); 218 } 219 220 static __inline void 221 insb(u_int port, void *addr, size_t count) 222 { 223 __asm __volatile("cld; rep; insb" 224 : "+D" (addr), "+c" (count) 225 : "d" (port) 226 : "memory"); 227 } 228 229 static __inline void 230 insw(u_int port, void *addr, size_t count) 231 { 232 __asm __volatile("cld; rep; insw" 233 : "+D" (addr), "+c" (count) 234 : "d" (port) 235 : "memory"); 236 } 237 238 static __inline void 239 insl(u_int port, void *addr, size_t count) 240 { 241 __asm __volatile("cld; rep; insl" 242 : "+D" (addr), "+c" (count) 243 : "d" (port) 244 : "memory"); 245 } 246 247 static __inline void 248 invd(void) 249 { 250 __asm __volatile("invd"); 251 } 252 253 static __inline u_short 254 inw(u_int port) 255 { 256 u_short data; 257 258 __asm __volatile("inw %w1, %0" : "=a" (data) : "Nd" (port)); 259 return (data); 260 } 261 262 static __inline void 263 outb(u_int port, u_char data) 264 { 265 __asm __volatile("outb %0, %w1" : : "a" (data), "Nd" (port)); 266 } 267 268 static __inline void 269 outl(u_int port, u_int data) 270 { 271 __asm __volatile("outl %0, %w1" : : "a" (data), "Nd" (port)); 272 } 273 274 static __inline void 275 outsb(u_int port, const void *addr, size_t count) 276 { 277 __asm __volatile("cld; rep; outsb" 278 : "+S" (addr), "+c" (count) 279 : "d" (port)); 280 } 281 282 static __inline void 283 outsw(u_int port, const void *addr, size_t count) 284 { 285 __asm __volatile("cld; rep; outsw" 286 : "+S" (addr), "+c" (count) 287 : "d" (port)); 288 } 289 290 static __inline void 291 outsl(u_int port, const void *addr, size_t count) 292 { 293 __asm __volatile("cld; rep; outsl" 294 : "+S" (addr), "+c" (count) 295 : "d" (port)); 296 } 297 298 static __inline void 299 outw(u_int port, u_short data) 300 { 301 __asm __volatile("outw %0, %w1" : : "a" (data), "Nd" (port)); 302 } 303 304 static __inline void 305 ia32_pause(void) 306 { 307 __asm __volatile("pause"); 308 } 309 310 static __inline u_int 311 read_eflags(void) 312 { 313 u_int ef; 314 315 __asm __volatile("pushfl; popl %0" : "=r" (ef)); 316 return (ef); 317 } 318 319 static __inline uint64_t 320 rdmsr(u_int msr) 321 { 322 uint64_t rv; 323 324 __asm __volatile("rdmsr" : "=A" (rv) : "c" (msr)); 325 return (rv); 326 } 327 328 static __inline uint32_t 329 rdmsr32(u_int msr) 330 { 331 uint32_t low; 332 333 __asm __volatile("rdmsr" : "=a" (low) : "c" (msr) : "edx"); 334 return (low); 335 } 336 337 static __inline uint64_t 338 rdpmc(u_int pmc) 339 { 340 uint64_t rv; 341 342 __asm __volatile("rdpmc" : "=A" (rv) : "c" (pmc)); 343 return (rv); 344 } 345 346 static __inline uint64_t 347 rdtsc(void) 348 { 349 uint64_t rv; 350 351 __asm __volatile("rdtsc" : "=A" (rv)); 352 return (rv); 353 } 354 355 static __inline uint32_t 356 rdtsc32(void) 357 { 358 uint32_t rv; 359 360 __asm __volatile("rdtsc" : "=a" (rv) : : "edx"); 361 return (rv); 362 } 363 364 static __inline void 365 wbinvd(void) 366 { 367 __asm __volatile("wbinvd"); 368 } 369 370 static __inline void 371 write_eflags(u_int ef) 372 { 373 __asm __volatile("pushl %0; popfl" : : "r" (ef)); 374 } 375 376 static __inline void 377 wrmsr(u_int msr, uint64_t newval) 378 { 379 __asm __volatile("wrmsr" : : "A" (newval), "c" (msr)); 380 } 381 382 static __inline void 383 load_cr0(u_int data) 384 { 385 386 __asm __volatile("movl %0,%%cr0" : : "r" (data)); 387 } 388 389 static __inline u_int 390 rcr0(void) 391 { 392 u_int data; 393 394 __asm __volatile("movl %%cr0,%0" : "=r" (data)); 395 return (data); 396 } 397 398 static __inline u_int 399 rcr2(void) 400 { 401 u_int data; 402 403 __asm __volatile("movl %%cr2,%0" : "=r" (data)); 404 return (data); 405 } 406 407 static __inline void 408 load_cr3(u_int data) 409 { 410 411 __asm __volatile("movl %0,%%cr3" : : "r" (data) : "memory"); 412 } 413 414 static __inline u_int 415 rcr3(void) 416 { 417 u_int data; 418 419 __asm __volatile("movl %%cr3,%0" : "=r" (data)); 420 return (data); 421 } 422 423 static __inline void 424 load_cr4(u_int data) 425 { 426 __asm __volatile("movl %0,%%cr4" : : "r" (data)); 427 } 428 429 static __inline u_int 430 rcr4(void) 431 { 432 u_int data; 433 434 __asm __volatile("movl %%cr4,%0" : "=r" (data)); 435 return (data); 436 } 437 438 static __inline uint64_t 439 rxcr(u_int reg) 440 { 441 u_int low, high; 442 443 __asm __volatile("xgetbv" : "=a" (low), "=d" (high) : "c" (reg)); 444 return (low | ((uint64_t)high << 32)); 445 } 446 447 static __inline void 448 load_xcr(u_int reg, uint64_t val) 449 { 450 u_int low, high; 451 452 low = val; 453 high = val >> 32; 454 __asm __volatile("xsetbv" : : "c" (reg), "a" (low), "d" (high)); 455 } 456 457 /* 458 * Global TLB flush (except for thise for pages marked PG_G) 459 */ 460 static __inline void 461 invltlb(void) 462 { 463 464 load_cr3(rcr3()); 465 } 466 467 /* 468 * TLB flush for an individual page (even if it has PG_G). 469 * Only works on 486+ CPUs (i386 does not have PG_G). 470 */ 471 static __inline void 472 invlpg(u_int addr) 473 { 474 475 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory"); 476 } 477 478 static __inline u_short 479 rfs(void) 480 { 481 u_short sel; 482 __asm __volatile("movw %%fs,%0" : "=rm" (sel)); 483 return (sel); 484 } 485 486 static __inline uint64_t 487 rgdt(void) 488 { 489 uint64_t gdtr; 490 __asm __volatile("sgdt %0" : "=m" (gdtr)); 491 return (gdtr); 492 } 493 494 static __inline u_short 495 rgs(void) 496 { 497 u_short sel; 498 __asm __volatile("movw %%gs,%0" : "=rm" (sel)); 499 return (sel); 500 } 501 502 static __inline uint64_t 503 ridt(void) 504 { 505 uint64_t idtr; 506 __asm __volatile("sidt %0" : "=m" (idtr)); 507 return (idtr); 508 } 509 510 static __inline u_short 511 rldt(void) 512 { 513 u_short ldtr; 514 __asm __volatile("sldt %0" : "=g" (ldtr)); 515 return (ldtr); 516 } 517 518 static __inline u_short 519 rss(void) 520 { 521 u_short sel; 522 __asm __volatile("movw %%ss,%0" : "=rm" (sel)); 523 return (sel); 524 } 525 526 static __inline u_short 527 rtr(void) 528 { 529 u_short tr; 530 __asm __volatile("str %0" : "=g" (tr)); 531 return (tr); 532 } 533 534 static __inline void 535 load_fs(u_short sel) 536 { 537 __asm __volatile("movw %0,%%fs" : : "rm" (sel)); 538 } 539 540 static __inline void 541 load_gs(u_short sel) 542 { 543 __asm __volatile("movw %0,%%gs" : : "rm" (sel)); 544 } 545 546 static __inline void 547 lidt(struct region_descriptor *addr) 548 { 549 __asm __volatile("lidt (%0)" : : "r" (addr)); 550 } 551 552 static __inline void 553 lldt(u_short sel) 554 { 555 __asm __volatile("lldt %0" : : "r" (sel)); 556 } 557 558 static __inline void 559 ltr(u_short sel) 560 { 561 __asm __volatile("ltr %0" : : "r" (sel)); 562 } 563 564 static __inline u_int 565 rdr0(void) 566 { 567 u_int data; 568 __asm __volatile("movl %%dr0,%0" : "=r" (data)); 569 return (data); 570 } 571 572 static __inline void 573 load_dr0(u_int dr0) 574 { 575 __asm __volatile("movl %0,%%dr0" : : "r" (dr0)); 576 } 577 578 static __inline u_int 579 rdr1(void) 580 { 581 u_int data; 582 __asm __volatile("movl %%dr1,%0" : "=r" (data)); 583 return (data); 584 } 585 586 static __inline void 587 load_dr1(u_int dr1) 588 { 589 __asm __volatile("movl %0,%%dr1" : : "r" (dr1)); 590 } 591 592 static __inline u_int 593 rdr2(void) 594 { 595 u_int data; 596 __asm __volatile("movl %%dr2,%0" : "=r" (data)); 597 return (data); 598 } 599 600 static __inline void 601 load_dr2(u_int dr2) 602 { 603 __asm __volatile("movl %0,%%dr2" : : "r" (dr2)); 604 } 605 606 static __inline u_int 607 rdr3(void) 608 { 609 u_int data; 610 __asm __volatile("movl %%dr3,%0" : "=r" (data)); 611 return (data); 612 } 613 614 static __inline void 615 load_dr3(u_int dr3) 616 { 617 __asm __volatile("movl %0,%%dr3" : : "r" (dr3)); 618 } 619 620 static __inline u_int 621 rdr4(void) 622 { 623 u_int data; 624 __asm __volatile("movl %%dr4,%0" : "=r" (data)); 625 return (data); 626 } 627 628 static __inline void 629 load_dr4(u_int dr4) 630 { 631 __asm __volatile("movl %0,%%dr4" : : "r" (dr4)); 632 } 633 634 static __inline u_int 635 rdr5(void) 636 { 637 u_int data; 638 __asm __volatile("movl %%dr5,%0" : "=r" (data)); 639 return (data); 640 } 641 642 static __inline void 643 load_dr5(u_int dr5) 644 { 645 __asm __volatile("movl %0,%%dr5" : : "r" (dr5)); 646 } 647 648 static __inline u_int 649 rdr6(void) 650 { 651 u_int data; 652 __asm __volatile("movl %%dr6,%0" : "=r" (data)); 653 return (data); 654 } 655 656 static __inline void 657 load_dr6(u_int dr6) 658 { 659 __asm __volatile("movl %0,%%dr6" : : "r" (dr6)); 660 } 661 662 static __inline u_int 663 rdr7(void) 664 { 665 u_int data; 666 __asm __volatile("movl %%dr7,%0" : "=r" (data)); 667 return (data); 668 } 669 670 static __inline void 671 load_dr7(u_int dr7) 672 { 673 __asm __volatile("movl %0,%%dr7" : : "r" (dr7)); 674 } 675 676 static __inline u_char 677 read_cyrix_reg(u_char reg) 678 { 679 outb(0x22, reg); 680 return inb(0x23); 681 } 682 683 static __inline void 684 write_cyrix_reg(u_char reg, u_char data) 685 { 686 outb(0x22, reg); 687 outb(0x23, data); 688 } 689 690 static __inline register_t 691 intr_disable(void) 692 { 693 register_t eflags; 694 695 eflags = read_eflags(); 696 disable_intr(); 697 return (eflags); 698 } 699 700 static __inline void 701 intr_restore(register_t eflags) 702 { 703 write_eflags(eflags); 704 } 705 706 #else /* !(__GNUCLIKE_ASM && __CC_SUPPORTS___INLINE) */ 707 708 int breakpoint(void); 709 u_int bsfl(u_int mask); 710 u_int bsrl(u_int mask); 711 void clflush(u_long addr); 712 void clts(void); 713 void cpuid_count(u_int ax, u_int cx, u_int *p); 714 void disable_intr(void); 715 void do_cpuid(u_int ax, u_int *p); 716 void enable_intr(void); 717 void halt(void); 718 void ia32_pause(void); 719 u_char inb(u_int port); 720 u_int inl(u_int port); 721 void insb(u_int port, void *addr, size_t count); 722 void insl(u_int port, void *addr, size_t count); 723 void insw(u_int port, void *addr, size_t count); 724 register_t intr_disable(void); 725 void intr_restore(register_t ef); 726 void invd(void); 727 void invlpg(u_int addr); 728 void invltlb(void); 729 u_short inw(u_int port); 730 void lidt(struct region_descriptor *addr); 731 void lldt(u_short sel); 732 void load_cr0(u_int cr0); 733 void load_cr3(u_int cr3); 734 void load_cr4(u_int cr4); 735 void load_dr0(u_int dr0); 736 void load_dr1(u_int dr1); 737 void load_dr2(u_int dr2); 738 void load_dr3(u_int dr3); 739 void load_dr4(u_int dr4); 740 void load_dr5(u_int dr5); 741 void load_dr6(u_int dr6); 742 void load_dr7(u_int dr7); 743 void load_fs(u_short sel); 744 void load_gs(u_short sel); 745 void ltr(u_short sel); 746 void outb(u_int port, u_char data); 747 void outl(u_int port, u_int data); 748 void outsb(u_int port, const void *addr, size_t count); 749 void outsl(u_int port, const void *addr, size_t count); 750 void outsw(u_int port, const void *addr, size_t count); 751 void outw(u_int port, u_short data); 752 u_int rcr0(void); 753 u_int rcr2(void); 754 u_int rcr3(void); 755 u_int rcr4(void); 756 uint64_t rdmsr(u_int msr); 757 uint64_t rdpmc(u_int pmc); 758 u_int rdr0(void); 759 u_int rdr1(void); 760 u_int rdr2(void); 761 u_int rdr3(void); 762 u_int rdr4(void); 763 u_int rdr5(void); 764 u_int rdr6(void); 765 u_int rdr7(void); 766 uint64_t rdtsc(void); 767 u_char read_cyrix_reg(u_char reg); 768 u_int read_eflags(void); 769 u_int rfs(void); 770 uint64_t rgdt(void); 771 u_int rgs(void); 772 uint64_t ridt(void); 773 u_short rldt(void); 774 u_short rtr(void); 775 void wbinvd(void); 776 void write_cyrix_reg(u_char reg, u_char data); 777 void write_eflags(u_int ef); 778 void wrmsr(u_int msr, uint64_t newval); 779 780 #endif /* __GNUCLIKE_ASM && __CC_SUPPORTS___INLINE */ 781 782 void reset_dbregs(void); 783 784 #ifdef _KERNEL 785 int rdmsr_safe(u_int msr, uint64_t *val); 786 int wrmsr_safe(u_int msr, uint64_t newval); 787 #endif 788 789 #endif /* !_MACHINE_CPUFUNC_H_ */ 790