1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 1998 Doug Rabson 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 #ifndef _MACHINE_ATOMIC_H_ 31 #define _MACHINE_ATOMIC_H_ 32 33 #ifndef _SYS_CDEFS_H_ 34 #error this file needs sys/cdefs.h as a prerequisite 35 #endif 36 37 #include <sys/atomic_common.h> 38 39 #ifdef _KERNEL 40 #include <machine/md_var.h> 41 #include <machine/specialreg.h> 42 #endif 43 44 #ifndef __OFFSETOF_MONITORBUF 45 /* 46 * __OFFSETOF_MONITORBUF == __pcpu_offset(pc_monitorbuf). 47 * 48 * The open-coded number is used instead of the symbolic expression to 49 * avoid a dependency on sys/pcpu.h in machine/atomic.h consumers. 50 * An assertion in i386/vm_machdep.c ensures that the value is correct. 51 */ 52 #define __OFFSETOF_MONITORBUF 0x80 53 54 static __inline void 55 __mbk(void) 56 { 57 58 __asm __volatile("lock; addl $0,%%fs:%0" 59 : "+m" (*(u_int *)__OFFSETOF_MONITORBUF) : : "memory", "cc"); 60 } 61 62 static __inline void 63 __mbu(void) 64 { 65 66 __asm __volatile("lock; addl $0,(%%esp)" : : : "memory", "cc"); 67 } 68 #endif 69 70 /* 71 * Various simple operations on memory, each of which is atomic in the 72 * presence of interrupts and multiple processors. 73 * 74 * atomic_set_char(P, V) (*(u_char *)(P) |= (V)) 75 * atomic_clear_char(P, V) (*(u_char *)(P) &= ~(V)) 76 * atomic_add_char(P, V) (*(u_char *)(P) += (V)) 77 * atomic_subtract_char(P, V) (*(u_char *)(P) -= (V)) 78 * 79 * atomic_set_short(P, V) (*(u_short *)(P) |= (V)) 80 * atomic_clear_short(P, V) (*(u_short *)(P) &= ~(V)) 81 * atomic_add_short(P, V) (*(u_short *)(P) += (V)) 82 * atomic_subtract_short(P, V) (*(u_short *)(P) -= (V)) 83 * 84 * atomic_set_int(P, V) (*(u_int *)(P) |= (V)) 85 * atomic_clear_int(P, V) (*(u_int *)(P) &= ~(V)) 86 * atomic_add_int(P, V) (*(u_int *)(P) += (V)) 87 * atomic_subtract_int(P, V) (*(u_int *)(P) -= (V)) 88 * atomic_swap_int(P, V) (return (*(u_int *)(P)); *(u_int *)(P) = (V);) 89 * atomic_readandclear_int(P) (return (*(u_int *)(P)); *(u_int *)(P) = 0;) 90 * 91 * atomic_set_long(P, V) (*(u_long *)(P) |= (V)) 92 * atomic_clear_long(P, V) (*(u_long *)(P) &= ~(V)) 93 * atomic_add_long(P, V) (*(u_long *)(P) += (V)) 94 * atomic_subtract_long(P, V) (*(u_long *)(P) -= (V)) 95 * atomic_swap_long(P, V) (return (*(u_long *)(P)); *(u_long *)(P) = (V);) 96 * atomic_readandclear_long(P) (return (*(u_long *)(P)); *(u_long *)(P) = 0;) 97 */ 98 99 /* 100 * The above functions are expanded inline in the statically-linked 101 * kernel. Lock prefixes are generated if an SMP kernel is being 102 * built. 103 * 104 * Kernel modules call real functions which are built into the kernel. 105 * This allows kernel modules to be portable between UP and SMP systems. 106 */ 107 #if defined(KLD_MODULE) || !defined(__GNUCLIKE_ASM) 108 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \ 109 void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v); \ 110 void atomic_##NAME##_barr_##TYPE(volatile u_##TYPE *p, u_##TYPE v) 111 112 int atomic_cmpset_char(volatile u_char *dst, u_char expect, u_char src); 113 int atomic_cmpset_short(volatile u_short *dst, u_short expect, u_short src); 114 int atomic_cmpset_int(volatile u_int *dst, u_int expect, u_int src); 115 int atomic_fcmpset_char(volatile u_char *dst, u_char *expect, u_char src); 116 int atomic_fcmpset_short(volatile u_short *dst, u_short *expect, 117 u_short src); 118 int atomic_fcmpset_int(volatile u_int *dst, u_int *expect, u_int src); 119 u_int atomic_fetchadd_int(volatile u_int *p, u_int v); 120 int atomic_testandset_int(volatile u_int *p, u_int v); 121 int atomic_testandclear_int(volatile u_int *p, u_int v); 122 void atomic_thread_fence_acq(void); 123 void atomic_thread_fence_acq_rel(void); 124 void atomic_thread_fence_rel(void); 125 void atomic_thread_fence_seq_cst(void); 126 127 #define ATOMIC_LOAD(TYPE) \ 128 u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p) 129 #define ATOMIC_STORE(TYPE) \ 130 void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v) 131 132 int atomic_cmpset_64(volatile uint64_t *, uint64_t, uint64_t); 133 uint64_t atomic_load_acq_64(volatile uint64_t *); 134 void atomic_store_rel_64(volatile uint64_t *, uint64_t); 135 uint64_t atomic_swap_64(volatile uint64_t *, uint64_t); 136 uint64_t atomic_fetchadd_64(volatile uint64_t *, uint64_t); 137 138 #else /* !KLD_MODULE && __GNUCLIKE_ASM */ 139 140 /* 141 * For userland, always use lock prefixes so that the binaries will run 142 * on both SMP and !SMP systems. 143 */ 144 #if defined(SMP) || !defined(_KERNEL) 145 #define MPLOCKED "lock ; " 146 #else 147 #define MPLOCKED 148 #endif 149 150 /* 151 * The assembly is volatilized to avoid code chunk removal by the compiler. 152 * GCC aggressively reorders operations and memory clobbering is necessary 153 * in order to avoid that for memory barriers. 154 */ 155 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \ 156 static __inline void \ 157 atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\ 158 { \ 159 __asm __volatile(MPLOCKED OP \ 160 : "+m" (*p) \ 161 : CONS (V) \ 162 : "cc"); \ 163 } \ 164 \ 165 static __inline void \ 166 atomic_##NAME##_barr_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\ 167 { \ 168 __asm __volatile(MPLOCKED OP \ 169 : "+m" (*p) \ 170 : CONS (V) \ 171 : "memory", "cc"); \ 172 } \ 173 struct __hack 174 175 /* 176 * Atomic compare and set, used by the mutex functions. 177 * 178 * cmpset: 179 * if (*dst == expect) 180 * *dst = src 181 * 182 * fcmpset: 183 * if (*dst == *expect) 184 * *dst = src 185 * else 186 * *expect = *dst 187 * 188 * Returns 0 on failure, non-zero on success. 189 */ 190 #define ATOMIC_CMPSET(TYPE, CONS) \ 191 static __inline int \ 192 atomic_cmpset_##TYPE(volatile u_##TYPE *dst, u_##TYPE expect, u_##TYPE src) \ 193 { \ 194 u_char res; \ 195 \ 196 __asm __volatile( \ 197 " " MPLOCKED " " \ 198 " cmpxchg %3,%1 ; " \ 199 " sete %0 ; " \ 200 "# atomic_cmpset_" #TYPE " " \ 201 : "=q" (res), /* 0 */ \ 202 "+m" (*dst), /* 1 */ \ 203 "+a" (expect) /* 2 */ \ 204 : CONS (src) /* 3 */ \ 205 : "memory", "cc"); \ 206 return (res); \ 207 } \ 208 \ 209 static __inline int \ 210 atomic_fcmpset_##TYPE(volatile u_##TYPE *dst, u_##TYPE *expect, u_##TYPE src) \ 211 { \ 212 u_char res; \ 213 \ 214 __asm __volatile( \ 215 " " MPLOCKED " " \ 216 " cmpxchg %3,%1 ; " \ 217 " sete %0 ; " \ 218 "# atomic_fcmpset_" #TYPE " " \ 219 : "=q" (res), /* 0 */ \ 220 "+m" (*dst), /* 1 */ \ 221 "+a" (*expect) /* 2 */ \ 222 : CONS (src) /* 3 */ \ 223 : "memory", "cc"); \ 224 return (res); \ 225 } 226 227 ATOMIC_CMPSET(char, "q"); 228 ATOMIC_CMPSET(short, "r"); 229 ATOMIC_CMPSET(int, "r"); 230 231 /* 232 * Atomically add the value of v to the integer pointed to by p and return 233 * the previous value of *p. 234 */ 235 static __inline u_int 236 atomic_fetchadd_int(volatile u_int *p, u_int v) 237 { 238 239 __asm __volatile( 240 " " MPLOCKED " " 241 " xaddl %0,%1 ; " 242 "# atomic_fetchadd_int" 243 : "+r" (v), /* 0 */ 244 "+m" (*p) /* 1 */ 245 : : "cc"); 246 return (v); 247 } 248 249 static __inline int 250 atomic_testandset_int(volatile u_int *p, u_int v) 251 { 252 u_char res; 253 254 __asm __volatile( 255 " " MPLOCKED " " 256 " btsl %2,%1 ; " 257 " setc %0 ; " 258 "# atomic_testandset_int" 259 : "=q" (res), /* 0 */ 260 "+m" (*p) /* 1 */ 261 : "Ir" (v & 0x1f) /* 2 */ 262 : "cc"); 263 return (res); 264 } 265 266 static __inline int 267 atomic_testandclear_int(volatile u_int *p, u_int v) 268 { 269 u_char res; 270 271 __asm __volatile( 272 " " MPLOCKED " " 273 " btrl %2,%1 ; " 274 " setc %0 ; " 275 "# atomic_testandclear_int" 276 : "=q" (res), /* 0 */ 277 "+m" (*p) /* 1 */ 278 : "Ir" (v & 0x1f) /* 2 */ 279 : "cc"); 280 return (res); 281 } 282 283 /* 284 * We assume that a = b will do atomic loads and stores. Due to the 285 * IA32 memory model, a simple store guarantees release semantics. 286 * 287 * However, a load may pass a store if they are performed on distinct 288 * addresses, so we need Store/Load barrier for sequentially 289 * consistent fences in SMP kernels. We use "lock addl $0,mem" for a 290 * Store/Load barrier, as recommended by the AMD Software Optimization 291 * Guide, and not mfence. In the kernel, we use a private per-cpu 292 * cache line for "mem", to avoid introducing false data 293 * dependencies. In user space, we use the word at the top of the 294 * stack. 295 * 296 * For UP kernels, however, the memory of the single processor is 297 * always consistent, so we only need to stop the compiler from 298 * reordering accesses in a way that violates the semantics of acquire 299 * and release. 300 */ 301 302 #if defined(_KERNEL) 303 #if defined(SMP) 304 #define __storeload_barrier() __mbk() 305 #else /* _KERNEL && UP */ 306 #define __storeload_barrier() __compiler_membar() 307 #endif /* SMP */ 308 #else /* !_KERNEL */ 309 #define __storeload_barrier() __mbu() 310 #endif /* _KERNEL*/ 311 312 #define ATOMIC_LOAD(TYPE) \ 313 static __inline u_##TYPE \ 314 atomic_load_acq_##TYPE(volatile u_##TYPE *p) \ 315 { \ 316 u_##TYPE res; \ 317 \ 318 res = *p; \ 319 __compiler_membar(); \ 320 return (res); \ 321 } \ 322 struct __hack 323 324 #define ATOMIC_STORE(TYPE) \ 325 static __inline void \ 326 atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v) \ 327 { \ 328 \ 329 __compiler_membar(); \ 330 *p = v; \ 331 } \ 332 struct __hack 333 334 static __inline void 335 atomic_thread_fence_acq(void) 336 { 337 338 __compiler_membar(); 339 } 340 341 static __inline void 342 atomic_thread_fence_rel(void) 343 { 344 345 __compiler_membar(); 346 } 347 348 static __inline void 349 atomic_thread_fence_acq_rel(void) 350 { 351 352 __compiler_membar(); 353 } 354 355 static __inline void 356 atomic_thread_fence_seq_cst(void) 357 { 358 359 __storeload_barrier(); 360 } 361 362 #ifdef _KERNEL 363 364 #ifdef WANT_FUNCTIONS 365 int atomic_cmpset_64_i386(volatile uint64_t *, uint64_t, uint64_t); 366 int atomic_cmpset_64_i586(volatile uint64_t *, uint64_t, uint64_t); 367 uint64_t atomic_load_acq_64_i386(volatile uint64_t *); 368 uint64_t atomic_load_acq_64_i586(volatile uint64_t *); 369 void atomic_store_rel_64_i386(volatile uint64_t *, uint64_t); 370 void atomic_store_rel_64_i586(volatile uint64_t *, uint64_t); 371 uint64_t atomic_swap_64_i386(volatile uint64_t *, uint64_t); 372 uint64_t atomic_swap_64_i586(volatile uint64_t *, uint64_t); 373 #endif 374 375 /* I486 does not support SMP or CMPXCHG8B. */ 376 static __inline int 377 atomic_cmpset_64_i386(volatile uint64_t *dst, uint64_t expect, uint64_t src) 378 { 379 volatile uint32_t *p; 380 u_char res; 381 382 p = (volatile uint32_t *)dst; 383 __asm __volatile( 384 " pushfl ; " 385 " cli ; " 386 " xorl %1,%%eax ; " 387 " xorl %2,%%edx ; " 388 " orl %%edx,%%eax ; " 389 " jne 1f ; " 390 " movl %4,%1 ; " 391 " movl %5,%2 ; " 392 "1: " 393 " sete %3 ; " 394 " popfl" 395 : "+A" (expect), /* 0 */ 396 "+m" (*p), /* 1 */ 397 "+m" (*(p + 1)), /* 2 */ 398 "=q" (res) /* 3 */ 399 : "r" ((uint32_t)src), /* 4 */ 400 "r" ((uint32_t)(src >> 32)) /* 5 */ 401 : "memory", "cc"); 402 return (res); 403 } 404 405 static __inline uint64_t 406 atomic_load_acq_64_i386(volatile uint64_t *p) 407 { 408 volatile uint32_t *q; 409 uint64_t res; 410 411 q = (volatile uint32_t *)p; 412 __asm __volatile( 413 " pushfl ; " 414 " cli ; " 415 " movl %1,%%eax ; " 416 " movl %2,%%edx ; " 417 " popfl" 418 : "=&A" (res) /* 0 */ 419 : "m" (*q), /* 1 */ 420 "m" (*(q + 1)) /* 2 */ 421 : "memory"); 422 return (res); 423 } 424 425 static __inline void 426 atomic_store_rel_64_i386(volatile uint64_t *p, uint64_t v) 427 { 428 volatile uint32_t *q; 429 430 q = (volatile uint32_t *)p; 431 __asm __volatile( 432 " pushfl ; " 433 " cli ; " 434 " movl %%eax,%0 ; " 435 " movl %%edx,%1 ; " 436 " popfl" 437 : "=m" (*q), /* 0 */ 438 "=m" (*(q + 1)) /* 1 */ 439 : "A" (v) /* 2 */ 440 : "memory"); 441 } 442 443 static __inline uint64_t 444 atomic_swap_64_i386(volatile uint64_t *p, uint64_t v) 445 { 446 volatile uint32_t *q; 447 uint64_t res; 448 449 q = (volatile uint32_t *)p; 450 __asm __volatile( 451 " pushfl ; " 452 " cli ; " 453 " movl %1,%%eax ; " 454 " movl %2,%%edx ; " 455 " movl %4,%2 ; " 456 " movl %3,%1 ; " 457 " popfl" 458 : "=&A" (res), /* 0 */ 459 "+m" (*q), /* 1 */ 460 "+m" (*(q + 1)) /* 2 */ 461 : "r" ((uint32_t)v), /* 3 */ 462 "r" ((uint32_t)(v >> 32))); /* 4 */ 463 return (res); 464 } 465 466 static __inline int 467 atomic_cmpset_64_i586(volatile uint64_t *dst, uint64_t expect, uint64_t src) 468 { 469 u_char res; 470 471 __asm __volatile( 472 " " MPLOCKED " " 473 " cmpxchg8b %1 ; " 474 " sete %0" 475 : "=q" (res), /* 0 */ 476 "+m" (*dst), /* 1 */ 477 "+A" (expect) /* 2 */ 478 : "b" ((uint32_t)src), /* 3 */ 479 "c" ((uint32_t)(src >> 32)) /* 4 */ 480 : "memory", "cc"); 481 return (res); 482 } 483 484 static __inline uint64_t 485 atomic_load_acq_64_i586(volatile uint64_t *p) 486 { 487 uint64_t res; 488 489 __asm __volatile( 490 " movl %%ebx,%%eax ; " 491 " movl %%ecx,%%edx ; " 492 " " MPLOCKED " " 493 " cmpxchg8b %1" 494 : "=&A" (res), /* 0 */ 495 "+m" (*p) /* 1 */ 496 : : "memory", "cc"); 497 return (res); 498 } 499 500 static __inline void 501 atomic_store_rel_64_i586(volatile uint64_t *p, uint64_t v) 502 { 503 504 __asm __volatile( 505 " movl %%eax,%%ebx ; " 506 " movl %%edx,%%ecx ; " 507 "1: " 508 " " MPLOCKED " " 509 " cmpxchg8b %0 ; " 510 " jne 1b" 511 : "+m" (*p), /* 0 */ 512 "+A" (v) /* 1 */ 513 : : "ebx", "ecx", "memory", "cc"); 514 } 515 516 static __inline uint64_t 517 atomic_swap_64_i586(volatile uint64_t *p, uint64_t v) 518 { 519 520 __asm __volatile( 521 " movl %%eax,%%ebx ; " 522 " movl %%edx,%%ecx ; " 523 "1: " 524 " " MPLOCKED " " 525 " cmpxchg8b %0 ; " 526 " jne 1b" 527 : "+m" (*p), /* 0 */ 528 "+A" (v) /* 1 */ 529 : : "ebx", "ecx", "memory", "cc"); 530 return (v); 531 } 532 533 static __inline int 534 atomic_cmpset_64(volatile uint64_t *dst, uint64_t expect, uint64_t src) 535 { 536 537 if ((cpu_feature & CPUID_CX8) == 0) 538 return (atomic_cmpset_64_i386(dst, expect, src)); 539 else 540 return (atomic_cmpset_64_i586(dst, expect, src)); 541 } 542 543 static __inline uint64_t 544 atomic_load_acq_64(volatile uint64_t *p) 545 { 546 547 if ((cpu_feature & CPUID_CX8) == 0) 548 return (atomic_load_acq_64_i386(p)); 549 else 550 return (atomic_load_acq_64_i586(p)); 551 } 552 553 static __inline void 554 atomic_store_rel_64(volatile uint64_t *p, uint64_t v) 555 { 556 557 if ((cpu_feature & CPUID_CX8) == 0) 558 atomic_store_rel_64_i386(p, v); 559 else 560 atomic_store_rel_64_i586(p, v); 561 } 562 563 static __inline uint64_t 564 atomic_swap_64(volatile uint64_t *p, uint64_t v) 565 { 566 567 if ((cpu_feature & CPUID_CX8) == 0) 568 return (atomic_swap_64_i386(p, v)); 569 else 570 return (atomic_swap_64_i586(p, v)); 571 } 572 573 static __inline uint64_t 574 atomic_fetchadd_64(volatile uint64_t *p, uint64_t v) 575 { 576 577 for (;;) { 578 uint64_t t = *p; 579 if (atomic_cmpset_64(p, t, t + v)) 580 return (t); 581 } 582 } 583 584 #endif /* _KERNEL */ 585 586 #endif /* KLD_MODULE || !__GNUCLIKE_ASM */ 587 588 ATOMIC_ASM(set, char, "orb %b1,%0", "iq", v); 589 ATOMIC_ASM(clear, char, "andb %b1,%0", "iq", ~v); 590 ATOMIC_ASM(add, char, "addb %b1,%0", "iq", v); 591 ATOMIC_ASM(subtract, char, "subb %b1,%0", "iq", v); 592 593 ATOMIC_ASM(set, short, "orw %w1,%0", "ir", v); 594 ATOMIC_ASM(clear, short, "andw %w1,%0", "ir", ~v); 595 ATOMIC_ASM(add, short, "addw %w1,%0", "ir", v); 596 ATOMIC_ASM(subtract, short, "subw %w1,%0", "ir", v); 597 598 ATOMIC_ASM(set, int, "orl %1,%0", "ir", v); 599 ATOMIC_ASM(clear, int, "andl %1,%0", "ir", ~v); 600 ATOMIC_ASM(add, int, "addl %1,%0", "ir", v); 601 ATOMIC_ASM(subtract, int, "subl %1,%0", "ir", v); 602 603 ATOMIC_ASM(set, long, "orl %1,%0", "ir", v); 604 ATOMIC_ASM(clear, long, "andl %1,%0", "ir", ~v); 605 ATOMIC_ASM(add, long, "addl %1,%0", "ir", v); 606 ATOMIC_ASM(subtract, long, "subl %1,%0", "ir", v); 607 608 #define ATOMIC_LOADSTORE(TYPE) \ 609 ATOMIC_LOAD(TYPE); \ 610 ATOMIC_STORE(TYPE) 611 612 ATOMIC_LOADSTORE(char); 613 ATOMIC_LOADSTORE(short); 614 ATOMIC_LOADSTORE(int); 615 ATOMIC_LOADSTORE(long); 616 617 #undef ATOMIC_ASM 618 #undef ATOMIC_LOAD 619 #undef ATOMIC_STORE 620 #undef ATOMIC_LOADSTORE 621 622 #ifndef WANT_FUNCTIONS 623 624 static __inline int 625 atomic_cmpset_long(volatile u_long *dst, u_long expect, u_long src) 626 { 627 628 return (atomic_cmpset_int((volatile u_int *)dst, (u_int)expect, 629 (u_int)src)); 630 } 631 632 static __inline u_long 633 atomic_fetchadd_long(volatile u_long *p, u_long v) 634 { 635 636 return (atomic_fetchadd_int((volatile u_int *)p, (u_int)v)); 637 } 638 639 static __inline int 640 atomic_testandset_long(volatile u_long *p, u_int v) 641 { 642 643 return (atomic_testandset_int((volatile u_int *)p, v)); 644 } 645 646 static __inline int 647 atomic_testandclear_long(volatile u_long *p, u_int v) 648 { 649 650 return (atomic_testandclear_int((volatile u_int *)p, v)); 651 } 652 653 /* Read the current value and store a new value in the destination. */ 654 #ifdef __GNUCLIKE_ASM 655 656 static __inline u_int 657 atomic_swap_int(volatile u_int *p, u_int v) 658 { 659 660 __asm __volatile( 661 " xchgl %1,%0 ; " 662 "# atomic_swap_int" 663 : "+r" (v), /* 0 */ 664 "+m" (*p)); /* 1 */ 665 return (v); 666 } 667 668 static __inline u_long 669 atomic_swap_long(volatile u_long *p, u_long v) 670 { 671 672 return (atomic_swap_int((volatile u_int *)p, (u_int)v)); 673 } 674 675 #else /* !__GNUCLIKE_ASM */ 676 677 u_int atomic_swap_int(volatile u_int *p, u_int v); 678 u_long atomic_swap_long(volatile u_long *p, u_long v); 679 680 #endif /* __GNUCLIKE_ASM */ 681 682 #define atomic_set_acq_char atomic_set_barr_char 683 #define atomic_set_rel_char atomic_set_barr_char 684 #define atomic_clear_acq_char atomic_clear_barr_char 685 #define atomic_clear_rel_char atomic_clear_barr_char 686 #define atomic_add_acq_char atomic_add_barr_char 687 #define atomic_add_rel_char atomic_add_barr_char 688 #define atomic_subtract_acq_char atomic_subtract_barr_char 689 #define atomic_subtract_rel_char atomic_subtract_barr_char 690 #define atomic_cmpset_acq_char atomic_cmpset_char 691 #define atomic_cmpset_rel_char atomic_cmpset_char 692 #define atomic_fcmpset_acq_char atomic_fcmpset_char 693 #define atomic_fcmpset_rel_char atomic_fcmpset_char 694 695 #define atomic_set_acq_short atomic_set_barr_short 696 #define atomic_set_rel_short atomic_set_barr_short 697 #define atomic_clear_acq_short atomic_clear_barr_short 698 #define atomic_clear_rel_short atomic_clear_barr_short 699 #define atomic_add_acq_short atomic_add_barr_short 700 #define atomic_add_rel_short atomic_add_barr_short 701 #define atomic_subtract_acq_short atomic_subtract_barr_short 702 #define atomic_subtract_rel_short atomic_subtract_barr_short 703 #define atomic_cmpset_acq_short atomic_cmpset_short 704 #define atomic_cmpset_rel_short atomic_cmpset_short 705 #define atomic_fcmpset_acq_short atomic_fcmpset_short 706 #define atomic_fcmpset_rel_short atomic_fcmpset_short 707 708 #define atomic_set_acq_int atomic_set_barr_int 709 #define atomic_set_rel_int atomic_set_barr_int 710 #define atomic_clear_acq_int atomic_clear_barr_int 711 #define atomic_clear_rel_int atomic_clear_barr_int 712 #define atomic_add_acq_int atomic_add_barr_int 713 #define atomic_add_rel_int atomic_add_barr_int 714 #define atomic_subtract_acq_int atomic_subtract_barr_int 715 #define atomic_subtract_rel_int atomic_subtract_barr_int 716 #define atomic_cmpset_acq_int atomic_cmpset_int 717 #define atomic_cmpset_rel_int atomic_cmpset_int 718 #define atomic_fcmpset_acq_int atomic_fcmpset_int 719 #define atomic_fcmpset_rel_int atomic_fcmpset_int 720 721 #define atomic_set_acq_long atomic_set_barr_long 722 #define atomic_set_rel_long atomic_set_barr_long 723 #define atomic_clear_acq_long atomic_clear_barr_long 724 #define atomic_clear_rel_long atomic_clear_barr_long 725 #define atomic_add_acq_long atomic_add_barr_long 726 #define atomic_add_rel_long atomic_add_barr_long 727 #define atomic_subtract_acq_long atomic_subtract_barr_long 728 #define atomic_subtract_rel_long atomic_subtract_barr_long 729 #define atomic_cmpset_acq_long atomic_cmpset_long 730 #define atomic_cmpset_rel_long atomic_cmpset_long 731 #define atomic_fcmpset_acq_long atomic_fcmpset_long 732 #define atomic_fcmpset_rel_long atomic_fcmpset_long 733 734 #define atomic_readandclear_int(p) atomic_swap_int(p, 0) 735 #define atomic_readandclear_long(p) atomic_swap_long(p, 0) 736 737 /* Operations on 8-bit bytes. */ 738 #define atomic_set_8 atomic_set_char 739 #define atomic_set_acq_8 atomic_set_acq_char 740 #define atomic_set_rel_8 atomic_set_rel_char 741 #define atomic_clear_8 atomic_clear_char 742 #define atomic_clear_acq_8 atomic_clear_acq_char 743 #define atomic_clear_rel_8 atomic_clear_rel_char 744 #define atomic_add_8 atomic_add_char 745 #define atomic_add_acq_8 atomic_add_acq_char 746 #define atomic_add_rel_8 atomic_add_rel_char 747 #define atomic_subtract_8 atomic_subtract_char 748 #define atomic_subtract_acq_8 atomic_subtract_acq_char 749 #define atomic_subtract_rel_8 atomic_subtract_rel_char 750 #define atomic_load_acq_8 atomic_load_acq_char 751 #define atomic_store_rel_8 atomic_store_rel_char 752 #define atomic_cmpset_8 atomic_cmpset_char 753 #define atomic_cmpset_acq_8 atomic_cmpset_acq_char 754 #define atomic_cmpset_rel_8 atomic_cmpset_rel_char 755 #define atomic_fcmpset_8 atomic_fcmpset_char 756 #define atomic_fcmpset_acq_8 atomic_fcmpset_acq_char 757 #define atomic_fcmpset_rel_8 atomic_fcmpset_rel_char 758 759 /* Operations on 16-bit words. */ 760 #define atomic_set_16 atomic_set_short 761 #define atomic_set_acq_16 atomic_set_acq_short 762 #define atomic_set_rel_16 atomic_set_rel_short 763 #define atomic_clear_16 atomic_clear_short 764 #define atomic_clear_acq_16 atomic_clear_acq_short 765 #define atomic_clear_rel_16 atomic_clear_rel_short 766 #define atomic_add_16 atomic_add_short 767 #define atomic_add_acq_16 atomic_add_acq_short 768 #define atomic_add_rel_16 atomic_add_rel_short 769 #define atomic_subtract_16 atomic_subtract_short 770 #define atomic_subtract_acq_16 atomic_subtract_acq_short 771 #define atomic_subtract_rel_16 atomic_subtract_rel_short 772 #define atomic_load_acq_16 atomic_load_acq_short 773 #define atomic_store_rel_16 atomic_store_rel_short 774 #define atomic_cmpset_16 atomic_cmpset_short 775 #define atomic_cmpset_acq_16 atomic_cmpset_acq_short 776 #define atomic_cmpset_rel_16 atomic_cmpset_rel_short 777 #define atomic_fcmpset_16 atomic_fcmpset_short 778 #define atomic_fcmpset_acq_16 atomic_fcmpset_acq_short 779 #define atomic_fcmpset_rel_16 atomic_fcmpset_rel_short 780 781 /* Operations on 32-bit double words. */ 782 #define atomic_set_32 atomic_set_int 783 #define atomic_set_acq_32 atomic_set_acq_int 784 #define atomic_set_rel_32 atomic_set_rel_int 785 #define atomic_clear_32 atomic_clear_int 786 #define atomic_clear_acq_32 atomic_clear_acq_int 787 #define atomic_clear_rel_32 atomic_clear_rel_int 788 #define atomic_add_32 atomic_add_int 789 #define atomic_add_acq_32 atomic_add_acq_int 790 #define atomic_add_rel_32 atomic_add_rel_int 791 #define atomic_subtract_32 atomic_subtract_int 792 #define atomic_subtract_acq_32 atomic_subtract_acq_int 793 #define atomic_subtract_rel_32 atomic_subtract_rel_int 794 #define atomic_load_acq_32 atomic_load_acq_int 795 #define atomic_store_rel_32 atomic_store_rel_int 796 #define atomic_cmpset_32 atomic_cmpset_int 797 #define atomic_cmpset_acq_32 atomic_cmpset_acq_int 798 #define atomic_cmpset_rel_32 atomic_cmpset_rel_int 799 #define atomic_fcmpset_32 atomic_fcmpset_int 800 #define atomic_fcmpset_acq_32 atomic_fcmpset_acq_int 801 #define atomic_fcmpset_rel_32 atomic_fcmpset_rel_int 802 #define atomic_swap_32 atomic_swap_int 803 #define atomic_readandclear_32 atomic_readandclear_int 804 #define atomic_fetchadd_32 atomic_fetchadd_int 805 #define atomic_testandset_32 atomic_testandset_int 806 #define atomic_testandclear_32 atomic_testandclear_int 807 808 /* Operations on pointers. */ 809 #define atomic_set_ptr(p, v) \ 810 atomic_set_int((volatile u_int *)(p), (u_int)(v)) 811 #define atomic_set_acq_ptr(p, v) \ 812 atomic_set_acq_int((volatile u_int *)(p), (u_int)(v)) 813 #define atomic_set_rel_ptr(p, v) \ 814 atomic_set_rel_int((volatile u_int *)(p), (u_int)(v)) 815 #define atomic_clear_ptr(p, v) \ 816 atomic_clear_int((volatile u_int *)(p), (u_int)(v)) 817 #define atomic_clear_acq_ptr(p, v) \ 818 atomic_clear_acq_int((volatile u_int *)(p), (u_int)(v)) 819 #define atomic_clear_rel_ptr(p, v) \ 820 atomic_clear_rel_int((volatile u_int *)(p), (u_int)(v)) 821 #define atomic_add_ptr(p, v) \ 822 atomic_add_int((volatile u_int *)(p), (u_int)(v)) 823 #define atomic_add_acq_ptr(p, v) \ 824 atomic_add_acq_int((volatile u_int *)(p), (u_int)(v)) 825 #define atomic_add_rel_ptr(p, v) \ 826 atomic_add_rel_int((volatile u_int *)(p), (u_int)(v)) 827 #define atomic_subtract_ptr(p, v) \ 828 atomic_subtract_int((volatile u_int *)(p), (u_int)(v)) 829 #define atomic_subtract_acq_ptr(p, v) \ 830 atomic_subtract_acq_int((volatile u_int *)(p), (u_int)(v)) 831 #define atomic_subtract_rel_ptr(p, v) \ 832 atomic_subtract_rel_int((volatile u_int *)(p), (u_int)(v)) 833 #define atomic_load_acq_ptr(p) \ 834 atomic_load_acq_int((volatile u_int *)(p)) 835 #define atomic_store_rel_ptr(p, v) \ 836 atomic_store_rel_int((volatile u_int *)(p), (v)) 837 #define atomic_cmpset_ptr(dst, old, new) \ 838 atomic_cmpset_int((volatile u_int *)(dst), (u_int)(old), (u_int)(new)) 839 #define atomic_cmpset_acq_ptr(dst, old, new) \ 840 atomic_cmpset_acq_int((volatile u_int *)(dst), (u_int)(old), \ 841 (u_int)(new)) 842 #define atomic_cmpset_rel_ptr(dst, old, new) \ 843 atomic_cmpset_rel_int((volatile u_int *)(dst), (u_int)(old), \ 844 (u_int)(new)) 845 #define atomic_fcmpset_ptr(dst, old, new) \ 846 atomic_fcmpset_int((volatile u_int *)(dst), (u_int *)(old), (u_int)(new)) 847 #define atomic_fcmpset_acq_ptr(dst, old, new) \ 848 atomic_fcmpset_acq_int((volatile u_int *)(dst), (u_int *)(old), \ 849 (u_int)(new)) 850 #define atomic_fcmpset_rel_ptr(dst, old, new) \ 851 atomic_fcmpset_rel_int((volatile u_int *)(dst), (u_int *)(old), \ 852 (u_int)(new)) 853 #define atomic_swap_ptr(p, v) \ 854 atomic_swap_int((volatile u_int *)(p), (u_int)(v)) 855 #define atomic_readandclear_ptr(p) \ 856 atomic_readandclear_int((volatile u_int *)(p)) 857 858 #endif /* !WANT_FUNCTIONS */ 859 860 #if defined(_KERNEL) 861 #define mb() __mbk() 862 #define wmb() __mbk() 863 #define rmb() __mbk() 864 #else 865 #define mb() __mbu() 866 #define wmb() __mbu() 867 #define rmb() __mbu() 868 #endif 869 870 #endif /* !_MACHINE_ATOMIC_H_ */ 871