1 /*- 2 * Copyright (c) 1982, 1986 The Regents of the University of California. 3 * Copyright (c) 1989, 1990 William Jolitz 4 * Copyright (c) 1994 John Dyson 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department, and William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91 40 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$ 41 */ 42 43 #include <sys/cdefs.h> 44 __FBSDID("$FreeBSD$"); 45 46 #include "opt_isa.h" 47 #include "opt_npx.h" 48 #include "opt_reset.h" 49 #include "opt_cpu.h" 50 #include "opt_xbox.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/bio.h> 55 #include <sys/buf.h> 56 #include <sys/kernel.h> 57 #include <sys/ktr.h> 58 #include <sys/lock.h> 59 #include <sys/malloc.h> 60 #include <sys/mbuf.h> 61 #include <sys/mutex.h> 62 #include <sys/pioctl.h> 63 #include <sys/proc.h> 64 #include <sys/sysent.h> 65 #include <sys/sf_buf.h> 66 #include <sys/smp.h> 67 #include <sys/sched.h> 68 #include <sys/sysctl.h> 69 #include <sys/unistd.h> 70 #include <sys/vnode.h> 71 #include <sys/vmmeter.h> 72 73 #include <machine/cpu.h> 74 #include <machine/cputypes.h> 75 #include <machine/md_var.h> 76 #include <machine/pcb.h> 77 #include <machine/pcb_ext.h> 78 #include <machine/smp.h> 79 #include <machine/vm86.h> 80 81 #ifdef CPU_ELAN 82 #include <machine/elan_mmcr.h> 83 #endif 84 85 #include <vm/vm.h> 86 #include <vm/vm_extern.h> 87 #include <vm/vm_kern.h> 88 #include <vm/vm_page.h> 89 #include <vm/vm_map.h> 90 #include <vm/vm_param.h> 91 92 #ifdef XEN 93 #include <xen/hypervisor.h> 94 #endif 95 #ifdef PC98 96 #include <pc98/cbus/cbus.h> 97 #else 98 #include <isa/isareg.h> 99 #endif 100 101 #ifdef XBOX 102 #include <machine/xbox.h> 103 #endif 104 105 #ifndef NSFBUFS 106 #define NSFBUFS (512 + maxusers * 16) 107 #endif 108 109 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 110 #define CPU_ENABLE_SSE 111 #endif 112 113 _Static_assert(OFFSETOF_CURTHREAD == offsetof(struct pcpu, pc_curthread), 114 "OFFSETOF_CURTHREAD does not correspond with offset of pc_curthread."); 115 _Static_assert(OFFSETOF_CURPCB == offsetof(struct pcpu, pc_curpcb), 116 "OFFSETOF_CURPCB does not correspond with offset of pc_curpcb."); 117 118 static void cpu_reset_real(void); 119 #ifdef SMP 120 static void cpu_reset_proxy(void); 121 static u_int cpu_reset_proxyid; 122 static volatile u_int cpu_reset_proxy_active; 123 #endif 124 125 union savefpu * 126 get_pcb_user_save_td(struct thread *td) 127 { 128 vm_offset_t p; 129 130 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE - 131 cpu_max_ext_state_size; 132 KASSERT((p % 64) == 0, ("Unaligned pcb_user_save area")); 133 return ((union savefpu *)p); 134 } 135 136 union savefpu * 137 get_pcb_user_save_pcb(struct pcb *pcb) 138 { 139 vm_offset_t p; 140 141 p = (vm_offset_t)(pcb + 1); 142 return ((union savefpu *)p); 143 } 144 145 struct pcb * 146 get_pcb_td(struct thread *td) 147 { 148 vm_offset_t p; 149 150 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE - 151 cpu_max_ext_state_size - sizeof(struct pcb); 152 return ((struct pcb *)p); 153 } 154 155 void * 156 alloc_fpusave(int flags) 157 { 158 void *res; 159 #ifdef CPU_ENABLE_SSE 160 struct savefpu_ymm *sf; 161 #endif 162 163 res = malloc(cpu_max_ext_state_size, M_DEVBUF, flags); 164 #ifdef CPU_ENABLE_SSE 165 if (use_xsave) { 166 sf = (struct savefpu_ymm *)res; 167 bzero(&sf->sv_xstate.sx_hd, sizeof(sf->sv_xstate.sx_hd)); 168 sf->sv_xstate.sx_hd.xstate_bv = xsave_mask; 169 } 170 #endif 171 return (res); 172 } 173 /* 174 * Finish a fork operation, with process p2 nearly set up. 175 * Copy and update the pcb, set up the stack so that the child 176 * ready to run and return to user mode. 177 */ 178 void 179 cpu_fork(td1, p2, td2, flags) 180 register struct thread *td1; 181 register struct proc *p2; 182 struct thread *td2; 183 int flags; 184 { 185 register struct proc *p1; 186 struct pcb *pcb2; 187 struct mdproc *mdp2; 188 189 p1 = td1->td_proc; 190 if ((flags & RFPROC) == 0) { 191 if ((flags & RFMEM) == 0) { 192 /* unshare user LDT */ 193 struct mdproc *mdp1 = &p1->p_md; 194 struct proc_ldt *pldt, *pldt1; 195 196 mtx_lock_spin(&dt_lock); 197 if ((pldt1 = mdp1->md_ldt) != NULL && 198 pldt1->ldt_refcnt > 1) { 199 pldt = user_ldt_alloc(mdp1, pldt1->ldt_len); 200 if (pldt == NULL) 201 panic("could not copy LDT"); 202 mdp1->md_ldt = pldt; 203 set_user_ldt(mdp1); 204 user_ldt_deref(pldt1); 205 } else 206 mtx_unlock_spin(&dt_lock); 207 } 208 return; 209 } 210 211 /* Ensure that td1's pcb is up to date. */ 212 if (td1 == curthread) 213 td1->td_pcb->pcb_gs = rgs(); 214 #ifdef DEV_NPX 215 critical_enter(); 216 if (PCPU_GET(fpcurthread) == td1) 217 npxsave(td1->td_pcb->pcb_save); 218 critical_exit(); 219 #endif 220 221 /* Point the pcb to the top of the stack */ 222 pcb2 = get_pcb_td(td2); 223 td2->td_pcb = pcb2; 224 225 /* Copy td1's pcb */ 226 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2)); 227 228 /* Properly initialize pcb_save */ 229 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2); 230 bcopy(get_pcb_user_save_td(td1), get_pcb_user_save_pcb(pcb2), 231 cpu_max_ext_state_size); 232 233 /* Point mdproc and then copy over td1's contents */ 234 mdp2 = &p2->p_md; 235 bcopy(&p1->p_md, mdp2, sizeof(*mdp2)); 236 237 /* 238 * Create a new fresh stack for the new process. 239 * Copy the trap frame for the return to user mode as if from a 240 * syscall. This copies most of the user mode register values. 241 * The -16 is so we can expand the trapframe if we go to vm86. 242 */ 243 td2->td_frame = (struct trapframe *)((caddr_t)td2->td_pcb - 16) - 1; 244 bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe)); 245 246 td2->td_frame->tf_eax = 0; /* Child returns zero */ 247 td2->td_frame->tf_eflags &= ~PSL_C; /* success */ 248 td2->td_frame->tf_edx = 1; 249 250 /* 251 * If the parent process has the trap bit set (i.e. a debugger had 252 * single stepped the process to the system call), we need to clear 253 * the trap flag from the new frame unless the debugger had set PF_FORK 254 * on the parent. Otherwise, the child will receive a (likely 255 * unexpected) SIGTRAP when it executes the first instruction after 256 * returning to userland. 257 */ 258 if ((p1->p_pfsflags & PF_FORK) == 0) 259 td2->td_frame->tf_eflags &= ~PSL_T; 260 261 /* 262 * Set registers for trampoline to user mode. Leave space for the 263 * return address on stack. These are the kernel mode register values. 264 */ 265 #ifdef PAE 266 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdpt); 267 #else 268 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdir); 269 #endif 270 pcb2->pcb_edi = 0; 271 pcb2->pcb_esi = (int)fork_return; /* fork_trampoline argument */ 272 pcb2->pcb_ebp = 0; 273 pcb2->pcb_esp = (int)td2->td_frame - sizeof(void *); 274 pcb2->pcb_ebx = (int)td2; /* fork_trampoline argument */ 275 pcb2->pcb_eip = (int)fork_trampoline; 276 pcb2->pcb_psl = PSL_KERNEL; /* ints disabled */ 277 /*- 278 * pcb2->pcb_dr*: cloned above. 279 * pcb2->pcb_savefpu: cloned above. 280 * pcb2->pcb_flags: cloned above. 281 * pcb2->pcb_onfault: cloned above (always NULL here?). 282 * pcb2->pcb_gs: cloned above. 283 * pcb2->pcb_ext: cleared below. 284 */ 285 286 /* 287 * XXX don't copy the i/o pages. this should probably be fixed. 288 */ 289 pcb2->pcb_ext = 0; 290 291 /* Copy the LDT, if necessary. */ 292 mtx_lock_spin(&dt_lock); 293 if (mdp2->md_ldt != NULL) { 294 if (flags & RFMEM) { 295 mdp2->md_ldt->ldt_refcnt++; 296 } else { 297 mdp2->md_ldt = user_ldt_alloc(mdp2, 298 mdp2->md_ldt->ldt_len); 299 if (mdp2->md_ldt == NULL) 300 panic("could not copy LDT"); 301 } 302 } 303 mtx_unlock_spin(&dt_lock); 304 305 /* Setup to release spin count in fork_exit(). */ 306 td2->td_md.md_spinlock_count = 1; 307 /* 308 * XXX XEN need to check on PSL_USER is handled 309 */ 310 td2->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 311 /* 312 * Now, cpu_switch() can schedule the new process. 313 * pcb_esp is loaded pointing to the cpu_switch() stack frame 314 * containing the return address when exiting cpu_switch. 315 * This will normally be to fork_trampoline(), which will have 316 * %ebx loaded with the new proc's pointer. fork_trampoline() 317 * will set up a stack to call fork_return(p, frame); to complete 318 * the return to user-mode. 319 */ 320 } 321 322 /* 323 * Intercept the return address from a freshly forked process that has NOT 324 * been scheduled yet. 325 * 326 * This is needed to make kernel threads stay in kernel mode. 327 */ 328 void 329 cpu_set_fork_handler(td, func, arg) 330 struct thread *td; 331 void (*func)(void *); 332 void *arg; 333 { 334 /* 335 * Note that the trap frame follows the args, so the function 336 * is really called like this: func(arg, frame); 337 */ 338 td->td_pcb->pcb_esi = (int) func; /* function */ 339 td->td_pcb->pcb_ebx = (int) arg; /* first arg */ 340 } 341 342 void 343 cpu_exit(struct thread *td) 344 { 345 346 /* 347 * If this process has a custom LDT, release it. Reset pc->pcb_gs 348 * and %gs before we free it in case they refer to an LDT entry. 349 */ 350 mtx_lock_spin(&dt_lock); 351 if (td->td_proc->p_md.md_ldt) { 352 td->td_pcb->pcb_gs = _udatasel; 353 load_gs(_udatasel); 354 user_ldt_free(td); 355 } else 356 mtx_unlock_spin(&dt_lock); 357 } 358 359 void 360 cpu_thread_exit(struct thread *td) 361 { 362 363 #ifdef DEV_NPX 364 critical_enter(); 365 if (td == PCPU_GET(fpcurthread)) 366 npxdrop(); 367 critical_exit(); 368 #endif 369 370 /* Disable any hardware breakpoints. */ 371 if (td->td_pcb->pcb_flags & PCB_DBREGS) { 372 reset_dbregs(); 373 td->td_pcb->pcb_flags &= ~PCB_DBREGS; 374 } 375 } 376 377 void 378 cpu_thread_clean(struct thread *td) 379 { 380 struct pcb *pcb; 381 382 pcb = td->td_pcb; 383 if (pcb->pcb_ext != NULL) { 384 /* if (pcb->pcb_ext->ext_refcount-- == 1) ?? */ 385 /* 386 * XXX do we need to move the TSS off the allocated pages 387 * before freeing them? (not done here) 388 */ 389 kmem_free(kernel_arena, (vm_offset_t)pcb->pcb_ext, 390 ctob(IOPAGES + 1)); 391 pcb->pcb_ext = NULL; 392 } 393 } 394 395 void 396 cpu_thread_swapin(struct thread *td) 397 { 398 } 399 400 void 401 cpu_thread_swapout(struct thread *td) 402 { 403 } 404 405 void 406 cpu_thread_alloc(struct thread *td) 407 { 408 struct pcb *pcb; 409 #ifdef CPU_ENABLE_SSE 410 struct xstate_hdr *xhdr; 411 #endif 412 413 td->td_pcb = pcb = get_pcb_td(td); 414 td->td_frame = (struct trapframe *)((caddr_t)pcb - 16) - 1; 415 pcb->pcb_ext = NULL; 416 pcb->pcb_save = get_pcb_user_save_pcb(pcb); 417 #ifdef CPU_ENABLE_SSE 418 if (use_xsave) { 419 xhdr = (struct xstate_hdr *)(pcb->pcb_save + 1); 420 bzero(xhdr, sizeof(*xhdr)); 421 xhdr->xstate_bv = xsave_mask; 422 } 423 #endif 424 } 425 426 void 427 cpu_thread_free(struct thread *td) 428 { 429 430 cpu_thread_clean(td); 431 } 432 433 void 434 cpu_set_syscall_retval(struct thread *td, int error) 435 { 436 437 switch (error) { 438 case 0: 439 td->td_frame->tf_eax = td->td_retval[0]; 440 td->td_frame->tf_edx = td->td_retval[1]; 441 td->td_frame->tf_eflags &= ~PSL_C; 442 break; 443 444 case ERESTART: 445 /* 446 * Reconstruct pc, assuming lcall $X,y is 7 bytes, int 447 * 0x80 is 2 bytes. We saved this in tf_err. 448 */ 449 td->td_frame->tf_eip -= td->td_frame->tf_err; 450 break; 451 452 case EJUSTRETURN: 453 break; 454 455 default: 456 if (td->td_proc->p_sysent->sv_errsize) { 457 if (error >= td->td_proc->p_sysent->sv_errsize) 458 error = -1; /* XXX */ 459 else 460 error = td->td_proc->p_sysent->sv_errtbl[error]; 461 } 462 td->td_frame->tf_eax = error; 463 td->td_frame->tf_eflags |= PSL_C; 464 break; 465 } 466 } 467 468 /* 469 * Initialize machine state (pcb and trap frame) for a new thread about to 470 * upcall. Put enough state in the new thread's PCB to get it to go back 471 * userret(), where we can intercept it again to set the return (upcall) 472 * Address and stack, along with those from upcals that are from other sources 473 * such as those generated in thread_userret() itself. 474 */ 475 void 476 cpu_set_upcall(struct thread *td, struct thread *td0) 477 { 478 struct pcb *pcb2; 479 480 /* Point the pcb to the top of the stack. */ 481 pcb2 = td->td_pcb; 482 483 /* 484 * Copy the upcall pcb. This loads kernel regs. 485 * Those not loaded individually below get their default 486 * values here. 487 */ 488 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2)); 489 pcb2->pcb_flags &= ~(PCB_NPXINITDONE | PCB_NPXUSERINITDONE | 490 PCB_KERNNPX); 491 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2); 492 bcopy(get_pcb_user_save_td(td0), pcb2->pcb_save, 493 cpu_max_ext_state_size); 494 495 /* 496 * Create a new fresh stack for the new thread. 497 */ 498 bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe)); 499 500 /* If the current thread has the trap bit set (i.e. a debugger had 501 * single stepped the process to the system call), we need to clear 502 * the trap flag from the new frame. Otherwise, the new thread will 503 * receive a (likely unexpected) SIGTRAP when it executes the first 504 * instruction after returning to userland. 505 */ 506 td->td_frame->tf_eflags &= ~PSL_T; 507 508 /* 509 * Set registers for trampoline to user mode. Leave space for the 510 * return address on stack. These are the kernel mode register values. 511 */ 512 pcb2->pcb_edi = 0; 513 pcb2->pcb_esi = (int)fork_return; /* trampoline arg */ 514 pcb2->pcb_ebp = 0; 515 pcb2->pcb_esp = (int)td->td_frame - sizeof(void *); /* trampoline arg */ 516 pcb2->pcb_ebx = (int)td; /* trampoline arg */ 517 pcb2->pcb_eip = (int)fork_trampoline; 518 pcb2->pcb_psl &= ~(PSL_I); /* interrupts must be disabled */ 519 pcb2->pcb_gs = rgs(); 520 /* 521 * If we didn't copy the pcb, we'd need to do the following registers: 522 * pcb2->pcb_cr3: cloned above. 523 * pcb2->pcb_dr*: cloned above. 524 * pcb2->pcb_savefpu: cloned above. 525 * pcb2->pcb_flags: cloned above. 526 * pcb2->pcb_onfault: cloned above (always NULL here?). 527 * pcb2->pcb_gs: cloned above. 528 * pcb2->pcb_ext: cleared below. 529 */ 530 pcb2->pcb_ext = NULL; 531 532 /* Setup to release spin count in fork_exit(). */ 533 td->td_md.md_spinlock_count = 1; 534 td->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 535 } 536 537 /* 538 * Set that machine state for performing an upcall that has to 539 * be done in thread_userret() so that those upcalls generated 540 * in thread_userret() itself can be done as well. 541 */ 542 void 543 cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg, 544 stack_t *stack) 545 { 546 547 /* 548 * Do any extra cleaning that needs to be done. 549 * The thread may have optional components 550 * that are not present in a fresh thread. 551 * This may be a recycled thread so make it look 552 * as though it's newly allocated. 553 */ 554 cpu_thread_clean(td); 555 556 /* 557 * Set the trap frame to point at the beginning of the uts 558 * function. 559 */ 560 td->td_frame->tf_ebp = 0; 561 td->td_frame->tf_esp = 562 (((int)stack->ss_sp + stack->ss_size - 4) & ~0x0f) - 4; 563 td->td_frame->tf_eip = (int)entry; 564 565 /* 566 * Pass the address of the mailbox for this kse to the uts 567 * function as a parameter on the stack. 568 */ 569 suword((void *)(td->td_frame->tf_esp + sizeof(void *)), 570 (int)arg); 571 } 572 573 int 574 cpu_set_user_tls(struct thread *td, void *tls_base) 575 { 576 struct segment_descriptor sd; 577 uint32_t base; 578 579 /* 580 * Construct a descriptor and store it in the pcb for 581 * the next context switch. Also store it in the gdt 582 * so that the load of tf_fs into %fs will activate it 583 * at return to userland. 584 */ 585 base = (uint32_t)tls_base; 586 sd.sd_lobase = base & 0xffffff; 587 sd.sd_hibase = (base >> 24) & 0xff; 588 sd.sd_lolimit = 0xffff; /* 4GB limit, wraps around */ 589 sd.sd_hilimit = 0xf; 590 sd.sd_type = SDT_MEMRWA; 591 sd.sd_dpl = SEL_UPL; 592 sd.sd_p = 1; 593 sd.sd_xx = 0; 594 sd.sd_def32 = 1; 595 sd.sd_gran = 1; 596 critical_enter(); 597 /* set %gs */ 598 td->td_pcb->pcb_gsd = sd; 599 if (td == curthread) { 600 PCPU_GET(fsgs_gdt)[1] = sd; 601 load_gs(GSEL(GUGS_SEL, SEL_UPL)); 602 } 603 critical_exit(); 604 return (0); 605 } 606 607 /* 608 * Convert kernel VA to physical address 609 */ 610 vm_paddr_t 611 kvtop(void *addr) 612 { 613 vm_paddr_t pa; 614 615 pa = pmap_kextract((vm_offset_t)addr); 616 if (pa == 0) 617 panic("kvtop: zero page frame"); 618 return (pa); 619 } 620 621 #ifdef SMP 622 static void 623 cpu_reset_proxy() 624 { 625 cpuset_t tcrp; 626 627 cpu_reset_proxy_active = 1; 628 while (cpu_reset_proxy_active == 1) 629 ; /* Wait for other cpu to see that we've started */ 630 CPU_SETOF(cpu_reset_proxyid, &tcrp); 631 stop_cpus(tcrp); 632 printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid); 633 DELAY(1000000); 634 cpu_reset_real(); 635 } 636 #endif 637 638 void 639 cpu_reset() 640 { 641 #ifdef XBOX 642 if (arch_i386_is_xbox) { 643 /* Kick the PIC16L, it can reboot the box */ 644 pic16l_reboot(); 645 for (;;); 646 } 647 #endif 648 649 #ifdef SMP 650 cpuset_t map; 651 u_int cnt; 652 653 if (smp_started) { 654 map = all_cpus; 655 CPU_CLR(PCPU_GET(cpuid), &map); 656 CPU_NAND(&map, &stopped_cpus); 657 if (!CPU_EMPTY(&map)) { 658 printf("cpu_reset: Stopping other CPUs\n"); 659 stop_cpus(map); 660 } 661 662 if (PCPU_GET(cpuid) != 0) { 663 cpu_reset_proxyid = PCPU_GET(cpuid); 664 cpustop_restartfunc = cpu_reset_proxy; 665 cpu_reset_proxy_active = 0; 666 printf("cpu_reset: Restarting BSP\n"); 667 668 /* Restart CPU #0. */ 669 /* XXX: restart_cpus(1 << 0); */ 670 CPU_SETOF(0, &started_cpus); 671 wmb(); 672 673 cnt = 0; 674 while (cpu_reset_proxy_active == 0 && cnt < 10000000) 675 cnt++; /* Wait for BSP to announce restart */ 676 if (cpu_reset_proxy_active == 0) 677 printf("cpu_reset: Failed to restart BSP\n"); 678 enable_intr(); 679 cpu_reset_proxy_active = 2; 680 681 while (1); 682 /* NOTREACHED */ 683 } 684 685 DELAY(1000000); 686 } 687 #endif 688 cpu_reset_real(); 689 /* NOTREACHED */ 690 } 691 692 static void 693 cpu_reset_real() 694 { 695 struct region_descriptor null_idt; 696 #ifndef PC98 697 int b; 698 #endif 699 700 disable_intr(); 701 #ifdef XEN 702 if (smp_processor_id() == 0) 703 HYPERVISOR_shutdown(SHUTDOWN_reboot); 704 else 705 HYPERVISOR_shutdown(SHUTDOWN_poweroff); 706 #endif 707 #ifdef CPU_ELAN 708 if (elan_mmcr != NULL) 709 elan_mmcr->RESCFG = 1; 710 #endif 711 712 if (cpu == CPU_GEODE1100) { 713 /* Attempt Geode's own reset */ 714 outl(0xcf8, 0x80009044ul); 715 outl(0xcfc, 0xf); 716 } 717 718 #ifdef PC98 719 /* 720 * Attempt to do a CPU reset via CPU reset port. 721 */ 722 if ((inb(0x35) & 0xa0) != 0xa0) { 723 outb(0x37, 0x0f); /* SHUT0 = 0. */ 724 outb(0x37, 0x0b); /* SHUT1 = 0. */ 725 } 726 outb(0xf0, 0x00); /* Reset. */ 727 #else 728 #if !defined(BROKEN_KEYBOARD_RESET) 729 /* 730 * Attempt to do a CPU reset via the keyboard controller, 731 * do not turn off GateA20, as any machine that fails 732 * to do the reset here would then end up in no man's land. 733 */ 734 outb(IO_KBD + 4, 0xFE); 735 DELAY(500000); /* wait 0.5 sec to see if that did it */ 736 #endif 737 738 /* 739 * Attempt to force a reset via the Reset Control register at 740 * I/O port 0xcf9. Bit 2 forces a system reset when it 741 * transitions from 0 to 1. Bit 1 selects the type of reset 742 * to attempt: 0 selects a "soft" reset, and 1 selects a 743 * "hard" reset. We try a "hard" reset. The first write sets 744 * bit 1 to select a "hard" reset and clears bit 2. The 745 * second write forces a 0 -> 1 transition in bit 2 to trigger 746 * a reset. 747 */ 748 outb(0xcf9, 0x2); 749 outb(0xcf9, 0x6); 750 DELAY(500000); /* wait 0.5 sec to see if that did it */ 751 752 /* 753 * Attempt to force a reset via the Fast A20 and Init register 754 * at I/O port 0x92. Bit 1 serves as an alternate A20 gate. 755 * Bit 0 asserts INIT# when set to 1. We are careful to only 756 * preserve bit 1 while setting bit 0. We also must clear bit 757 * 0 before setting it if it isn't already clear. 758 */ 759 b = inb(0x92); 760 if (b != 0xff) { 761 if ((b & 0x1) != 0) 762 outb(0x92, b & 0xfe); 763 outb(0x92, b | 0x1); 764 DELAY(500000); /* wait 0.5 sec to see if that did it */ 765 } 766 #endif /* PC98 */ 767 768 printf("No known reset method worked, attempting CPU shutdown\n"); 769 DELAY(1000000); /* wait 1 sec for printf to complete */ 770 771 /* Wipe the IDT. */ 772 null_idt.rd_limit = 0; 773 null_idt.rd_base = 0; 774 lidt(&null_idt); 775 776 /* "good night, sweet prince .... <THUNK!>" */ 777 breakpoint(); 778 779 /* NOTREACHED */ 780 while(1); 781 } 782 783 /* 784 * Get an sf_buf from the freelist. May block if none are available. 785 */ 786 void 787 sf_buf_map(struct sf_buf *sf, int flags) 788 { 789 pt_entry_t opte, *ptep; 790 791 /* 792 * Update the sf_buf's virtual-to-physical mapping, flushing the 793 * virtual address from the TLB. Since the reference count for 794 * the sf_buf's old mapping was zero, that mapping is not 795 * currently in use. Consequently, there is no need to exchange 796 * the old and new PTEs atomically, even under PAE. 797 */ 798 ptep = vtopte(sf->kva); 799 opte = *ptep; 800 #ifdef XEN 801 PT_SET_MA(sf->kva, xpmap_ptom(VM_PAGE_TO_PHYS(sf->m)) | pgeflag 802 | PG_RW | PG_V | pmap_cache_bits(sf->m->md.pat_mode, 0)); 803 #else 804 *ptep = VM_PAGE_TO_PHYS(sf->m) | pgeflag | PG_RW | PG_V | 805 pmap_cache_bits(sf->m->md.pat_mode, 0); 806 #endif 807 808 /* 809 * Avoid unnecessary TLB invalidations: If the sf_buf's old 810 * virtual-to-physical mapping was not used, then any processor 811 * that has invalidated the sf_buf's virtual address from its TLB 812 * since the last used mapping need not invalidate again. 813 */ 814 #ifdef SMP 815 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 816 CPU_ZERO(&sf->cpumask); 817 818 sf_buf_shootdown(sf, flags); 819 #else 820 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 821 pmap_invalidate_page(kernel_pmap, sf->kva); 822 #endif 823 } 824 825 #ifdef SMP 826 void 827 sf_buf_shootdown(struct sf_buf *sf, int flags) 828 { 829 cpuset_t other_cpus; 830 u_int cpuid; 831 832 sched_pin(); 833 cpuid = PCPU_GET(cpuid); 834 if (!CPU_ISSET(cpuid, &sf->cpumask)) { 835 CPU_SET(cpuid, &sf->cpumask); 836 invlpg(sf->kva); 837 } 838 if ((flags & SFB_CPUPRIVATE) == 0) { 839 other_cpus = all_cpus; 840 CPU_CLR(cpuid, &other_cpus); 841 CPU_NAND(&other_cpus, &sf->cpumask); 842 if (!CPU_EMPTY(&other_cpus)) { 843 CPU_OR(&sf->cpumask, &other_cpus); 844 smp_masked_invlpg(other_cpus, sf->kva); 845 } 846 } 847 sched_unpin(); 848 } 849 #endif 850 851 /* 852 * MD part of sf_buf_free(). 853 */ 854 int 855 sf_buf_unmap(struct sf_buf *sf) 856 { 857 #ifdef XEN 858 /* 859 * Xen doesn't like having dangling R/W mappings 860 */ 861 pmap_qremove(sf->kva, 1); 862 return (1); 863 #else 864 return (0); 865 #endif 866 } 867 868 static void 869 sf_buf_invalidate(struct sf_buf *sf) 870 { 871 vm_page_t m = sf->m; 872 873 /* 874 * Use pmap_qenter to update the pte for 875 * existing mapping, in particular, the PAT 876 * settings are recalculated. 877 */ 878 pmap_qenter(sf->kva, &m, 1); 879 pmap_invalidate_cache_range(sf->kva, sf->kva + PAGE_SIZE, FALSE); 880 } 881 882 /* 883 * Invalidate the cache lines that may belong to the page, if 884 * (possibly old) mapping of the page by sf buffer exists. Returns 885 * TRUE when mapping was found and cache invalidated. 886 */ 887 boolean_t 888 sf_buf_invalidate_cache(vm_page_t m) 889 { 890 891 return (sf_buf_process_page(m, sf_buf_invalidate)); 892 } 893 894 /* 895 * Software interrupt handler for queued VM system processing. 896 */ 897 void 898 swi_vm(void *dummy) 899 { 900 if (busdma_swi_pending != 0) 901 busdma_swi(); 902 } 903 904 /* 905 * Tell whether this address is in some physical memory region. 906 * Currently used by the kernel coredump code in order to avoid 907 * dumping the ``ISA memory hole'' which could cause indefinite hangs, 908 * or other unpredictable behaviour. 909 */ 910 911 int 912 is_physical_memory(vm_paddr_t addr) 913 { 914 915 #ifdef DEV_ISA 916 /* The ISA ``memory hole''. */ 917 if (addr >= 0xa0000 && addr < 0x100000) 918 return 0; 919 #endif 920 921 /* 922 * stuff other tests for known memory-mapped devices (PCI?) 923 * here 924 */ 925 926 return 1; 927 } 928