1 /*- 2 * Copyright (c) 1982, 1986 The Regents of the University of California. 3 * Copyright (c) 1989, 1990 William Jolitz 4 * Copyright (c) 1994 John Dyson 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department, and William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91 40 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$ 41 */ 42 43 #include <sys/cdefs.h> 44 __FBSDID("$FreeBSD$"); 45 46 #include "opt_isa.h" 47 #include "opt_npx.h" 48 #include "opt_reset.h" 49 #include "opt_cpu.h" 50 #include "opt_xbox.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/bio.h> 55 #include <sys/buf.h> 56 #include <sys/kernel.h> 57 #include <sys/ktr.h> 58 #include <sys/lock.h> 59 #include <sys/malloc.h> 60 #include <sys/mbuf.h> 61 #include <sys/mutex.h> 62 #include <sys/pioctl.h> 63 #include <sys/proc.h> 64 #include <sys/sysent.h> 65 #include <sys/sf_buf.h> 66 #include <sys/smp.h> 67 #include <sys/sched.h> 68 #include <sys/sysctl.h> 69 #include <sys/unistd.h> 70 #include <sys/vnode.h> 71 #include <sys/vmmeter.h> 72 73 #include <machine/cpu.h> 74 #include <machine/cputypes.h> 75 #include <machine/md_var.h> 76 #include <machine/pcb.h> 77 #include <machine/pcb_ext.h> 78 #include <machine/smp.h> 79 #include <machine/vm86.h> 80 81 #ifdef CPU_ELAN 82 #include <machine/elan_mmcr.h> 83 #endif 84 85 #include <vm/vm.h> 86 #include <vm/vm_extern.h> 87 #include <vm/vm_kern.h> 88 #include <vm/vm_page.h> 89 #include <vm/vm_map.h> 90 #include <vm/vm_param.h> 91 92 #ifdef PC98 93 #include <pc98/cbus/cbus.h> 94 #else 95 #include <isa/isareg.h> 96 #endif 97 98 #ifdef XBOX 99 #include <machine/xbox.h> 100 #endif 101 102 #ifndef NSFBUFS 103 #define NSFBUFS (512 + maxusers * 16) 104 #endif 105 106 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 107 #define CPU_ENABLE_SSE 108 #endif 109 110 _Static_assert(OFFSETOF_CURTHREAD == offsetof(struct pcpu, pc_curthread), 111 "OFFSETOF_CURTHREAD does not correspond with offset of pc_curthread."); 112 _Static_assert(OFFSETOF_CURPCB == offsetof(struct pcpu, pc_curpcb), 113 "OFFSETOF_CURPCB does not correspond with offset of pc_curpcb."); 114 115 static void cpu_reset_real(void); 116 #ifdef SMP 117 static void cpu_reset_proxy(void); 118 static u_int cpu_reset_proxyid; 119 static volatile u_int cpu_reset_proxy_active; 120 #endif 121 122 union savefpu * 123 get_pcb_user_save_td(struct thread *td) 124 { 125 vm_offset_t p; 126 127 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE - 128 cpu_max_ext_state_size; 129 KASSERT((p % 64) == 0, ("Unaligned pcb_user_save area")); 130 return ((union savefpu *)p); 131 } 132 133 union savefpu * 134 get_pcb_user_save_pcb(struct pcb *pcb) 135 { 136 vm_offset_t p; 137 138 p = (vm_offset_t)(pcb + 1); 139 return ((union savefpu *)p); 140 } 141 142 struct pcb * 143 get_pcb_td(struct thread *td) 144 { 145 vm_offset_t p; 146 147 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE - 148 cpu_max_ext_state_size - sizeof(struct pcb); 149 return ((struct pcb *)p); 150 } 151 152 void * 153 alloc_fpusave(int flags) 154 { 155 void *res; 156 #ifdef CPU_ENABLE_SSE 157 struct savefpu_ymm *sf; 158 #endif 159 160 res = malloc(cpu_max_ext_state_size, M_DEVBUF, flags); 161 #ifdef CPU_ENABLE_SSE 162 if (use_xsave) { 163 sf = (struct savefpu_ymm *)res; 164 bzero(&sf->sv_xstate.sx_hd, sizeof(sf->sv_xstate.sx_hd)); 165 sf->sv_xstate.sx_hd.xstate_bv = xsave_mask; 166 } 167 #endif 168 return (res); 169 } 170 /* 171 * Finish a fork operation, with process p2 nearly set up. 172 * Copy and update the pcb, set up the stack so that the child 173 * ready to run and return to user mode. 174 */ 175 void 176 cpu_fork(td1, p2, td2, flags) 177 register struct thread *td1; 178 register struct proc *p2; 179 struct thread *td2; 180 int flags; 181 { 182 register struct proc *p1; 183 struct pcb *pcb2; 184 struct mdproc *mdp2; 185 186 p1 = td1->td_proc; 187 if ((flags & RFPROC) == 0) { 188 if ((flags & RFMEM) == 0) { 189 /* unshare user LDT */ 190 struct mdproc *mdp1 = &p1->p_md; 191 struct proc_ldt *pldt, *pldt1; 192 193 mtx_lock_spin(&dt_lock); 194 if ((pldt1 = mdp1->md_ldt) != NULL && 195 pldt1->ldt_refcnt > 1) { 196 pldt = user_ldt_alloc(mdp1, pldt1->ldt_len); 197 if (pldt == NULL) 198 panic("could not copy LDT"); 199 mdp1->md_ldt = pldt; 200 set_user_ldt(mdp1); 201 user_ldt_deref(pldt1); 202 } else 203 mtx_unlock_spin(&dt_lock); 204 } 205 return; 206 } 207 208 /* Ensure that td1's pcb is up to date. */ 209 if (td1 == curthread) 210 td1->td_pcb->pcb_gs = rgs(); 211 #ifdef DEV_NPX 212 critical_enter(); 213 if (PCPU_GET(fpcurthread) == td1) 214 npxsave(td1->td_pcb->pcb_save); 215 critical_exit(); 216 #endif 217 218 /* Point the pcb to the top of the stack */ 219 pcb2 = get_pcb_td(td2); 220 td2->td_pcb = pcb2; 221 222 /* Copy td1's pcb */ 223 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2)); 224 225 /* Properly initialize pcb_save */ 226 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2); 227 bcopy(get_pcb_user_save_td(td1), get_pcb_user_save_pcb(pcb2), 228 cpu_max_ext_state_size); 229 230 /* Point mdproc and then copy over td1's contents */ 231 mdp2 = &p2->p_md; 232 bcopy(&p1->p_md, mdp2, sizeof(*mdp2)); 233 234 /* 235 * Create a new fresh stack for the new process. 236 * Copy the trap frame for the return to user mode as if from a 237 * syscall. This copies most of the user mode register values. 238 * The -16 is so we can expand the trapframe if we go to vm86. 239 */ 240 td2->td_frame = (struct trapframe *)((caddr_t)td2->td_pcb - 16) - 1; 241 bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe)); 242 243 td2->td_frame->tf_eax = 0; /* Child returns zero */ 244 td2->td_frame->tf_eflags &= ~PSL_C; /* success */ 245 td2->td_frame->tf_edx = 1; 246 247 /* 248 * If the parent process has the trap bit set (i.e. a debugger had 249 * single stepped the process to the system call), we need to clear 250 * the trap flag from the new frame unless the debugger had set PF_FORK 251 * on the parent. Otherwise, the child will receive a (likely 252 * unexpected) SIGTRAP when it executes the first instruction after 253 * returning to userland. 254 */ 255 if ((p1->p_pfsflags & PF_FORK) == 0) 256 td2->td_frame->tf_eflags &= ~PSL_T; 257 258 /* 259 * Set registers for trampoline to user mode. Leave space for the 260 * return address on stack. These are the kernel mode register values. 261 */ 262 #if defined(PAE) || defined(PAE_TABLES) 263 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdpt); 264 #else 265 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdir); 266 #endif 267 pcb2->pcb_edi = 0; 268 pcb2->pcb_esi = (int)fork_return; /* fork_trampoline argument */ 269 pcb2->pcb_ebp = 0; 270 pcb2->pcb_esp = (int)td2->td_frame - sizeof(void *); 271 pcb2->pcb_ebx = (int)td2; /* fork_trampoline argument */ 272 pcb2->pcb_eip = (int)fork_trampoline; 273 pcb2->pcb_psl = PSL_KERNEL; /* ints disabled */ 274 /*- 275 * pcb2->pcb_dr*: cloned above. 276 * pcb2->pcb_savefpu: cloned above. 277 * pcb2->pcb_flags: cloned above. 278 * pcb2->pcb_onfault: cloned above (always NULL here?). 279 * pcb2->pcb_gs: cloned above. 280 * pcb2->pcb_ext: cleared below. 281 */ 282 283 /* 284 * XXX don't copy the i/o pages. this should probably be fixed. 285 */ 286 pcb2->pcb_ext = 0; 287 288 /* Copy the LDT, if necessary. */ 289 mtx_lock_spin(&dt_lock); 290 if (mdp2->md_ldt != NULL) { 291 if (flags & RFMEM) { 292 mdp2->md_ldt->ldt_refcnt++; 293 } else { 294 mdp2->md_ldt = user_ldt_alloc(mdp2, 295 mdp2->md_ldt->ldt_len); 296 if (mdp2->md_ldt == NULL) 297 panic("could not copy LDT"); 298 } 299 } 300 mtx_unlock_spin(&dt_lock); 301 302 /* Setup to release spin count in fork_exit(). */ 303 td2->td_md.md_spinlock_count = 1; 304 td2->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 305 306 /* 307 * Now, cpu_switch() can schedule the new process. 308 * pcb_esp is loaded pointing to the cpu_switch() stack frame 309 * containing the return address when exiting cpu_switch. 310 * This will normally be to fork_trampoline(), which will have 311 * %ebx loaded with the new proc's pointer. fork_trampoline() 312 * will set up a stack to call fork_return(p, frame); to complete 313 * the return to user-mode. 314 */ 315 } 316 317 /* 318 * Intercept the return address from a freshly forked process that has NOT 319 * been scheduled yet. 320 * 321 * This is needed to make kernel threads stay in kernel mode. 322 */ 323 void 324 cpu_set_fork_handler(td, func, arg) 325 struct thread *td; 326 void (*func)(void *); 327 void *arg; 328 { 329 /* 330 * Note that the trap frame follows the args, so the function 331 * is really called like this: func(arg, frame); 332 */ 333 td->td_pcb->pcb_esi = (int) func; /* function */ 334 td->td_pcb->pcb_ebx = (int) arg; /* first arg */ 335 } 336 337 void 338 cpu_exit(struct thread *td) 339 { 340 341 /* 342 * If this process has a custom LDT, release it. Reset pc->pcb_gs 343 * and %gs before we free it in case they refer to an LDT entry. 344 */ 345 mtx_lock_spin(&dt_lock); 346 if (td->td_proc->p_md.md_ldt) { 347 td->td_pcb->pcb_gs = _udatasel; 348 load_gs(_udatasel); 349 user_ldt_free(td); 350 } else 351 mtx_unlock_spin(&dt_lock); 352 } 353 354 void 355 cpu_thread_exit(struct thread *td) 356 { 357 358 #ifdef DEV_NPX 359 critical_enter(); 360 if (td == PCPU_GET(fpcurthread)) 361 npxdrop(); 362 critical_exit(); 363 #endif 364 365 /* Disable any hardware breakpoints. */ 366 if (td->td_pcb->pcb_flags & PCB_DBREGS) { 367 reset_dbregs(); 368 td->td_pcb->pcb_flags &= ~PCB_DBREGS; 369 } 370 } 371 372 void 373 cpu_thread_clean(struct thread *td) 374 { 375 struct pcb *pcb; 376 377 pcb = td->td_pcb; 378 if (pcb->pcb_ext != NULL) { 379 /* if (pcb->pcb_ext->ext_refcount-- == 1) ?? */ 380 /* 381 * XXX do we need to move the TSS off the allocated pages 382 * before freeing them? (not done here) 383 */ 384 kmem_free(kernel_arena, (vm_offset_t)pcb->pcb_ext, 385 ctob(IOPAGES + 1)); 386 pcb->pcb_ext = NULL; 387 } 388 } 389 390 void 391 cpu_thread_swapin(struct thread *td) 392 { 393 } 394 395 void 396 cpu_thread_swapout(struct thread *td) 397 { 398 } 399 400 void 401 cpu_thread_alloc(struct thread *td) 402 { 403 struct pcb *pcb; 404 #ifdef CPU_ENABLE_SSE 405 struct xstate_hdr *xhdr; 406 #endif 407 408 td->td_pcb = pcb = get_pcb_td(td); 409 td->td_frame = (struct trapframe *)((caddr_t)pcb - 16) - 1; 410 pcb->pcb_ext = NULL; 411 pcb->pcb_save = get_pcb_user_save_pcb(pcb); 412 #ifdef CPU_ENABLE_SSE 413 if (use_xsave) { 414 xhdr = (struct xstate_hdr *)(pcb->pcb_save + 1); 415 bzero(xhdr, sizeof(*xhdr)); 416 xhdr->xstate_bv = xsave_mask; 417 } 418 #endif 419 } 420 421 void 422 cpu_thread_free(struct thread *td) 423 { 424 425 cpu_thread_clean(td); 426 } 427 428 void 429 cpu_set_syscall_retval(struct thread *td, int error) 430 { 431 432 switch (error) { 433 case 0: 434 td->td_frame->tf_eax = td->td_retval[0]; 435 td->td_frame->tf_edx = td->td_retval[1]; 436 td->td_frame->tf_eflags &= ~PSL_C; 437 break; 438 439 case ERESTART: 440 /* 441 * Reconstruct pc, assuming lcall $X,y is 7 bytes, int 442 * 0x80 is 2 bytes. We saved this in tf_err. 443 */ 444 td->td_frame->tf_eip -= td->td_frame->tf_err; 445 break; 446 447 case EJUSTRETURN: 448 break; 449 450 default: 451 if (td->td_proc->p_sysent->sv_errsize) { 452 if (error >= td->td_proc->p_sysent->sv_errsize) 453 error = -1; /* XXX */ 454 else 455 error = td->td_proc->p_sysent->sv_errtbl[error]; 456 } 457 td->td_frame->tf_eax = error; 458 td->td_frame->tf_eflags |= PSL_C; 459 break; 460 } 461 } 462 463 /* 464 * Initialize machine state (pcb and trap frame) for a new thread about to 465 * upcall. Put enough state in the new thread's PCB to get it to go back 466 * userret(), where we can intercept it again to set the return (upcall) 467 * Address and stack, along with those from upcals that are from other sources 468 * such as those generated in thread_userret() itself. 469 */ 470 void 471 cpu_set_upcall(struct thread *td, struct thread *td0) 472 { 473 struct pcb *pcb2; 474 475 /* Point the pcb to the top of the stack. */ 476 pcb2 = td->td_pcb; 477 478 /* 479 * Copy the upcall pcb. This loads kernel regs. 480 * Those not loaded individually below get their default 481 * values here. 482 */ 483 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2)); 484 pcb2->pcb_flags &= ~(PCB_NPXINITDONE | PCB_NPXUSERINITDONE | 485 PCB_KERNNPX); 486 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2); 487 bcopy(get_pcb_user_save_td(td0), pcb2->pcb_save, 488 cpu_max_ext_state_size); 489 490 /* 491 * Create a new fresh stack for the new thread. 492 */ 493 bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe)); 494 495 /* If the current thread has the trap bit set (i.e. a debugger had 496 * single stepped the process to the system call), we need to clear 497 * the trap flag from the new frame. Otherwise, the new thread will 498 * receive a (likely unexpected) SIGTRAP when it executes the first 499 * instruction after returning to userland. 500 */ 501 td->td_frame->tf_eflags &= ~PSL_T; 502 503 /* 504 * Set registers for trampoline to user mode. Leave space for the 505 * return address on stack. These are the kernel mode register values. 506 */ 507 pcb2->pcb_edi = 0; 508 pcb2->pcb_esi = (int)fork_return; /* trampoline arg */ 509 pcb2->pcb_ebp = 0; 510 pcb2->pcb_esp = (int)td->td_frame - sizeof(void *); /* trampoline arg */ 511 pcb2->pcb_ebx = (int)td; /* trampoline arg */ 512 pcb2->pcb_eip = (int)fork_trampoline; 513 pcb2->pcb_psl &= ~(PSL_I); /* interrupts must be disabled */ 514 pcb2->pcb_gs = rgs(); 515 /* 516 * If we didn't copy the pcb, we'd need to do the following registers: 517 * pcb2->pcb_cr3: cloned above. 518 * pcb2->pcb_dr*: cloned above. 519 * pcb2->pcb_savefpu: cloned above. 520 * pcb2->pcb_flags: cloned above. 521 * pcb2->pcb_onfault: cloned above (always NULL here?). 522 * pcb2->pcb_gs: cloned above. 523 * pcb2->pcb_ext: cleared below. 524 */ 525 pcb2->pcb_ext = NULL; 526 527 /* Setup to release spin count in fork_exit(). */ 528 td->td_md.md_spinlock_count = 1; 529 td->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 530 } 531 532 /* 533 * Set that machine state for performing an upcall that has to 534 * be done in thread_userret() so that those upcalls generated 535 * in thread_userret() itself can be done as well. 536 */ 537 void 538 cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg, 539 stack_t *stack) 540 { 541 542 /* 543 * Do any extra cleaning that needs to be done. 544 * The thread may have optional components 545 * that are not present in a fresh thread. 546 * This may be a recycled thread so make it look 547 * as though it's newly allocated. 548 */ 549 cpu_thread_clean(td); 550 551 /* 552 * Set the trap frame to point at the beginning of the uts 553 * function. 554 */ 555 td->td_frame->tf_ebp = 0; 556 td->td_frame->tf_esp = 557 (((int)stack->ss_sp + stack->ss_size - 4) & ~0x0f) - 4; 558 td->td_frame->tf_eip = (int)entry; 559 560 /* 561 * Pass the address of the mailbox for this kse to the uts 562 * function as a parameter on the stack. 563 */ 564 suword((void *)(td->td_frame->tf_esp + sizeof(void *)), 565 (int)arg); 566 } 567 568 int 569 cpu_set_user_tls(struct thread *td, void *tls_base) 570 { 571 struct segment_descriptor sd; 572 uint32_t base; 573 574 /* 575 * Construct a descriptor and store it in the pcb for 576 * the next context switch. Also store it in the gdt 577 * so that the load of tf_fs into %fs will activate it 578 * at return to userland. 579 */ 580 base = (uint32_t)tls_base; 581 sd.sd_lobase = base & 0xffffff; 582 sd.sd_hibase = (base >> 24) & 0xff; 583 sd.sd_lolimit = 0xffff; /* 4GB limit, wraps around */ 584 sd.sd_hilimit = 0xf; 585 sd.sd_type = SDT_MEMRWA; 586 sd.sd_dpl = SEL_UPL; 587 sd.sd_p = 1; 588 sd.sd_xx = 0; 589 sd.sd_def32 = 1; 590 sd.sd_gran = 1; 591 critical_enter(); 592 /* set %gs */ 593 td->td_pcb->pcb_gsd = sd; 594 if (td == curthread) { 595 PCPU_GET(fsgs_gdt)[1] = sd; 596 load_gs(GSEL(GUGS_SEL, SEL_UPL)); 597 } 598 critical_exit(); 599 return (0); 600 } 601 602 /* 603 * Convert kernel VA to physical address 604 */ 605 vm_paddr_t 606 kvtop(void *addr) 607 { 608 vm_paddr_t pa; 609 610 pa = pmap_kextract((vm_offset_t)addr); 611 if (pa == 0) 612 panic("kvtop: zero page frame"); 613 return (pa); 614 } 615 616 #ifdef SMP 617 static void 618 cpu_reset_proxy() 619 { 620 cpuset_t tcrp; 621 622 cpu_reset_proxy_active = 1; 623 while (cpu_reset_proxy_active == 1) 624 ; /* Wait for other cpu to see that we've started */ 625 CPU_SETOF(cpu_reset_proxyid, &tcrp); 626 stop_cpus(tcrp); 627 printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid); 628 DELAY(1000000); 629 cpu_reset_real(); 630 } 631 #endif 632 633 void 634 cpu_reset() 635 { 636 #ifdef XBOX 637 if (arch_i386_is_xbox) { 638 /* Kick the PIC16L, it can reboot the box */ 639 pic16l_reboot(); 640 for (;;); 641 } 642 #endif 643 644 #ifdef SMP 645 cpuset_t map; 646 u_int cnt; 647 648 if (smp_started) { 649 map = all_cpus; 650 CPU_CLR(PCPU_GET(cpuid), &map); 651 CPU_NAND(&map, &stopped_cpus); 652 if (!CPU_EMPTY(&map)) { 653 printf("cpu_reset: Stopping other CPUs\n"); 654 stop_cpus(map); 655 } 656 657 if (PCPU_GET(cpuid) != 0) { 658 cpu_reset_proxyid = PCPU_GET(cpuid); 659 cpustop_restartfunc = cpu_reset_proxy; 660 cpu_reset_proxy_active = 0; 661 printf("cpu_reset: Restarting BSP\n"); 662 663 /* Restart CPU #0. */ 664 /* XXX: restart_cpus(1 << 0); */ 665 CPU_SETOF(0, &started_cpus); 666 wmb(); 667 668 cnt = 0; 669 while (cpu_reset_proxy_active == 0 && cnt < 10000000) 670 cnt++; /* Wait for BSP to announce restart */ 671 if (cpu_reset_proxy_active == 0) 672 printf("cpu_reset: Failed to restart BSP\n"); 673 enable_intr(); 674 cpu_reset_proxy_active = 2; 675 676 while (1); 677 /* NOTREACHED */ 678 } 679 680 DELAY(1000000); 681 } 682 #endif 683 cpu_reset_real(); 684 /* NOTREACHED */ 685 } 686 687 static void 688 cpu_reset_real() 689 { 690 struct region_descriptor null_idt; 691 #ifndef PC98 692 int b; 693 #endif 694 695 disable_intr(); 696 #ifdef CPU_ELAN 697 if (elan_mmcr != NULL) 698 elan_mmcr->RESCFG = 1; 699 #endif 700 701 if (cpu == CPU_GEODE1100) { 702 /* Attempt Geode's own reset */ 703 outl(0xcf8, 0x80009044ul); 704 outl(0xcfc, 0xf); 705 } 706 707 #ifdef PC98 708 /* 709 * Attempt to do a CPU reset via CPU reset port. 710 */ 711 if ((inb(0x35) & 0xa0) != 0xa0) { 712 outb(0x37, 0x0f); /* SHUT0 = 0. */ 713 outb(0x37, 0x0b); /* SHUT1 = 0. */ 714 } 715 outb(0xf0, 0x00); /* Reset. */ 716 #else 717 #if !defined(BROKEN_KEYBOARD_RESET) 718 /* 719 * Attempt to do a CPU reset via the keyboard controller, 720 * do not turn off GateA20, as any machine that fails 721 * to do the reset here would then end up in no man's land. 722 */ 723 outb(IO_KBD + 4, 0xFE); 724 DELAY(500000); /* wait 0.5 sec to see if that did it */ 725 #endif 726 727 /* 728 * Attempt to force a reset via the Reset Control register at 729 * I/O port 0xcf9. Bit 2 forces a system reset when it 730 * transitions from 0 to 1. Bit 1 selects the type of reset 731 * to attempt: 0 selects a "soft" reset, and 1 selects a 732 * "hard" reset. We try a "hard" reset. The first write sets 733 * bit 1 to select a "hard" reset and clears bit 2. The 734 * second write forces a 0 -> 1 transition in bit 2 to trigger 735 * a reset. 736 */ 737 outb(0xcf9, 0x2); 738 outb(0xcf9, 0x6); 739 DELAY(500000); /* wait 0.5 sec to see if that did it */ 740 741 /* 742 * Attempt to force a reset via the Fast A20 and Init register 743 * at I/O port 0x92. Bit 1 serves as an alternate A20 gate. 744 * Bit 0 asserts INIT# when set to 1. We are careful to only 745 * preserve bit 1 while setting bit 0. We also must clear bit 746 * 0 before setting it if it isn't already clear. 747 */ 748 b = inb(0x92); 749 if (b != 0xff) { 750 if ((b & 0x1) != 0) 751 outb(0x92, b & 0xfe); 752 outb(0x92, b | 0x1); 753 DELAY(500000); /* wait 0.5 sec to see if that did it */ 754 } 755 #endif /* PC98 */ 756 757 printf("No known reset method worked, attempting CPU shutdown\n"); 758 DELAY(1000000); /* wait 1 sec for printf to complete */ 759 760 /* Wipe the IDT. */ 761 null_idt.rd_limit = 0; 762 null_idt.rd_base = 0; 763 lidt(&null_idt); 764 765 /* "good night, sweet prince .... <THUNK!>" */ 766 breakpoint(); 767 768 /* NOTREACHED */ 769 while(1); 770 } 771 772 /* 773 * Get an sf_buf from the freelist. May block if none are available. 774 */ 775 void 776 sf_buf_map(struct sf_buf *sf, int flags) 777 { 778 pt_entry_t opte, *ptep; 779 780 /* 781 * Update the sf_buf's virtual-to-physical mapping, flushing the 782 * virtual address from the TLB. Since the reference count for 783 * the sf_buf's old mapping was zero, that mapping is not 784 * currently in use. Consequently, there is no need to exchange 785 * the old and new PTEs atomically, even under PAE. 786 */ 787 ptep = vtopte(sf->kva); 788 opte = *ptep; 789 *ptep = VM_PAGE_TO_PHYS(sf->m) | pgeflag | PG_RW | PG_V | 790 pmap_cache_bits(sf->m->md.pat_mode, 0); 791 792 /* 793 * Avoid unnecessary TLB invalidations: If the sf_buf's old 794 * virtual-to-physical mapping was not used, then any processor 795 * that has invalidated the sf_buf's virtual address from its TLB 796 * since the last used mapping need not invalidate again. 797 */ 798 #ifdef SMP 799 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 800 CPU_ZERO(&sf->cpumask); 801 802 sf_buf_shootdown(sf, flags); 803 #else 804 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 805 pmap_invalidate_page(kernel_pmap, sf->kva); 806 #endif 807 } 808 809 #ifdef SMP 810 void 811 sf_buf_shootdown(struct sf_buf *sf, int flags) 812 { 813 cpuset_t other_cpus; 814 u_int cpuid; 815 816 sched_pin(); 817 cpuid = PCPU_GET(cpuid); 818 if (!CPU_ISSET(cpuid, &sf->cpumask)) { 819 CPU_SET(cpuid, &sf->cpumask); 820 invlpg(sf->kva); 821 } 822 if ((flags & SFB_CPUPRIVATE) == 0) { 823 other_cpus = all_cpus; 824 CPU_CLR(cpuid, &other_cpus); 825 CPU_NAND(&other_cpus, &sf->cpumask); 826 if (!CPU_EMPTY(&other_cpus)) { 827 CPU_OR(&sf->cpumask, &other_cpus); 828 smp_masked_invlpg(other_cpus, sf->kva); 829 } 830 } 831 sched_unpin(); 832 } 833 #endif 834 835 /* 836 * MD part of sf_buf_free(). 837 */ 838 int 839 sf_buf_unmap(struct sf_buf *sf) 840 { 841 842 return (0); 843 } 844 845 static void 846 sf_buf_invalidate(struct sf_buf *sf) 847 { 848 vm_page_t m = sf->m; 849 850 /* 851 * Use pmap_qenter to update the pte for 852 * existing mapping, in particular, the PAT 853 * settings are recalculated. 854 */ 855 pmap_qenter(sf->kva, &m, 1); 856 pmap_invalidate_cache_range(sf->kva, sf->kva + PAGE_SIZE, FALSE); 857 } 858 859 /* 860 * Invalidate the cache lines that may belong to the page, if 861 * (possibly old) mapping of the page by sf buffer exists. Returns 862 * TRUE when mapping was found and cache invalidated. 863 */ 864 boolean_t 865 sf_buf_invalidate_cache(vm_page_t m) 866 { 867 868 return (sf_buf_process_page(m, sf_buf_invalidate)); 869 } 870 871 /* 872 * Software interrupt handler for queued VM system processing. 873 */ 874 void 875 swi_vm(void *dummy) 876 { 877 if (busdma_swi_pending != 0) 878 busdma_swi(); 879 } 880 881 /* 882 * Tell whether this address is in some physical memory region. 883 * Currently used by the kernel coredump code in order to avoid 884 * dumping the ``ISA memory hole'' which could cause indefinite hangs, 885 * or other unpredictable behaviour. 886 */ 887 888 int 889 is_physical_memory(vm_paddr_t addr) 890 { 891 892 #ifdef DEV_ISA 893 /* The ISA ``memory hole''. */ 894 if (addr >= 0xa0000 && addr < 0x100000) 895 return 0; 896 #endif 897 898 /* 899 * stuff other tests for known memory-mapped devices (PCI?) 900 * here 901 */ 902 903 return 1; 904 } 905